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cy82c693: correct DMA modes clipping
[linux-2.6-block.git] / include / linux / ide.h
CommitLineData
1da177e4
LT		 1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT		 9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
12#include <linux/hdsmart.h>
13#include <linux/blkdev.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/device.h>
19#include <linux/pci.h>
f36d4024 20#include <linux/completion.h>
e3a59b4d
HR		 21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT		 24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
27#include <asm/semaphore.h>
f9383c42 28#include <asm/mutex.h>
1da177e4 29
4ee06b7e
BZ		 30#if defined(CRIS) || defined(FRV)
31# define SUPPORT_VLB_SYNC 0
32#else
33# define SUPPORT_VLB_SYNC 1
1da177e4
LT		 34#endif
35
36/*
37 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
38 * number.
39 */
40
41#define IDE_NO_IRQ (-1)
42
1da177e4
LT		 43typedef unsigned char byte; /* used everywhere */
44
45/*
46 * Probably not wise to fiddle with these
47 */
48#define ERROR_MAX 8 /* Max read/write errors per sector */
49#define ERROR_RESET 3 /* Reset controller every 4th retry */
50#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
51
52/*
53 * Tune flags
54 */
55#define IDE_TUNE_NOAUTO 2
56#define IDE_TUNE_AUTO 1
57#define IDE_TUNE_DEFAULT 0
58
59/*
60 * state flags
61 */
62
63#define DMA_PIO_RETRY 1 /* retrying in PIO */
64
65#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
66#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
67
68/*
69 * Definitions for accessing IDE controller registers
70 */
71#define IDE_NR_PORTS (10)
72
73#define IDE_DATA_OFFSET (0)
74#define IDE_ERROR_OFFSET (1)
75#define IDE_NSECTOR_OFFSET (2)
76#define IDE_SECTOR_OFFSET (3)
77#define IDE_LCYL_OFFSET (4)
78#define IDE_HCYL_OFFSET (5)
79#define IDE_SELECT_OFFSET (6)
80#define IDE_STATUS_OFFSET (7)
81#define IDE_CONTROL_OFFSET (8)
82#define IDE_IRQ_OFFSET (9)
83
84#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
85#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
86
1da177e4
LT		 87#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
88#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
89#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
90#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
91#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
92#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
93#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
94#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
95#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
96#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
97
98#define IDE_FEATURE_REG IDE_ERROR_REG
99#define IDE_COMMAND_REG IDE_STATUS_REG
100#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
101#define IDE_IREASON_REG IDE_NSECTOR_REG
102#define IDE_BCOUNTL_REG IDE_LCYL_REG
103#define IDE_BCOUNTH_REG IDE_HCYL_REG
104
105#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
106#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
107#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
108#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
109#define DRIVE_READY (READY_STAT | SEEK_STAT)
110#define DATA_READY (DRQ_STAT)
111
112#define BAD_CRC (ABRT_ERR | ICRC_ERR)
113
114#define SATA_NR_PORTS (3) /* 16 possible ?? */
115
116#define SATA_STATUS_OFFSET (0)
117#define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
118#define SATA_ERROR_OFFSET (1)
119#define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
120#define SATA_CONTROL_OFFSET (2)
121#define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
122
123#define SATA_MISC_OFFSET (0)
124#define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
125#define SATA_PHY_OFFSET (1)
126#define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
127#define SATA_IEN_OFFSET (2)
128#define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
129
130/*
131 * Our Physical Region Descriptor (PRD) table should be large enough
132 * to handle the biggest I/O request we are likely to see. Since requests
133 * can have no more than 256 sectors, and since the typical blocksize is
134 * two or more sectors, we could get by with a limit of 128 entries here for
135 * the usual worst case. Most requests seem to include some contiguous blocks,
136 * further reducing the number of table entries required.
137 *
138 * The driver reverts to PIO mode for individual requests that exceed
139 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
140 * 100% of all crazy scenarios here is not necessary.
141 *
142 * As it turns out though, we must allocate a full 4KB page for this,
143 * so the two PRD tables (ide0 & ide1) will each get half of that,
144 * allowing each to have about 256 entries (8 bytes each) from this.
145 */
146#define PRD_BYTES 8
147#define PRD_ENTRIES 256
148
149/*
150 * Some more useful definitions
151 */
152#define PARTN_BITS 6 /* number of minor dev bits for partitions */
153#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
154#define SECTOR_SIZE 512
155#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
156#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
157
158/*
159 * Timeouts for various operations:
160 */
161#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
162#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
163#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
164#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
165#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
166#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
167
1da177e4
LT		 168/*
169 * Check for an interrupt and acknowledge the interrupt status
170 */
171struct hwif_s;
172typedef int (ide_ack_intr_t)(struct hwif_s *);
173
1da177e4
LT		 174/*
175 * hwif_chipset_t is used to keep track of the specific hardware
176 * chipset used by each IDE interface, if known.
177 */
528a572d 178enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT		 179 ide_cmd640, ide_dtc2278, ide_ali14xx,
180 ide_qd65xx, ide_umc8672, ide_ht6560b,
181 ide_rz1000, ide_trm290,
182 ide_cmd646, ide_cy82c693, ide_4drives,
183 ide_pmac, ide_etrax100, ide_acorn,
26a940e2 184 ide_au1xxx, ide_forced
528a572d
BZ		 185};
186
187typedef u8 hwif_chipset_t;
1da177e4
LT		 188
189/*
190 * Structure to hold all information about the location of this port
191 */
192typedef struct hw_regs_s {
193 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
194 int irq; /* our irq number */
1da177e4
LT		 195 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
196 hwif_chipset_t chipset;
4349d5cd 197 struct device *dev;
1da177e4
LT		 198} hw_regs_t;
199
baa8f3e9
BZ		 200struct hwif_s * ide_find_port(unsigned long);
201
fd9bb539
BZ		 202int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int,
203 struct hwif_s **);
1da177e4 204
1da177e4
LT		 205void ide_setup_ports( hw_regs_t *hw,
206 unsigned long base,
207 int *offsets,
208 unsigned long ctrl,
209 unsigned long intr,
210 ide_ack_intr_t *ack_intr,
211#if 0
212 ide_io_ops_t *iops,
213#endif
214 int irq);
215
216static inline void ide_std_init_ports(hw_regs_t *hw,
217 unsigned long io_addr,
218 unsigned long ctl_addr)
219{
220 unsigned int i;
221
222 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
223 hw->io_ports[i] = io_addr++;
224
225 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
226}
227
228#include <asm/ide.h>
229
83d7dbc4
MM		 230#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
231#undef MAX_HWIFS
83ae20c8
BH		 232#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
233#endif
234
1da177e4
LT		 235/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
236#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
237# define ide_default_io_base(index) (0)
238# define ide_default_irq(base) (0)
239# define ide_init_default_irq(base) (0)
240#endif
241
847ddd2b 242#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
1da177e4
LT		 243static inline void ide_init_hwif_ports(hw_regs_t *hw,
244 unsigned long io_addr,
245 unsigned long ctl_addr,
246 int *irq)
247{
248 if (!ctl_addr)
249 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
250 else
251 ide_std_init_ports(hw, io_addr, ctl_addr);
252
253 if (irq)
254 *irq = 0;
255
256 hw->io_ports[IDE_IRQ_OFFSET] = 0;
257
258#ifdef CONFIG_PPC32
259 if (ppc_ide_md.ide_init_hwif)
260 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
261#endif
262}
263#else
264static inline void ide_init_hwif_ports(hw_regs_t *hw,
265 unsigned long io_addr,
266 unsigned long ctl_addr,
267 int *irq)
268{
269 if (io_addr || ctl_addr)
270 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
271}
847ddd2b 272#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
1da177e4
LT		 273
274/* Currently only m68k, apus and m8xx need it */
275#ifndef IDE_ARCH_ACK_INTR
276# define ide_ack_intr(hwif) (1)
277#endif
278
279/* Currently only Atari needs it */
280#ifndef IDE_ARCH_LOCK
281# define ide_release_lock() do {} while (0)
282# define ide_get_lock(hdlr, data) do {} while (0)
283#endif /* IDE_ARCH_LOCK */
284
285/*
286 * Now for the data we need to maintain per-drive: ide_drive_t
287 */
288
289#define ide_scsi 0x21
290#define ide_disk 0x20
291#define ide_optical 0x7
292#define ide_cdrom 0x5
293#define ide_tape 0x1
294#define ide_floppy 0x0
295
296/*
297 * Special Driver Flags
298 *
299 * set_geometry : respecify drive geometry
300 * recalibrate : seek to cyl 0
301 * set_multmode : set multmode count
302 * set_tune : tune interface for drive
303 * serviced : service command
304 * reserved : unused
305 */
306typedef union {
307 unsigned all : 8;
308 struct {
1da177e4
LT		 309 unsigned set_geometry : 1;
310 unsigned recalibrate : 1;
311 unsigned set_multmode : 1;
312 unsigned set_tune : 1;
313 unsigned serviced : 1;
314 unsigned reserved : 3;
1da177e4
LT		 315 } b;
316} special_t;
317
1da177e4
LT		 318/*
319 * ATA-IDE Select Register, aka Device-Head
320 *
321 * head : always zeros here
322 * unit : drive select number: 0/1
323 * bit5 : always 1
324 * lba : using LBA instead of CHS
325 * bit7 : always 1
326 */
327typedef union {
328 unsigned all : 8;
329 struct {
330#if defined(__LITTLE_ENDIAN_BITFIELD)
331 unsigned head : 4;
332 unsigned unit : 1;
333 unsigned bit5 : 1;
334 unsigned lba : 1;
335 unsigned bit7 : 1;
336#elif defined(__BIG_ENDIAN_BITFIELD)
337 unsigned bit7 : 1;
338 unsigned lba : 1;
339 unsigned bit5 : 1;
340 unsigned unit : 1;
341 unsigned head : 4;
342#else
343#error "Please fix <asm/byteorder.h>"
344#endif
345 } b;
346} select_t, ata_select_t;
347
1da177e4
LT		 348/*
349 * Status returned from various ide_ functions
350 */
351typedef enum {
352 ide_stopped, /* no drive operation was started */
353 ide_started, /* a drive operation was started, handler was set */
354} ide_startstop_t;
355
356struct ide_driver_s;
357struct ide_settings_s;
358
e3a59b4d
HR		 359#ifdef CONFIG_BLK_DEV_IDEACPI
360struct ide_acpi_drive_link;
361struct ide_acpi_hwif_link;
362#endif
363
1da177e4
LT		 364typedef struct ide_drive_s {
365 char name[4]; /* drive name, such as "hda" */
366 char driver_req[10]; /* requests specific driver */
367
165125e1 368 struct request_queue *queue; /* request queue */
1da177e4
LT		 369
370 struct request *rq; /* current request */
371 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT		 372 void *driver_data; /* extra driver data */
373 struct hd_driveid *id; /* drive model identification info */
7662d046 374#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 375 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
376 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 377#endif
1da177e4
LT		 378 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
379
380 unsigned long sleep; /* sleep until this time */
381 unsigned long service_start; /* time we started last request */
382 unsigned long service_time; /* service time of last request */
383 unsigned long timeout; /* max time to wait for irq */
384
385 special_t special; /* special action flags */
386 select_t select; /* basic drive/head select reg value */
387
388 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT		 389 u8 using_dma; /* disk is using dma for read/write */
390 u8 retry_pio; /* retrying dma capable host in pio */
391 u8 state; /* retry state */
392 u8 waiting_for_dma; /* dma currently in progress */
393 u8 unmask; /* okay to unmask other irqs */
394 u8 bswap; /* byte swap data */
36193484 395 u8 noflush; /* don't attempt flushes */
1da177e4
LT		 396 u8 dsc_overlap; /* DSC overlap */
397 u8 nice1; /* give potential excess bandwidth */
398
399 unsigned present : 1; /* drive is physically present */
400 unsigned dead : 1; /* device ejected hint */
401 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
402 unsigned noprobe : 1; /* from: hdx=noprobe */
403 unsigned removable : 1; /* 1 if need to do check_media_change */
404 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT		 405 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
406 unsigned no_unmask : 1; /* disallow setting unmask bit */
407 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
408 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
409 unsigned nice0 : 1; /* give obvious excess bandwidth */
410 unsigned nice2 : 1; /* give a share in our own bandwidth */
411 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 412 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT		 413 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
414 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
415 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
416 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT		 417 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
418 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
419 unsigned post_reset : 1;
7f8f48af 420 unsigned udma33_warned : 1;
1da177e4 421
1497943e 422 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT		 423 u8 quirk_list; /* considered quirky, set for a specific host */
424 u8 init_speed; /* transfer rate set at boot */
1da177e4 425 u8 current_speed; /* current transfer rate set */
513daadd 426 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT		 427 u8 dn; /* now wide spread use */
428 u8 wcache; /* status of write cache */
429 u8 acoustic; /* acoustic management */
430 u8 media; /* disk, cdrom, tape, floppy, ... */
431 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
432 u8 ready_stat; /* min status value for drive ready */
433 u8 mult_count; /* current multiple sector setting */
434 u8 mult_req; /* requested multiple sector setting */
435 u8 tune_req; /* requested drive tuning setting */
436 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
437 u8 bad_wstat; /* used for ignoring WRERR_STAT */
438 u8 nowerr; /* used for ignoring WRERR_STAT */
439 u8 sect0; /* offset of first sector for DM6:DDO */
440 u8 head; /* "real" number of heads */
441 u8 sect; /* "real" sectors per track */
442 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
443 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
444
445 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
446 unsigned int cyl; /* "real" number of cyls */
26bcb879 447 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT		 448 unsigned int failures; /* current failure count */
449 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 450 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT		 451
452 u64 capacity64; /* total number of sectors */
453
454 int lun; /* logical unit */
455 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR		 456#ifdef CONFIG_BLK_DEV_IDEACPI
457 struct ide_acpi_drive_link *acpidata;
458#endif
1da177e4
LT		 459 struct list_head list;
460 struct device gendev;
f36d4024 461 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT		 462} ide_drive_t;
463
8604affd
BZ		 464#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
465
1da177e4
LT		 466#define IDE_CHIPSET_PCI_MASK \
467 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
468#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
469
039788e1 470struct ide_port_info;
1da177e4
LT		 471
472typedef struct hwif_s {
473 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
474 struct hwif_s *mate; /* other hwif from same PCI chip */
475 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
476 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
477
478 char name[6]; /* name of interface, eg. "ide0" */
479
480 /* task file registers for pata and sata */
481 unsigned long io_ports[IDE_NR_PORTS];
482 unsigned long sata_scr[SATA_NR_PORTS];
483 unsigned long sata_misc[SATA_NR_PORTS];
484
1da177e4
LT		 485 ide_drive_t drives[MAX_DRIVES]; /* drive info */
486
487 u8 major; /* our major number */
488 u8 index; /* 0 for ide0; 1 for ide1; ... */
489 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
490 u8 straight8; /* Alan's straight 8 check */
491 u8 bus_state; /* power state of the IDE bus */
492
e95d9c6b 493 u32 host_flags;
6a824c92 494
4099d143
BZ		 495 u8 pio_mask;
496
1da177e4
LT		 497 u8 ultra_mask;
498 u8 mwdma_mask;
499 u8 swdma_mask;
500
49521f97
BZ		 501 u8 cbl; /* cable type */
502
1da177e4
LT		 503 hwif_chipset_t chipset; /* sub-module for tuning.. */
504
505 struct pci_dev *pci_dev; /* for pci chipsets */
85620436 506 const struct ide_port_info *cds; /* chipset device struct */
1da177e4 507
18e181fe
BZ		 508 ide_ack_intr_t *ack_intr;
509
1da177e4
LT		 510 void (*rw_disk)(ide_drive_t *, struct request *);
511
512#if 0
513 ide_hwif_ops_t *hwifops;
514#else
88b2b32b 515 /* routine to program host for PIO mode */
26bcb879 516 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ		 517 /* routine to program host for DMA mode */
518 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT		 519 /* tweaks hardware to select drive */
520 void (*selectproc)(ide_drive_t *);
521 /* chipset polling based on hba specifics */
522 int (*reset_poll)(ide_drive_t *);
523 /* chipset specific changes to default for device-hba resets */
524 void (*pre_reset)(ide_drive_t *);
525 /* routine to reset controller after a disk reset */
526 void (*resetproc)(ide_drive_t *);
1da177e4
LT		 527 /* special host masking for drive selection */
528 void (*maskproc)(ide_drive_t *, int);
529 /* check host's drive quirk list */
530 int (*quirkproc)(ide_drive_t *);
531 /* driver soft-power interface */
532 int (*busproc)(ide_drive_t *, int);
1da177e4 533#endif
b4e44369 534 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 535 u8 (*udma_filter)(ide_drive_t *);
1da177e4 536
fd9bb539
BZ		 537 void (*fixup)(struct hwif_s *);
538
1da177e4
LT		 539 void (*ata_input_data)(ide_drive_t *, void *, u32);
540 void (*ata_output_data)(ide_drive_t *, void *, u32);
541
542 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
543 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
544
545 int (*dma_setup)(ide_drive_t *);
546 void (*dma_exec_cmd)(ide_drive_t *, u8);
547 void (*dma_start)(ide_drive_t *);
548 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 549 int (*ide_dma_on)(ide_drive_t *drive);
7469aaf6 550 void (*dma_off_quietly)(ide_drive_t *drive);
1da177e4 551 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 552 void (*ide_dma_clear_irq)(ide_drive_t *drive);
ccf35289 553 void (*dma_host_on)(ide_drive_t *drive);
7469aaf6 554 void (*dma_host_off)(ide_drive_t *drive);
841d2a9b 555 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 556 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT		 557
558 void (*OUTB)(u8 addr, unsigned long port);
559 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
560 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT		 561 void (*OUTSW)(unsigned long port, void *addr, u32 count);
562 void (*OUTSL)(unsigned long port, void *addr, u32 count);
563
564 u8 (*INB)(unsigned long port);
565 u16 (*INW)(unsigned long port);
1da177e4
LT		 566 void (*INSW)(unsigned long port, void *addr, u32 count);
567 void (*INSL)(unsigned long port, void *addr, u32 count);
568
569 /* dma physical region descriptor table (cpu view) */
570 unsigned int *dmatable_cpu;
571 /* dma physical region descriptor table (dma view) */
572 dma_addr_t dmatable_dma;
573 /* Scatter-gather list used to build the above */
574 struct scatterlist *sg_table;
575 int sg_max_nents; /* Maximum number of entries in it */
576 int sg_nents; /* Current number of entries in it */
577 int sg_dma_direction; /* dma transfer direction */
578
579 /* data phase of the active command (currently only valid for PIO/DMA) */
580 int data_phase;
581
582 unsigned int nsect;
583 unsigned int nleft;
55c16a70 584 struct scatterlist *cursg;
1da177e4
LT		 585 unsigned int cursg_ofs;
586
1da177e4
LT		 587 int rqsize; /* max sectors per request */
588 int irq; /* our irq number */
589
1da177e4
LT		 590 unsigned long dma_base; /* base addr for dma ports */
591 unsigned long dma_command; /* dma command register */
592 unsigned long dma_vendor1; /* dma vendor 1 register */
593 unsigned long dma_status; /* dma status register */
594 unsigned long dma_vendor3; /* dma vendor 3 register */
595 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 596
1da177e4
LT		 597 unsigned long config_data; /* for use by chipset-specific code */
598 unsigned long select_data; /* for use by chipset-specific code */
599
020e322d
SS		 600 unsigned long extra_base; /* extra addr for dma ports */
601 unsigned extra_ports; /* number of extra dma ports */
602
1da177e4
LT		 603 unsigned noprobe : 1; /* don't probe for this interface */
604 unsigned present : 1; /* this interface exists */
605 unsigned hold : 1; /* this interface is always present */
606 unsigned serialized : 1; /* serialized all channel operation */
607 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
608 unsigned reset : 1; /* reset after probe */
1da177e4
LT		 609 unsigned auto_poll : 1; /* supports nop auto-poll */
610 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
208a08f7 611 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
2ad1e558 612 unsigned mmio : 1; /* host uses MMIO */
1da177e4
LT		 613
614 struct device gendev;
f36d4024 615 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT		 616
617 void *hwif_data; /* extra hwif data */
618
619 unsigned dma;
e3a59b4d
HR		 620
621#ifdef CONFIG_BLK_DEV_IDEACPI
622 struct ide_acpi_hwif_link *acpidata;
623#endif
22fc6ecc 624} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT		 625
626/*
627 * internal ide interrupt handler type
628 */
1da177e4
LT		 629typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
630typedef int (ide_expiry_t)(ide_drive_t *);
631
632typedef struct hwgroup_s {
633 /* irq handler, if active */
634 ide_startstop_t (*handler)(ide_drive_t *);
635 /* irq handler, suspended if active */
636 ide_startstop_t (*handler_save)(ide_drive_t *);
637 /* BOOL: protects all fields below */
638 volatile int busy;
639 /* BOOL: wake us up on timer expiry */
640 unsigned int sleeping : 1;
641 /* BOOL: polling active & poll_timeout field valid */
642 unsigned int polling : 1;
913759ac
AC		 643 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
644 unsigned int resetting : 1;
645
1da177e4
LT		 646 /* current drive */
647 ide_drive_t *drive;
648 /* ptr to current hwif in linked-list */
649 ide_hwif_t *hwif;
650
651 /* for pci chipsets */
652 struct pci_dev *pci_dev;
1da177e4
LT		 653
654 /* current request */
655 struct request *rq;
656 /* failsafe timer */
657 struct timer_list timer;
658 /* local copy of current write rq */
659 struct request wrq;
660 /* timeout value during long polls */
661 unsigned long poll_timeout;
662 /* queried upon timeouts */
663 int (*expiry)(ide_drive_t *);
664 /* ide_system_bus_speed */
665 int pio_clock;
23450319
SS		 666 int req_gen;
667 int req_gen_timer;
1da177e4
LT		 668
669 unsigned char cmd_buf[4];
670} ide_hwgroup_t;
671
7662d046
BZ		 672typedef struct ide_driver_s ide_driver_t;
673
f9383c42 674extern struct mutex ide_setting_mtx;
1da177e4 675
7662d046
BZ		 676int set_io_32bit(ide_drive_t *, int);
677int set_pio_mode(ide_drive_t *, int);
678int set_using_dma(ide_drive_t *, int);
679
680#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 681/*
682 * configurable drive settings
683 */
684
685#define TYPE_INT 0
1497943e
BZ		 686#define TYPE_BYTE 1
687#define TYPE_SHORT 2
1da177e4
LT		 688
689#define SETTING_READ (1 << 0)
690#define SETTING_WRITE (1 << 1)
691#define SETTING_RW (SETTING_READ | SETTING_WRITE)
692
693typedef int (ide_procset_t)(ide_drive_t *, int);
694typedef struct ide_settings_s {
695 char *name;
696 int rw;
1da177e4
LT		 697 int data_type;
698 int min;
699 int max;
700 int mul_factor;
701 int div_factor;
702 void *data;
703 ide_procset_t *set;
704 int auto_remove;
705 struct ide_settings_s *next;
706} ide_settings_t;
707
1497943e 708int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT		 709
710/*
711 * /proc/ide interface
712 */
713typedef struct {
714 const char *name;
715 mode_t mode;
716 read_proc_t *read_proc;
717 write_proc_t *write_proc;
718} ide_proc_entry_t;
719
ecfd80e4
BZ		 720void proc_ide_create(void);
721void proc_ide_destroy(void);
5cbf79cd
BZ		 722void ide_proc_register_port(ide_hwif_t *);
723void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ		 724void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
725void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
726
727void ide_add_generic_settings(ide_drive_t *);
728
1da177e4
LT		 729read_proc_t proc_ide_read_capacity;
730read_proc_t proc_ide_read_geometry;
731
732#ifdef CONFIG_BLK_DEV_IDEPCI
733void ide_pci_create_host_proc(const char *, get_info_t *);
734#endif
735
736/*
737 * Standard exit stuff:
738 */
739#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
740{ \
741 len -= off; \
742 if (len < count) { \
743 *eof = 1; \
744 if (len <= 0) \
745 return 0; \
746 } else \
747 len = count; \
748 *start = page + off; \
749 return len; \
750}
751#else
ecfd80e4
BZ		 752static inline void proc_ide_create(void) { ; }
753static inline void proc_ide_destroy(void) { ; }
5cbf79cd
BZ		 754static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
755static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ		 756static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
757static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
758static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT		 759#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
760#endif
761
762/*
763 * Power Management step value (rq->pm->pm_step).
764 *
765 * The step value starts at 0 (ide_pm_state_start_suspend) for a
766 * suspend operation or 1000 (ide_pm_state_start_resume) for a
767 * resume operation.
768 *
769 * For each step, the core calls the subdriver start_power_step() first.
770 * This can return:
771 * - ide_stopped : In this case, the core calls us back again unless
772 * step have been set to ide_power_state_completed.
773 * - ide_started : In this case, the channel is left busy until an
774 * async event (interrupt) occurs.
775 * Typically, start_power_step() will issue a taskfile request with
776 * do_rw_taskfile().
777 *
778 * Upon reception of the interrupt, the core will call complete_power_step()
779 * with the error code if any. This routine should update the step value
780 * and return. It should not start a new request. The core will call
781 * start_power_step for the new step value, unless step have been set to
782 * ide_power_state_completed.
783 *
784 * Subdrivers are expected to define their own additional power
785 * steps from 1..999 for suspend and from 1001..1999 for resume,
786 * other values are reserved for future use.
787 */
788
789enum {
790 ide_pm_state_completed = -1,
791 ide_pm_state_start_suspend = 0,
792 ide_pm_state_start_resume = 1000,
793};
794
795/*
796 * Subdrivers support.
4ef3b8f4
LR		 797 *
798 * The gendriver.owner field should be set to the module owner of this driver.
799 * The gendriver.name field should be set to the name of this driver
1da177e4 800 */
7662d046 801struct ide_driver_s {
1da177e4
LT		 802 const char *version;
803 u8 media;
1da177e4 804 unsigned supports_dsc_overlap : 1;
1da177e4
LT		 805 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
806 int (*end_request)(ide_drive_t *, int, int);
807 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
808 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 809 struct device_driver gen_driver;
4031bbe4
RK		 810 int (*probe)(ide_drive_t *);
811 void (*remove)(ide_drive_t *);
0d2157f7 812 void (*resume)(ide_drive_t *);
4031bbe4 813 void (*shutdown)(ide_drive_t *);
7662d046
BZ		 814#ifdef CONFIG_IDE_PROC_FS
815 ide_proc_entry_t *proc;
816#endif
817};
1da177e4 818
4031bbe4
RK		 819#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
820
1da177e4
LT		 821int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
822
823/*
824 * ide_hwifs[] is the master data structure used to keep track
825 * of just about everything in ide.c. Whenever possible, routines
826 * should be using pointers to a drive (ide_drive_t *) or
827 * pointers to a hwif (ide_hwif_t *), rather than indexing this
828 * structure directly (the allocation/layout may change!).
829 *
830 */
831#ifndef _IDE_C
832extern ide_hwif_t ide_hwifs[]; /* master data repository */
833#endif
834extern int noautodma;
835
836extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC		 837int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
838 int uptodate, int nr_sectors);
1da177e4 839
1da177e4
LT		 840extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
841
cd2a2d96
BZ		 842void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
843 ide_expiry_t *);
1da177e4
LT		 844
845ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
846
1da177e4
LT		 847ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
848
849ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
850
1da177e4
LT		 851extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
852
853extern void ide_fix_driveid(struct hd_driveid *);
01745112 854
1da177e4
LT		 855extern void ide_fixstring(u8 *, const int, const int);
856
74af21cf 857int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 858
1da177e4
LT		 859extern ide_startstop_t ide_do_reset (ide_drive_t *);
860
1da177e4
LT		 861extern void ide_init_drive_cmd (struct request *rq);
862
1da177e4
LT		 863/*
864 * "action" parameter type for ide_do_drive_cmd() below.
865 */
866typedef enum {
867 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT		 868 ide_preempt, /* insert rq in front of current request */
869 ide_head_wait, /* insert rq in front of current request and wait for it */
870 ide_end /* insert rq at end of list, but don't wait for it */
871} ide_action_t;
872
1da177e4
LT		 873extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
874
1da177e4
LT		 875extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
876
877/*
878 * Issue ATA command and wait for completion.
879 * Use for implementing commands in kernel
880 *
881 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
882 */
883extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
884
9e42237f
BZ		 885enum {
886 IDE_TFLAG_LBA48 = (1 << 0),
887 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ		 888 IDE_TFLAG_FLAGGED = (1 << 2),
889 IDE_TFLAG_OUT_DATA = (1 << 3),
890 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
891 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
892 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
893 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
894 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
895 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
896 IDE_TFLAG_OUT_HOB_NSECT |
897 IDE_TFLAG_OUT_HOB_LBAL |
898 IDE_TFLAG_OUT_HOB_LBAM |
899 IDE_TFLAG_OUT_HOB_LBAH,
900 IDE_TFLAG_OUT_FEATURE = (1 << 9),
901 IDE_TFLAG_OUT_NSECT = (1 << 10),
902 IDE_TFLAG_OUT_LBAL = (1 << 11),
903 IDE_TFLAG_OUT_LBAM = (1 << 12),
904 IDE_TFLAG_OUT_LBAH = (1 << 13),
905 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
906 IDE_TFLAG_OUT_NSECT |
907 IDE_TFLAG_OUT_LBAL |
908 IDE_TFLAG_OUT_LBAM |
909 IDE_TFLAG_OUT_LBAH,
807e35d6 910 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 911 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ		 912 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
913 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 914 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 915 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ		 916 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
917 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
918 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
919 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
920 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
921 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
922 IDE_TFLAG_IN_HOB_LBAM |
923 IDE_TFLAG_IN_HOB_LBAH,
924 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
925 IDE_TFLAG_IN_HOB_NSECT |
926 IDE_TFLAG_IN_HOB_LBA,
927 IDE_TFLAG_IN_NSECT = (1 << 25),
928 IDE_TFLAG_IN_LBAL = (1 << 26),
929 IDE_TFLAG_IN_LBAM = (1 << 27),
930 IDE_TFLAG_IN_LBAH = (1 << 28),
931 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
932 IDE_TFLAG_IN_LBAM |
933 IDE_TFLAG_IN_LBAH,
934 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
935 IDE_TFLAG_IN_LBA,
936 IDE_TFLAG_IN_DEVICE = (1 << 29),
9e42237f
BZ		 937};
938
650d841d
BZ		 939struct ide_taskfile {
940 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
941
942 u8 hob_feature; /* 1-5: additional data to support LBA48 */
943 u8 hob_nsect;
944 u8 hob_lbal;
945 u8 hob_lbam;
946 u8 hob_lbah;
947
948 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
949
950 union { /*  7: */
951 u8 error; /* read: error */
952 u8 feature; /* write: feature */
953 };
954
955 u8 nsect; /* 8: number of sectors */
956 u8 lbal; /* 9: LBA low */
957 u8 lbam; /* 10: LBA mid */
958 u8 lbah; /* 11: LBA high */
959
960 u8 device; /* 12: device select */
961
962 union { /* 13: */
963 u8 status; /*  read: status  */
964 u8 command; /* write: command */
965 };
966};
967
1da177e4 968typedef struct ide_task_s {
650d841d
BZ		 969 union {
970 struct ide_taskfile tf;
971 u8 tf_array[14];
972 };
866e2ec9 973 u32 tf_flags;
1da177e4 974 int data_phase;
1da177e4
LT		 975 struct request *rq; /* copy of request */
976 void *special; /* valid_t generally */
977} ide_task_t;
978
9e42237f 979void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 980void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT		 981
982extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 983extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT		 984
985extern int drive_is_ready(ide_drive_t *);
1da177e4 986
2fc57388
BZ		 987void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
988
f6e29e35 989ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 990
ac026ff2 991int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ		 992int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
993
1da177e4
LT		 994int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
995int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
996int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
997
998extern int system_bus_clock(void);
999
1000extern int ide_driveid_update(ide_drive_t *);
1001extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1002extern int ide_config_drive_speed(ide_drive_t *, u8);
1003extern u8 eighty_ninty_three (ide_drive_t *);
1004extern int set_transfer(ide_drive_t *, ide_task_t *);
1005extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1006
1007extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1008
1da177e4
LT		 1009extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1010
1011extern int ide_spin_wait_hwgroup(ide_drive_t *);
1012extern void ide_timer_expiry(unsigned long);
7d12e780 1013extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1014extern void do_ide_request(struct request_queue *);
1da177e4
LT		 1015
1016void ide_init_disk(struct gendisk *, ide_drive_t *);
1017
1da177e4
LT		 1018extern int ideprobe_init(void);
1019
6d208b39 1020#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1da177e4 1021extern void ide_scan_pcibus(int scan_direction) __init;
725522b5
GKH		 1022extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1023#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ		 1024#else
1025#define ide_pci_register_driver(d) pci_register_driver(d)
1026#endif
1027
85620436
BZ		 1028void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1029void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4
LT		 1030
1031extern void default_hwif_iops(ide_hwif_t *);
1032extern void default_hwif_mmiops(ide_hwif_t *);
1033extern void default_hwif_transport(ide_hwif_t *);
1034
1da177e4
LT		 1035typedef struct ide_pci_enablebit_s {
1036 u8 reg; /* byte pci reg holding the enable-bit */
1037 u8 mask; /* mask to isolate the enable-bit */
1038 u8 val; /* value of masked reg when "enabled" */
1039} ide_pci_enablebit_t;
1040
1041enum {
1042 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1043 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1044 /* single port device */
a5d8c5c8 1045 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ		 1046 /* don't use legacy PIO blacklist */
1047 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1048 /* don't use conservative PIO "downgrade" */
1049 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ		 1050 /* use PIO8/9 for prefetch off/on */
1051 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1052 /* use PIO6/7 for fast-devsel off/on */
1053 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1054 /* use 100-102 and 200-202 PIO values to set DMA modes */
1055 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ		 1056 /*
1057 * keep DMA setting when programming PIO mode, may be used only
1058 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1059 */
1060 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ		 1061 /* program host for the transfer mode after programming device */
1062 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1063 /* don't program host/device for the transfer mode ("smart" hosts) */
1064 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ		 1065 /* trust BIOS for programming chipset/device for DMA */
1066 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1067 /* host uses VDMA */
1068 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ		 1069 /* ATAPI DMA is unsupported */
1070 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ		 1071 /* set if host is a "bootable" controller */
1072 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ		 1073 /* host doesn't support DMA */
1074 IDE_HFLAG_NO_DMA = (1 << 14),
1075 /* check if host is PCI IDE device before allowing DMA */
1076 IDE_HFLAG_NO_AUTODMA = (1 << 15),
9ffcf364
BZ		 1077 /* host is CS5510/CS5520 */
1078 IDE_HFLAG_CS5520 = (1 << 16),
238e4f14
BZ		 1079 /* no LBA48 */
1080 IDE_HFLAG_NO_LBA48 = (1 << 17),
1081 /* no LBA48 DMA */
1082 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ		 1083 /* data FIFO is cleared by an error */
1084 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ		 1085 /* serialize ports */
1086 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ		 1087 /* use legacy IRQs */
1088 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ		 1089 /* force use of legacy IRQs */
1090 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ		 1091 /* limit LBA48 requests to 256 sectors */
1092 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ		 1093 /* use 32-bit I/O ops */
1094 IDE_HFLAG_IO_32BIT = (1 << 24),
1095 /* unmask IRQs */
1096 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1097 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1da177e4
LT		 1098};
1099
7cab14a7
BZ		 1100#ifdef CONFIG_BLK_DEV_OFFBOARD
1101# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1102#else
1103# define IDE_HFLAG_OFF_BOARD 0
1104#endif
1105
039788e1 1106struct ide_port_info {
1da177e4 1107 char *name;
1da177e4
LT		 1108 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1109 void (*init_iops)(ide_hwif_t *);
1110 void (*init_hwif)(ide_hwif_t *);
1111 void (*init_dma)(ide_hwif_t *, unsigned long);
1112 void (*fixup)(ide_hwif_t *);
1da177e4 1113 ide_pci_enablebit_t enablebits[2];
528a572d 1114 hwif_chipset_t chipset;
3071a9d0 1115 u8 extra;
9ffcf364 1116 u32 host_flags;
4099d143 1117 u8 pio_mask;
5f8b6c34
BZ		 1118 u8 swdma_mask;
1119 u8 mwdma_mask;
18137207 1120 u8 udma_mask;
039788e1 1121};
1da177e4 1122
85620436
BZ		 1123int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1124int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT		 1125
1126void ide_map_sg(ide_drive_t *, struct request *);
1127void ide_init_sg_cmd(ide_drive_t *, struct request *);
1128
1129#define BAD_DMA_DRIVE 0
1130#define GOOD_DMA_DRIVE 1
1131
65e5f2e3
JC		 1132struct drive_list_entry {
1133 const char *id_model;
1134 const char *id_firmware;
1135};
1136
1137int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ		 1138
1139#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1140int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1141int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ		 1142
1143u8 ide_find_dma_mode(ide_drive_t *, u8);
1144
1145static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1146{
1147 return ide_find_dma_mode(drive, XFER_UDMA_6);
1148}
1149
7469aaf6 1150void ide_dma_off(ide_drive_t *);
3608b5d7 1151int ide_set_dma(ide_drive_t *);
1da177e4
LT		 1152ide_startstop_t ide_dma_intr(ide_drive_t *);
1153
1154#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1155extern int ide_build_sglist(ide_drive_t *, struct request *);
1156extern int ide_build_dmatable(ide_drive_t *, struct request *);
1157extern void ide_destroy_dmatable(ide_drive_t *);
1158extern int ide_release_dma(ide_hwif_t *);
1159extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1160
7469aaf6
BZ		 1161void ide_dma_host_off(ide_drive_t *);
1162void ide_dma_off_quietly(ide_drive_t *);
ccf35289 1163void ide_dma_host_on(ide_drive_t *);
1da177e4 1164extern int __ide_dma_on(ide_drive_t *);
1da177e4
LT		 1165extern int ide_dma_setup(ide_drive_t *);
1166extern void ide_dma_start(ide_drive_t *);
1167extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1168extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1169extern void ide_dma_timeout(ide_drive_t *);
1da177e4
LT		 1170#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1171
1172#else
3ab7efe8 1173static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1174static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1175static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
7469aaf6 1176static inline void ide_dma_off(ide_drive_t *drive) { ; }
1da177e4 1177static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1178static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1da177e4
LT		 1179#endif /* CONFIG_BLK_DEV_IDEDMA */
1180
1181#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1182static inline void ide_release_dma(ide_hwif_t *drive) {;}
1183#endif
1184
e3a59b4d
HR		 1185#ifdef CONFIG_BLK_DEV_IDEACPI
1186extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1187extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1188extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1189extern void ide_acpi_init(ide_hwif_t *hwif);
5e32132b 1190extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR		 1191#else
1192static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1193static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1194static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1195static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
5e32132b 1196static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR		 1197#endif
1198
1da177e4
LT		 1199extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1200extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1201extern void ide_unregister (unsigned int index);
1202
1203void ide_register_region(struct gendisk *);
1204void ide_unregister_region(struct gendisk *);
1205
1206void ide_undecoded_slave(ide_hwif_t *);
1207
8447d9d5 1208int ide_device_add(u8 idx[4]);
1da177e4
LT		 1209
1210static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1211{
1212 return hwif->hwif_data;
1213}
1214
1215static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1216{
1217 hwif->hwif_data = data;
1218}
1219
3ab7efe8 1220const char *ide_xfer_verbose(u8 mode);
1da177e4
LT		 1221extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1222extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1223
2229833c
BZ		 1224static inline int ide_dev_has_iordy(struct hd_driveid *id)
1225{
1226 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1227}
1228
6c3c22f3
SS		 1229static inline int ide_dev_is_sata(struct hd_driveid *id)
1230{
1231 /*
1232 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1233 * verifying that word 80 by casting it to a signed type --
1234 * this trick allows us to filter out the reserved values of
1235 * 0x0000 and 0xffff along with the earlier ATA revisions...
1236 */
1237 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1238 return 1;
1239 return 0;
1240}
1241
a501633c 1242u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT		 1243u8 ide_dump_status(ide_drive_t *, const char *, u8);
1244
1245typedef struct ide_pio_timings_s {
1246 int setup_time; /* Address setup (ns) minimum */
1247 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS		 1248 int cycle_time; /* Cycle time (ns) minimum = */
1249 /* active + recovery (+ setup for some chips) */
1da177e4
LT		 1250} ide_pio_timings_t;
1251
7dd00083 1252unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1253u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT		 1254extern const ide_pio_timings_t ide_pio_timings[6];
1255
88b2b32b
BZ		 1256int ide_set_pio_mode(ide_drive_t *, u8);
1257int ide_set_dma_mode(ide_drive_t *, u8);
1258
26bcb879
BZ		 1259void ide_set_pio(ide_drive_t *, u8);
1260
1261static inline void ide_set_max_pio(ide_drive_t *drive)
1262{
1263 ide_set_pio(drive, 255);
1264}
1da177e4
LT		 1265
1266extern spinlock_t ide_lock;
ef29888e 1267extern struct mutex ide_cfg_mtx;
1da177e4
LT		 1268/*
1269 * Structure locking:
1270 *
ef29888e 1271 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT		 1272 * ide_hwif_t->{next,hwgroup}
1273 * ide_drive_t->next
1274 *
1275 * ide_hwgroup_t->busy: ide_lock
1276 * ide_hwgroup_t->hwif: ide_lock
1277 * ide_hwif_t->mate: constant, no locking
1278 * ide_drive_t->hwif: constant, no locking
1279 */
1280
366c7f55 1281#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT		 1282
1283extern struct bus_type ide_bus_type;
1284
1285/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1286#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1287
1288/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1289#define ide_id_has_flush_cache_ext(id) \
1290 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1291
86b37860
CL		 1292static inline int hwif_to_node(ide_hwif_t *hwif)
1293{
1294 struct pci_dev *dev = hwif->pci_dev;
1295 return dev ? pcibus_to_node(dev->bus) : -1;
1296}
1297
1b678347
BH		 1298static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1299{
1300 ide_hwif_t *hwif = HWIF(drive);
1301
1302 return &hwif->drives[(drive->dn ^ 1) & 1];
1303}
1304
1da177e4 1305#endif /* _IDE_H */
Linux 6.x block layer and io_uring tree(s)