ide: use ->tf_read in ide_read_error()
[linux-2.6-block.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
e3a59b4d
HR
20#ifdef CONFIG_BLK_DEV_IDEACPI
21#include <acpi/acpi.h>
22#endif
1da177e4
LT
23#include <asm/byteorder.h>
24#include <asm/system.h>
25#include <asm/io.h>
f9383c42 26#include <asm/mutex.h>
1da177e4 27
729d4de9 28#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ
29# define SUPPORT_VLB_SYNC 0
30#else
31# define SUPPORT_VLB_SYNC 1
1da177e4
LT
32#endif
33
34/*
35 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
36 * number.
37 */
38
39#define IDE_NO_IRQ (-1)
40
1da177e4
LT
41typedef unsigned char byte; /* used everywhere */
42
43/*
44 * Probably not wise to fiddle with these
45 */
46#define ERROR_MAX 8 /* Max read/write errors per sector */
47#define ERROR_RESET 3 /* Reset controller every 4th retry */
48#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
49
1da177e4
LT
50/*
51 * state flags
52 */
53
54#define DMA_PIO_RETRY 1 /* retrying in PIO */
55
56#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
57#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
58
59/*
60 * Definitions for accessing IDE controller registers
61 */
62#define IDE_NR_PORTS (10)
63
4c3032d8
BZ
64struct ide_io_ports {
65 unsigned long data_addr;
66
67 union {
68 unsigned long error_addr; /* read: error */
69 unsigned long feature_addr; /* write: feature */
70 };
71
72 unsigned long nsect_addr;
73 unsigned long lbal_addr;
74 unsigned long lbam_addr;
75 unsigned long lbah_addr;
76
77 unsigned long device_addr;
78
79 union {
80 unsigned long status_addr; /*  read: status  */
81 unsigned long command_addr; /* write: command */
82 };
83
84 unsigned long ctl_addr;
85
86 unsigned long irq_addr;
87};
1da177e4
LT
88
89#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
90#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
91#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
92#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
93#define DRIVE_READY (READY_STAT | SEEK_STAT)
1da177e4
LT
94
95#define BAD_CRC (ABRT_ERR | ICRC_ERR)
96
97#define SATA_NR_PORTS (3) /* 16 possible ?? */
98
99#define SATA_STATUS_OFFSET (0)
1da177e4 100#define SATA_ERROR_OFFSET (1)
1da177e4 101#define SATA_CONTROL_OFFSET (2)
1da177e4 102
1da177e4
LT
103/*
104 * Our Physical Region Descriptor (PRD) table should be large enough
105 * to handle the biggest I/O request we are likely to see. Since requests
106 * can have no more than 256 sectors, and since the typical blocksize is
107 * two or more sectors, we could get by with a limit of 128 entries here for
108 * the usual worst case. Most requests seem to include some contiguous blocks,
109 * further reducing the number of table entries required.
110 *
111 * The driver reverts to PIO mode for individual requests that exceed
112 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
113 * 100% of all crazy scenarios here is not necessary.
114 *
115 * As it turns out though, we must allocate a full 4KB page for this,
116 * so the two PRD tables (ide0 & ide1) will each get half of that,
117 * allowing each to have about 256 entries (8 bytes each) from this.
118 */
119#define PRD_BYTES 8
120#define PRD_ENTRIES 256
121
122/*
123 * Some more useful definitions
124 */
125#define PARTN_BITS 6 /* number of minor dev bits for partitions */
126#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
127#define SECTOR_SIZE 512
128#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
129#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
130
131/*
132 * Timeouts for various operations:
133 */
134#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
135#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
136#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
137#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
138#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
139#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
140
79e36a9f
EO
141/*
142 * Op codes for special requests to be handled by ide_special_rq().
143 * Values should be in the range of 0x20 to 0x3f.
144 */
145#define REQ_DRIVE_RESET 0x20
146
1da177e4
LT
147/*
148 * Check for an interrupt and acknowledge the interrupt status
149 */
150struct hwif_s;
151typedef int (ide_ack_intr_t)(struct hwif_s *);
152
1da177e4
LT
153/*
154 * hwif_chipset_t is used to keep track of the specific hardware
155 * chipset used by each IDE interface, if known.
156 */
528a572d 157enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
158 ide_cmd640, ide_dtc2278, ide_ali14xx,
159 ide_qd65xx, ide_umc8672, ide_ht6560b,
160 ide_rz1000, ide_trm290,
161 ide_cmd646, ide_cy82c693, ide_4drives,
b7691646 162 ide_pmac, ide_acorn,
9a0e77f2 163 ide_au1xxx, ide_palm3710
528a572d
BZ
164};
165
166typedef u8 hwif_chipset_t;
1da177e4
LT
167
168/*
169 * Structure to hold all information about the location of this port
170 */
171typedef struct hw_regs_s {
4c3032d8
BZ
172 union {
173 struct ide_io_ports io_ports;
174 unsigned long io_ports_array[IDE_NR_PORTS];
175 };
176
1da177e4 177 int irq; /* our irq number */
1da177e4
LT
178 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
179 hwif_chipset_t chipset;
c56c5648 180 struct device *dev, *parent;
1da177e4
LT
181} hw_regs_t;
182
cbb010c1 183void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 184void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 185
1da177e4
LT
186static inline void ide_std_init_ports(hw_regs_t *hw,
187 unsigned long io_addr,
188 unsigned long ctl_addr)
189{
190 unsigned int i;
191
4c3032d8
BZ
192 for (i = 0; i <= 7; i++)
193 hw->io_ports_array[i] = io_addr++;
1da177e4 194
4c3032d8 195 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
196}
197
a861beb1
BZ
198/* for IDE PCI controllers in legacy mode, temporary */
199static inline int __ide_default_irq(unsigned long base)
200{
201 switch (base) {
202#ifdef CONFIG_IA64
203 case 0x1f0: return isa_irq_to_vector(14);
204 case 0x170: return isa_irq_to_vector(15);
205#else
206 case 0x1f0: return 14;
207 case 0x170: return 15;
208#endif
209 }
210 return 0;
211}
212
1da177e4
LT
213#include <asm/ide.h>
214
83d7dbc4
MM
215#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
216#undef MAX_HWIFS
83ae20c8
BH
217#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
218#endif
219
1da177e4
LT
220/* Currently only m68k, apus and m8xx need it */
221#ifndef IDE_ARCH_ACK_INTR
222# define ide_ack_intr(hwif) (1)
223#endif
224
225/* Currently only Atari needs it */
226#ifndef IDE_ARCH_LOCK
227# define ide_release_lock() do {} while (0)
228# define ide_get_lock(hdlr, data) do {} while (0)
229#endif /* IDE_ARCH_LOCK */
230
231/*
232 * Now for the data we need to maintain per-drive: ide_drive_t
233 */
234
235#define ide_scsi 0x21
236#define ide_disk 0x20
237#define ide_optical 0x7
238#define ide_cdrom 0x5
239#define ide_tape 0x1
240#define ide_floppy 0x0
241
242/*
243 * Special Driver Flags
244 *
245 * set_geometry : respecify drive geometry
246 * recalibrate : seek to cyl 0
247 * set_multmode : set multmode count
248 * set_tune : tune interface for drive
249 * serviced : service command
250 * reserved : unused
251 */
252typedef union {
253 unsigned all : 8;
254 struct {
1da177e4
LT
255 unsigned set_geometry : 1;
256 unsigned recalibrate : 1;
257 unsigned set_multmode : 1;
258 unsigned set_tune : 1;
259 unsigned serviced : 1;
260 unsigned reserved : 3;
1da177e4
LT
261 } b;
262} special_t;
263
1da177e4
LT
264/*
265 * ATA-IDE Select Register, aka Device-Head
266 *
267 * head : always zeros here
268 * unit : drive select number: 0/1
269 * bit5 : always 1
270 * lba : using LBA instead of CHS
271 * bit7 : always 1
272 */
273typedef union {
274 unsigned all : 8;
275 struct {
276#if defined(__LITTLE_ENDIAN_BITFIELD)
277 unsigned head : 4;
278 unsigned unit : 1;
279 unsigned bit5 : 1;
280 unsigned lba : 1;
281 unsigned bit7 : 1;
282#elif defined(__BIG_ENDIAN_BITFIELD)
283 unsigned bit7 : 1;
284 unsigned lba : 1;
285 unsigned bit5 : 1;
286 unsigned unit : 1;
287 unsigned head : 4;
288#else
289#error "Please fix <asm/byteorder.h>"
290#endif
291 } b;
292} select_t, ata_select_t;
293
1da177e4
LT
294/*
295 * Status returned from various ide_ functions
296 */
297typedef enum {
298 ide_stopped, /* no drive operation was started */
299 ide_started, /* a drive operation was started, handler was set */
300} ide_startstop_t;
301
302struct ide_driver_s;
303struct ide_settings_s;
304
e3a59b4d
HR
305#ifdef CONFIG_BLK_DEV_IDEACPI
306struct ide_acpi_drive_link;
307struct ide_acpi_hwif_link;
308#endif
309
1da177e4
LT
310typedef struct ide_drive_s {
311 char name[4]; /* drive name, such as "hda" */
312 char driver_req[10]; /* requests specific driver */
313
165125e1 314 struct request_queue *queue; /* request queue */
1da177e4
LT
315
316 struct request *rq; /* current request */
317 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
318 void *driver_data; /* extra driver data */
319 struct hd_driveid *id; /* drive model identification info */
7662d046 320#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
321 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
322 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 323#endif
1da177e4
LT
324 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
325
326 unsigned long sleep; /* sleep until this time */
327 unsigned long service_start; /* time we started last request */
328 unsigned long service_time; /* service time of last request */
329 unsigned long timeout; /* max time to wait for irq */
330
331 special_t special; /* special action flags */
332 select_t select; /* basic drive/head select reg value */
333
334 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT
335 u8 using_dma; /* disk is using dma for read/write */
336 u8 retry_pio; /* retrying dma capable host in pio */
337 u8 state; /* retry state */
338 u8 waiting_for_dma; /* dma currently in progress */
339 u8 unmask; /* okay to unmask other irqs */
36193484 340 u8 noflush; /* don't attempt flushes */
1da177e4
LT
341 u8 dsc_overlap; /* DSC overlap */
342 u8 nice1; /* give potential excess bandwidth */
343
344 unsigned present : 1; /* drive is physically present */
345 unsigned dead : 1; /* device ejected hint */
346 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
347 unsigned noprobe : 1; /* from: hdx=noprobe */
348 unsigned removable : 1; /* 1 if need to do check_media_change */
349 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
350 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
351 unsigned no_unmask : 1; /* disallow setting unmask bit */
352 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
353 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
1da177e4 354 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 355 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT
356 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
357 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
358 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
359 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
360 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
361 unsigned post_reset : 1;
7f8f48af 362 unsigned udma33_warned : 1;
1da177e4 363
1497943e 364 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
365 u8 quirk_list; /* considered quirky, set for a specific host */
366 u8 init_speed; /* transfer rate set at boot */
1da177e4 367 u8 current_speed; /* current transfer rate set */
513daadd 368 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
369 u8 dn; /* now wide spread use */
370 u8 wcache; /* status of write cache */
371 u8 acoustic; /* acoustic management */
372 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
373 u8 ready_stat; /* min status value for drive ready */
374 u8 mult_count; /* current multiple sector setting */
375 u8 mult_req; /* requested multiple sector setting */
376 u8 tune_req; /* requested drive tuning setting */
377 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
378 u8 bad_wstat; /* used for ignoring WRERR_STAT */
379 u8 nowerr; /* used for ignoring WRERR_STAT */
380 u8 sect0; /* offset of first sector for DM6:DDO */
381 u8 head; /* "real" number of heads */
382 u8 sect; /* "real" sectors per track */
383 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
384 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
385
386 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
387 unsigned int cyl; /* "real" number of cyls */
26bcb879 388 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
389 unsigned int failures; /* current failure count */
390 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 391 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
392
393 u64 capacity64; /* total number of sectors */
394
395 int lun; /* logical unit */
396 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
397#ifdef CONFIG_BLK_DEV_IDEACPI
398 struct ide_acpi_drive_link *acpidata;
399#endif
1da177e4
LT
400 struct list_head list;
401 struct device gendev;
f36d4024 402 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
403} ide_drive_t;
404
8604affd
BZ
405#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
406
1da177e4
LT
407#define IDE_CHIPSET_PCI_MASK \
408 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
409#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
410
039788e1 411struct ide_port_info;
1da177e4 412
ac95beed 413struct ide_port_ops {
e6d95bd1
BZ
414 /* host specific initialization of a device */
415 void (*init_dev)(ide_drive_t *);
ac95beed
BZ
416 /* routine to program host for PIO mode */
417 void (*set_pio_mode)(ide_drive_t *, const u8);
418 /* routine to program host for DMA mode */
419 void (*set_dma_mode)(ide_drive_t *, const u8);
420 /* tweaks hardware to select drive */
421 void (*selectproc)(ide_drive_t *);
422 /* chipset polling based on hba specifics */
423 int (*reset_poll)(ide_drive_t *);
424 /* chipset specific changes to default for device-hba resets */
425 void (*pre_reset)(ide_drive_t *);
426 /* routine to reset controller after a disk reset */
427 void (*resetproc)(ide_drive_t *);
428 /* special host masking for drive selection */
429 void (*maskproc)(ide_drive_t *, int);
430 /* check host's drive quirk list */
431 void (*quirkproc)(ide_drive_t *);
432
433 u8 (*mdma_filter)(ide_drive_t *);
434 u8 (*udma_filter)(ide_drive_t *);
435
436 u8 (*cable_detect)(struct hwif_s *);
437};
438
5e37bdc0
BZ
439struct ide_dma_ops {
440 void (*dma_host_set)(struct ide_drive_s *, int);
441 int (*dma_setup)(struct ide_drive_s *);
442 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
443 void (*dma_start)(struct ide_drive_s *);
444 int (*dma_end)(struct ide_drive_s *);
445 int (*dma_test_irq)(struct ide_drive_s *);
446 void (*dma_lost_irq)(struct ide_drive_s *);
447 void (*dma_timeout)(struct ide_drive_s *);
448};
449
94cd5b62
BZ
450struct ide_task_s;
451
1da177e4
LT
452typedef struct hwif_s {
453 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
454 struct hwif_s *mate; /* other hwif from same PCI chip */
455 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
456 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
457
458 char name[6]; /* name of interface, eg. "ide0" */
459
4c3032d8
BZ
460 struct ide_io_ports io_ports;
461
1da177e4 462 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 463
1da177e4
LT
464 ide_drive_t drives[MAX_DRIVES]; /* drive info */
465
466 u8 major; /* our major number */
467 u8 index; /* 0 for ide0; 1 for ide1; ... */
468 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4
LT
469 u8 bus_state; /* power state of the IDE bus */
470
e95d9c6b 471 u32 host_flags;
6a824c92 472
4099d143
BZ
473 u8 pio_mask;
474
1da177e4
LT
475 u8 ultra_mask;
476 u8 mwdma_mask;
477 u8 swdma_mask;
478
49521f97
BZ
479 u8 cbl; /* cable type */
480
1da177e4
LT
481 hwif_chipset_t chipset; /* sub-module for tuning.. */
482
36501650
BZ
483 struct device *dev;
484
18e181fe
BZ
485 ide_ack_intr_t *ack_intr;
486
1da177e4
LT
487 void (*rw_disk)(ide_drive_t *, struct request *);
488
ac95beed 489 const struct ide_port_ops *port_ops;
f37afdac 490 const struct ide_dma_ops *dma_ops;
bfa14b42 491
c6dfa867 492 void (*exec_command)(struct hwif_s *, u8);
b73c7ee2 493 u8 (*read_status)(struct hwif_s *);
1f6d8a0f 494 u8 (*read_altstatus)(struct hwif_s *);
c6dfa867 495 u8 (*read_sff_dma_status)(struct hwif_s *);
b2f951aa 496
6e6afb3b
BZ
497 void (*set_irq)(struct hwif_s *, int);
498
94cd5b62
BZ
499 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
500 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
501
9567b349
BZ
502 void (*input_data)(ide_drive_t *, struct request *, void *, unsigned);
503 void (*output_data)(ide_drive_t *, struct request *, void *, unsigned);
1da177e4 504
f0dd8712 505 void (*ide_dma_clear_irq)(ide_drive_t *drive);
1da177e4
LT
506
507 void (*OUTB)(u8 addr, unsigned long port);
f8c4bd0a 508 void (*OUTBSYNC)(struct hwif_s *hwif, u8 addr, unsigned long port);
1da177e4
LT
509
510 u8 (*INB)(unsigned long port);
1da177e4
LT
511
512 /* dma physical region descriptor table (cpu view) */
513 unsigned int *dmatable_cpu;
514 /* dma physical region descriptor table (dma view) */
515 dma_addr_t dmatable_dma;
516 /* Scatter-gather list used to build the above */
517 struct scatterlist *sg_table;
518 int sg_max_nents; /* Maximum number of entries in it */
519 int sg_nents; /* Current number of entries in it */
520 int sg_dma_direction; /* dma transfer direction */
521
522 /* data phase of the active command (currently only valid for PIO/DMA) */
523 int data_phase;
524
525 unsigned int nsect;
526 unsigned int nleft;
55c16a70 527 struct scatterlist *cursg;
1da177e4
LT
528 unsigned int cursg_ofs;
529
1da177e4
LT
530 int rqsize; /* max sectors per request */
531 int irq; /* our irq number */
532
1da177e4 533 unsigned long dma_base; /* base addr for dma ports */
1da177e4 534
1da177e4
LT
535 unsigned long config_data; /* for use by chipset-specific code */
536 unsigned long select_data; /* for use by chipset-specific code */
537
020e322d
SS
538 unsigned long extra_base; /* extra addr for dma ports */
539 unsigned extra_ports; /* number of extra dma ports */
540
1da177e4 541 unsigned present : 1; /* this interface exists */
1da177e4
LT
542 unsigned serialized : 1; /* serialized all channel operation */
543 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
1da177e4
LT
544 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
545
f74c9141
BZ
546 struct device gendev;
547 struct device *portdev;
548
f36d4024 549 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
550
551 void *hwif_data; /* extra hwif data */
552
553 unsigned dma;
e3a59b4d
HR
554
555#ifdef CONFIG_BLK_DEV_IDEACPI
556 struct ide_acpi_hwif_link *acpidata;
557#endif
22fc6ecc 558} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
559
560/*
561 * internal ide interrupt handler type
562 */
1da177e4
LT
563typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
564typedef int (ide_expiry_t)(ide_drive_t *);
565
0eea6458 566/* used by ide-cd, ide-floppy, etc. */
9567b349 567typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
0eea6458 568
1da177e4
LT
569typedef struct hwgroup_s {
570 /* irq handler, if active */
571 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 572
1da177e4
LT
573 /* BOOL: protects all fields below */
574 volatile int busy;
575 /* BOOL: wake us up on timer expiry */
576 unsigned int sleeping : 1;
577 /* BOOL: polling active & poll_timeout field valid */
578 unsigned int polling : 1;
913759ac 579
1da177e4
LT
580 /* current drive */
581 ide_drive_t *drive;
582 /* ptr to current hwif in linked-list */
583 ide_hwif_t *hwif;
584
1da177e4
LT
585 /* current request */
586 struct request *rq;
a6fbb1c8 587
1da177e4
LT
588 /* failsafe timer */
589 struct timer_list timer;
1da177e4
LT
590 /* timeout value during long polls */
591 unsigned long poll_timeout;
592 /* queried upon timeouts */
593 int (*expiry)(ide_drive_t *);
a6fbb1c8 594
23450319
SS
595 int req_gen;
596 int req_gen_timer;
1da177e4
LT
597} ide_hwgroup_t;
598
7662d046
BZ
599typedef struct ide_driver_s ide_driver_t;
600
f9383c42 601extern struct mutex ide_setting_mtx;
1da177e4 602
7662d046
BZ
603int set_io_32bit(ide_drive_t *, int);
604int set_pio_mode(ide_drive_t *, int);
605int set_using_dma(ide_drive_t *, int);
606
eaec3e7d
BP
607/* ATAPI packet command flags */
608enum {
609 /* set when an error is considered normal - no retry (ide-tape) */
610 PC_FLAG_ABORT = (1 << 0),
611 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
612 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
613 PC_FLAG_DMA_OK = (1 << 3),
5e331095
BZ
614 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
615 PC_FLAG_DMA_ERROR = (1 << 5),
616 PC_FLAG_WRITING = (1 << 6),
eaec3e7d 617 /* command timed out */
5e331095 618 PC_FLAG_TIMEDOUT = (1 << 7),
5d41893c 619 PC_FLAG_ZIP_DRIVE = (1 << 8),
28c7214b 620 PC_FLAG_DRQ_INTERRUPT = (1 << 9),
eaec3e7d
BP
621};
622
8303b46e
BP
623struct ide_atapi_pc {
624 /* actual packet bytes */
625 u8 c[12];
626 /* incremented on each retry */
627 int retries;
628 int error;
629
630 /* bytes to transfer */
631 int req_xfer;
632 /* bytes actually transferred */
633 int xferred;
634
635 /* data buffer */
636 u8 *buf;
637 /* current buffer position */
638 u8 *cur_pos;
639 int buf_size;
640 /* missing/available data on the current buffer */
641 int b_count;
642
643 /* the corresponding request */
644 struct request *rq;
645
646 unsigned long flags;
647
648 /*
649 * those are more or less driver-specific and some of them are subject
650 * to change/removal later.
651 */
652 u8 pc_buf[256];
1b06e92a
BZ
653
654 void (*callback)(ide_drive_t *);
8303b46e
BP
655
656 /* idetape only */
657 struct idetape_bh *bh;
658 char *b_data;
659
660 /* idescsi only for now */
661 struct scatterlist *sg;
662 unsigned int sg_cnt;
663
664 struct scsi_cmnd *scsi_cmd;
665 void (*done) (struct scsi_cmnd *);
666
667 unsigned long timeout;
668};
669
7662d046 670#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
671/*
672 * configurable drive settings
673 */
674
675#define TYPE_INT 0
1497943e
BZ
676#define TYPE_BYTE 1
677#define TYPE_SHORT 2
1da177e4
LT
678
679#define SETTING_READ (1 << 0)
680#define SETTING_WRITE (1 << 1)
681#define SETTING_RW (SETTING_READ | SETTING_WRITE)
682
683typedef int (ide_procset_t)(ide_drive_t *, int);
684typedef struct ide_settings_s {
685 char *name;
686 int rw;
1da177e4
LT
687 int data_type;
688 int min;
689 int max;
690 int mul_factor;
691 int div_factor;
692 void *data;
693 ide_procset_t *set;
694 int auto_remove;
695 struct ide_settings_s *next;
696} ide_settings_t;
697
1497943e 698int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
699
700/*
701 * /proc/ide interface
702 */
703typedef struct {
704 const char *name;
705 mode_t mode;
706 read_proc_t *read_proc;
707 write_proc_t *write_proc;
708} ide_proc_entry_t;
709
ecfd80e4
BZ
710void proc_ide_create(void);
711void proc_ide_destroy(void);
5cbf79cd 712void ide_proc_register_port(ide_hwif_t *);
d9270a3f 713void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 714void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 715void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
716void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
717void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
718
719void ide_add_generic_settings(ide_drive_t *);
720
1da177e4
LT
721read_proc_t proc_ide_read_capacity;
722read_proc_t proc_ide_read_geometry;
723
1da177e4
LT
724/*
725 * Standard exit stuff:
726 */
727#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
728{ \
729 len -= off; \
730 if (len < count) { \
731 *eof = 1; \
732 if (len <= 0) \
733 return 0; \
734 } else \
735 len = count; \
736 *start = page + off; \
737 return len; \
738}
739#else
ecfd80e4
BZ
740static inline void proc_ide_create(void) { ; }
741static inline void proc_ide_destroy(void) { ; }
5cbf79cd 742static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 743static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 744static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 745static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
746static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
747static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
748static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
749#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
750#endif
751
752/*
753 * Power Management step value (rq->pm->pm_step).
754 *
755 * The step value starts at 0 (ide_pm_state_start_suspend) for a
756 * suspend operation or 1000 (ide_pm_state_start_resume) for a
757 * resume operation.
758 *
759 * For each step, the core calls the subdriver start_power_step() first.
760 * This can return:
761 * - ide_stopped : In this case, the core calls us back again unless
762 * step have been set to ide_power_state_completed.
763 * - ide_started : In this case, the channel is left busy until an
764 * async event (interrupt) occurs.
765 * Typically, start_power_step() will issue a taskfile request with
766 * do_rw_taskfile().
767 *
768 * Upon reception of the interrupt, the core will call complete_power_step()
769 * with the error code if any. This routine should update the step value
770 * and return. It should not start a new request. The core will call
771 * start_power_step for the new step value, unless step have been set to
772 * ide_power_state_completed.
773 *
774 * Subdrivers are expected to define their own additional power
775 * steps from 1..999 for suspend and from 1001..1999 for resume,
776 * other values are reserved for future use.
777 */
778
779enum {
780 ide_pm_state_completed = -1,
781 ide_pm_state_start_suspend = 0,
782 ide_pm_state_start_resume = 1000,
783};
784
785/*
786 * Subdrivers support.
4ef3b8f4
LR
787 *
788 * The gendriver.owner field should be set to the module owner of this driver.
789 * The gendriver.name field should be set to the name of this driver
1da177e4 790 */
7662d046 791struct ide_driver_s {
1da177e4
LT
792 const char *version;
793 u8 media;
1da177e4 794 unsigned supports_dsc_overlap : 1;
1da177e4
LT
795 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
796 int (*end_request)(ide_drive_t *, int, int);
797 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1da177e4 798 struct device_driver gen_driver;
4031bbe4
RK
799 int (*probe)(ide_drive_t *);
800 void (*remove)(ide_drive_t *);
0d2157f7 801 void (*resume)(ide_drive_t *);
4031bbe4 802 void (*shutdown)(ide_drive_t *);
7662d046
BZ
803#ifdef CONFIG_IDE_PROC_FS
804 ide_proc_entry_t *proc;
805#endif
806};
1da177e4 807
4031bbe4
RK
808#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
809
1da177e4
LT
810int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
811
ebae41a5
BZ
812extern int ide_vlb_clk;
813extern int ide_pci_clk;
814
fe80b937
BZ
815ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
816
817static inline ide_hwif_t *ide_find_port(void)
818{
819 return ide_find_port_slot(NULL);
820}
821
1da177e4 822extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
823int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
824 int uptodate, int nr_sectors);
1da177e4 825
1da177e4
LT
826extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
827
cd2a2d96
BZ
828void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
829 ide_expiry_t *);
1da177e4 830
1fc14258
BZ
831void ide_execute_pkt_cmd(ide_drive_t *);
832
9f87abe8
BZ
833void ide_pad_transfer(ide_drive_t *, int, int);
834
1da177e4
LT
835ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
836
1da177e4
LT
837ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
838
1da177e4 839extern void ide_fix_driveid(struct hd_driveid *);
01745112 840
1da177e4
LT
841extern void ide_fixstring(u8 *, const int, const int);
842
74af21cf 843int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 844
1da177e4
LT
845extern ide_startstop_t ide_do_reset (ide_drive_t *);
846
63f5abb0 847extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
1da177e4 848
1da177e4
LT
849extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
850
9e42237f
BZ
851enum {
852 IDE_TFLAG_LBA48 = (1 << 0),
74095a91
BZ
853 IDE_TFLAG_FLAGGED = (1 << 2),
854 IDE_TFLAG_OUT_DATA = (1 << 3),
855 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
856 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
857 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
858 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
859 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
860 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
861 IDE_TFLAG_OUT_HOB_NSECT |
862 IDE_TFLAG_OUT_HOB_LBAL |
863 IDE_TFLAG_OUT_HOB_LBAM |
864 IDE_TFLAG_OUT_HOB_LBAH,
865 IDE_TFLAG_OUT_FEATURE = (1 << 9),
866 IDE_TFLAG_OUT_NSECT = (1 << 10),
867 IDE_TFLAG_OUT_LBAL = (1 << 11),
868 IDE_TFLAG_OUT_LBAM = (1 << 12),
869 IDE_TFLAG_OUT_LBAH = (1 << 13),
870 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
871 IDE_TFLAG_OUT_NSECT |
872 IDE_TFLAG_OUT_LBAL |
873 IDE_TFLAG_OUT_LBAM |
874 IDE_TFLAG_OUT_LBAH,
807e35d6 875 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 876 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ
877 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
878 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 879 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 880 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ
881 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
882 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
883 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
884 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
885 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
886 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
887 IDE_TFLAG_IN_HOB_LBAM |
888 IDE_TFLAG_IN_HOB_LBAH,
889 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
890 IDE_TFLAG_IN_HOB_NSECT |
891 IDE_TFLAG_IN_HOB_LBA,
92eb4380 892 IDE_TFLAG_IN_FEATURE = (1 << 1),
c2b57cdc
BZ
893 IDE_TFLAG_IN_NSECT = (1 << 25),
894 IDE_TFLAG_IN_LBAL = (1 << 26),
895 IDE_TFLAG_IN_LBAM = (1 << 27),
896 IDE_TFLAG_IN_LBAH = (1 << 28),
897 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
898 IDE_TFLAG_IN_LBAM |
899 IDE_TFLAG_IN_LBAH,
900 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
901 IDE_TFLAG_IN_LBA,
902 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ
903 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
904 IDE_TFLAG_IN_HOB,
905 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
906 IDE_TFLAG_IN_TF,
907 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
908 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH
909 /* force 16-bit I/O operations */
910 IDE_TFLAG_IO_16BIT = (1 << 30),
395d8ef5
BZ
911 /* ide_task_t was allocated using kmalloc() */
912 IDE_TFLAG_DYN = (1 << 31),
9e42237f
BZ
913};
914
650d841d
BZ
915struct ide_taskfile {
916 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
917
918 u8 hob_feature; /* 1-5: additional data to support LBA48 */
919 u8 hob_nsect;
920 u8 hob_lbal;
921 u8 hob_lbam;
922 u8 hob_lbah;
923
924 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
925
926 union { /*  7: */
927 u8 error; /* read: error */
928 u8 feature; /* write: feature */
929 };
930
931 u8 nsect; /* 8: number of sectors */
932 u8 lbal; /* 9: LBA low */
933 u8 lbam; /* 10: LBA mid */
934 u8 lbah; /* 11: LBA high */
935
936 u8 device; /* 12: device select */
937
938 union { /* 13: */
939 u8 status; /*  read: status  */
940 u8 command; /* write: command */
941 };
942};
943
1da177e4 944typedef struct ide_task_s {
650d841d
BZ
945 union {
946 struct ide_taskfile tf;
947 u8 tf_array[14];
948 };
866e2ec9 949 u32 tf_flags;
1da177e4 950 int data_phase;
1da177e4
LT
951 struct request *rq; /* copy of request */
952 void *special; /* valid_t generally */
953} ide_task_t;
954
089c5c7e 955void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4
LT
956
957extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 958void SELECT_MASK(ide_drive_t *, int);
1da177e4 959
92eb4380
BZ
960u8 ide_read_error(ide_drive_t *);
961
1da177e4 962extern int drive_is_ready(ide_drive_t *);
1da177e4 963
2fc57388
BZ
964void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
965
646c0cb6
BZ
966ide_startstop_t ide_pc_intr(ide_drive_t *drive, struct ide_atapi_pc *pc,
967 ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry,
968 void (*update_buffers)(ide_drive_t *, struct ide_atapi_pc *),
969 void (*retry_pc)(ide_drive_t *), void (*dsc_handle)(ide_drive_t *),
970 void (*io_buffers)(ide_drive_t *, struct ide_atapi_pc *, unsigned int,
971 int));
594c16d8
BZ
972ide_startstop_t ide_transfer_pc(ide_drive_t *, struct ide_atapi_pc *,
973 ide_handler_t *, unsigned int, ide_expiry_t *);
6bf1641c
BZ
974ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_atapi_pc *,
975 ide_handler_t *, unsigned int, ide_expiry_t *);
594c16d8 976
f6e29e35 977ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 978
4d7a984b
TH
979void task_end_request(ide_drive_t *, struct request *, u8);
980
ac026ff2 981int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
982int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
983
1da177e4
LT
984int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
985int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
986int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
987
1da177e4 988extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
989extern int ide_config_drive_speed(ide_drive_t *, u8);
990extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
991extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
992
993extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
994
1da177e4
LT
995extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
996
997extern int ide_spin_wait_hwgroup(ide_drive_t *);
998extern void ide_timer_expiry(unsigned long);
7d12e780 999extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1000extern void do_ide_request(struct request_queue *);
1da177e4
LT
1001
1002void ide_init_disk(struct gendisk *, ide_drive_t *);
1003
6d208b39 1004#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1005extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1006#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1007#else
1008#define ide_pci_register_driver(d) pci_register_driver(d)
1009#endif
1010
c97c6aca
BZ
1011void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
1012 u8 *, hw_regs_t *, hw_regs_t **);
85620436 1013void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1014
8e882ba1 1015#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1016int ide_pci_set_master(struct pci_dev *, const char *);
1017unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
81e8d5a3 1018extern const struct ide_dma_ops sff_dma_ops;
ebb00fb5 1019int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1020int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1021#else
b123f56e
BZ
1022static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1023 const struct ide_port_info *d)
1024{
1025 return -EINVAL;
1026}
c413b9b9
BZ
1027#endif
1028
1da177e4
LT
1029extern void default_hwif_iops(ide_hwif_t *);
1030extern void default_hwif_mmiops(ide_hwif_t *);
1031extern void default_hwif_transport(ide_hwif_t *);
1032
1da177e4
LT
1033typedef struct ide_pci_enablebit_s {
1034 u8 reg; /* byte pci reg holding the enable-bit */
1035 u8 mask; /* mask to isolate the enable-bit */
1036 u8 val; /* value of masked reg when "enabled" */
1037} ide_pci_enablebit_t;
1038
1039enum {
1040 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1041 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1042 /* single port device */
a5d8c5c8 1043 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1044 /* don't use legacy PIO blacklist */
1045 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1046 /* set for the second port of QD65xx */
1047 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1048 /* use PIO8/9 for prefetch off/on */
1049 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1050 /* use PIO6/7 for fast-devsel off/on */
1051 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1052 /* use 100-102 and 200-202 PIO values to set DMA modes */
1053 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1054 /*
1055 * keep DMA setting when programming PIO mode, may be used only
1056 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1057 */
1058 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1059 /* program host for the transfer mode after programming device */
1060 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1061 /* don't program host/device for the transfer mode ("smart" hosts) */
1062 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1063 /* trust BIOS for programming chipset/device for DMA */
1064 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1065 /* host is CS5510/CS5520 */
1066 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1067 /* ATAPI DMA is unsupported */
1068 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1069 /* set if host is a "non-bootable" controller */
1070 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1071 /* host doesn't support DMA */
1072 IDE_HFLAG_NO_DMA = (1 << 14),
1073 /* check if host is PCI IDE device before allowing DMA */
1074 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1075 /* host uses MMIO */
1076 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1077 /* no LBA48 */
1078 IDE_HFLAG_NO_LBA48 = (1 << 17),
1079 /* no LBA48 DMA */
1080 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1081 /* data FIFO is cleared by an error */
1082 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1083 /* serialize ports */
1084 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1085 /* use legacy IRQs */
1086 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1087 /* force use of legacy IRQs */
1088 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1089 /* limit LBA48 requests to 256 sectors */
1090 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1091 /* use 32-bit I/O ops */
1092 IDE_HFLAG_IO_32BIT = (1 << 24),
1093 /* unmask IRQs */
1094 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1095 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1fd18905
BZ
1096 /* serialize ports if DMA is possible (for sl82c105) */
1097 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1098 /* force host out of "simplex" mode */
1099 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1100 /* DSC overlap is unsupported */
1101 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1102 /* never use 32-bit I/O ops */
1103 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1104 /* never unmask IRQs */
1105 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
cafa027b
BZ
1106 /* host uses VDMA (disabled for now) */
1107 IDE_HFLAG_VDMA = 0,
1da177e4
LT
1108};
1109
7cab14a7 1110#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1111# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1112#else
1113# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1114#endif
1115
039788e1 1116struct ide_port_info {
1da177e4 1117 char *name;
1da177e4
LT
1118 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1119 void (*init_iops)(ide_hwif_t *);
1120 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1121 int (*init_dma)(ide_hwif_t *,
1122 const struct ide_port_info *);
ac95beed
BZ
1123
1124 const struct ide_port_ops *port_ops;
f37afdac 1125 const struct ide_dma_ops *dma_ops;
ac95beed 1126
1da177e4 1127 ide_pci_enablebit_t enablebits[2];
528a572d 1128 hwif_chipset_t chipset;
9ffcf364 1129 u32 host_flags;
4099d143 1130 u8 pio_mask;
5f8b6c34
BZ
1131 u8 swdma_mask;
1132 u8 mwdma_mask;
18137207 1133 u8 udma_mask;
039788e1 1134};
1da177e4 1135
85620436
BZ
1136int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1137int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1138
1139void ide_map_sg(ide_drive_t *, struct request *);
1140void ide_init_sg_cmd(ide_drive_t *, struct request *);
1141
1142#define BAD_DMA_DRIVE 0
1143#define GOOD_DMA_DRIVE 1
1144
65e5f2e3
JC
1145struct drive_list_entry {
1146 const char *id_model;
1147 const char *id_firmware;
1148};
1149
1150int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1151
1152#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1153int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1154int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1155
1156u8 ide_find_dma_mode(ide_drive_t *, u8);
1157
1158static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1159{
1160 return ide_find_dma_mode(drive, XFER_UDMA_6);
1161}
1162
4a546e04 1163void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1164void ide_dma_off(ide_drive_t *);
4a546e04 1165void ide_dma_on(ide_drive_t *);
3608b5d7 1166int ide_set_dma(ide_drive_t *);
578cfa0d 1167void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1168ide_startstop_t ide_dma_intr(ide_drive_t *);
1169
062f9f02
BZ
1170int ide_build_sglist(ide_drive_t *, struct request *);
1171void ide_destroy_dmatable(ide_drive_t *);
1172
8e882ba1 1173#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1174extern int ide_build_dmatable(ide_drive_t *, struct request *);
b8e73fba
BZ
1175int ide_allocate_dma_engine(ide_hwif_t *);
1176void ide_release_dma_engine(ide_hwif_t *);
1da177e4 1177
15ce926a 1178void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1179extern int ide_dma_setup(ide_drive_t *);
f37afdac 1180void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4
LT
1181extern void ide_dma_start(ide_drive_t *);
1182extern int __ide_dma_end(ide_drive_t *);
f37afdac 1183int ide_dma_test_irq(ide_drive_t *);
841d2a9b 1184extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1185extern void ide_dma_timeout(ide_drive_t *);
8e882ba1 1186#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT
1187
1188#else
3ab7efe8 1189static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1190static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1191static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1192static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1193static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1194static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1195static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1196static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1197static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT
1198#endif /* CONFIG_BLK_DEV_IDEDMA */
1199
8e882ba1 1200#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
0d1bad21 1201static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1da177e4
LT
1202#endif
1203
e3a59b4d
HR
1204#ifdef CONFIG_BLK_DEV_IDEACPI
1205extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1206extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1207extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1208extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1209void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1210extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1211#else
1212static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1213static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1214static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1215static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1216static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1217static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1218#endif
1219
fbd13088 1220void ide_remove_port_from_hwgroup(ide_hwif_t *);
387750c3 1221void ide_unregister(ide_hwif_t *);
1da177e4
LT
1222
1223void ide_register_region(struct gendisk *);
1224void ide_unregister_region(struct gendisk *);
1225
f01393e4 1226void ide_undecoded_slave(ide_drive_t *);
1da177e4 1227
9fd91d95
BZ
1228void ide_port_apply_params(ide_hwif_t *);
1229
c97c6aca
BZ
1230int ide_device_add_all(u8 *, const struct ide_port_info *, hw_regs_t **);
1231int ide_device_add(u8 *, const struct ide_port_info *, hw_regs_t **);
0bfeee7d 1232int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1233void ide_port_unregister_devices(ide_hwif_t *);
1234void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1235
1236static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1237{
1238 return hwif->hwif_data;
1239}
1240
1241static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1242{
1243 hwif->hwif_data = data;
1244}
1245
3ab7efe8 1246const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1247extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1248extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1249
2229833c
BZ
1250static inline int ide_dev_has_iordy(struct hd_driveid *id)
1251{
1252 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1253}
1254
6c3c22f3
SS
1255static inline int ide_dev_is_sata(struct hd_driveid *id)
1256{
1257 /*
1258 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1259 * verifying that word 80 by casting it to a signed type --
1260 * this trick allows us to filter out the reserved values of
1261 * 0x0000 and 0xffff along with the earlier ATA revisions...
1262 */
1263 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1264 return 1;
1265 return 0;
1266}
1267
a501633c 1268u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1269u8 ide_dump_status(ide_drive_t *, const char *, u8);
1270
3be53f3f
BZ
1271struct ide_timing {
1272 u8 mode;
1273 u8 setup; /* t1 */
1274 u16 act8b; /* t2 for 8-bit io */
1275 u16 rec8b; /* t2i for 8-bit io */
1276 u16 cyc8b; /* t0 for 8-bit io */
1277 u16 active; /* t2 or tD */
1278 u16 recover; /* t2i or tK */
1279 u16 cycle; /* t0 */
1280 u16 udma; /* t2CYCTYP/2 */
1281};
1282
1283enum {
1284 IDE_TIMING_SETUP = (1 << 0),
1285 IDE_TIMING_ACT8B = (1 << 1),
1286 IDE_TIMING_REC8B = (1 << 2),
1287 IDE_TIMING_CYC8B = (1 << 3),
1288 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1289 IDE_TIMING_CYC8B,
1290 IDE_TIMING_ACTIVE = (1 << 4),
1291 IDE_TIMING_RECOVER = (1 << 5),
1292 IDE_TIMING_CYCLE = (1 << 6),
1293 IDE_TIMING_UDMA = (1 << 7),
1294 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1295 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1296 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1297};
1298
f06ab340 1299struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1300u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1301void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1302 struct ide_timing *, unsigned int);
1303int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1304
9ad54093
BZ
1305int ide_scan_pio_blacklist(char *);
1306
2134758d 1307u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4 1308
88b2b32b
BZ
1309int ide_set_pio_mode(ide_drive_t *, u8);
1310int ide_set_dma_mode(ide_drive_t *, u8);
1311
26bcb879
BZ
1312void ide_set_pio(ide_drive_t *, u8);
1313
1314static inline void ide_set_max_pio(ide_drive_t *drive)
1315{
1316 ide_set_pio(drive, 255);
1317}
1da177e4
LT
1318
1319extern spinlock_t ide_lock;
ef29888e 1320extern struct mutex ide_cfg_mtx;
1da177e4
LT
1321/*
1322 * Structure locking:
1323 *
ef29888e 1324 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1325 * ide_hwif_t->{next,hwgroup}
1326 * ide_drive_t->next
1327 *
1328 * ide_hwgroup_t->busy: ide_lock
1329 * ide_hwgroup_t->hwif: ide_lock
1330 * ide_hwif_t->mate: constant, no locking
1331 * ide_drive_t->hwif: constant, no locking
1332 */
1333
366c7f55 1334#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1335
1336extern struct bus_type ide_bus_type;
f74c9141 1337extern struct class *ide_port_class;
1da177e4
LT
1338
1339/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1340#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1341
1342/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1343#define ide_id_has_flush_cache_ext(id) \
1344 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1345
7b9f25b5
BZ
1346static inline void ide_dump_identify(u8 *id)
1347{
1348 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1349}
1350
86b37860
CL
1351static inline int hwif_to_node(ide_hwif_t *hwif)
1352{
36501650 1353 struct pci_dev *dev = to_pci_dev(hwif->dev);
1f07e988 1354 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
86b37860
CL
1355}
1356
1b678347
BH
1357static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1358{
1359 ide_hwif_t *hwif = HWIF(drive);
1360
1361 return &hwif->drives[(drive->dn ^ 1) & 1];
1362}
1da177e4 1363#endif /* _IDE_H */