libata: rename SFF functions
[linux-2.6-block.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
e3a59b4d
HR
20#ifdef CONFIG_BLK_DEV_IDEACPI
21#include <acpi/acpi.h>
22#endif
1da177e4
LT
23#include <asm/byteorder.h>
24#include <asm/system.h>
25#include <asm/io.h>
26#include <asm/semaphore.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
729d4de9 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
35/*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40#define IDE_NO_IRQ (-1)
41
1da177e4
LT
42typedef unsigned char byte; /* used everywhere */
43
44/*
45 * Probably not wise to fiddle with these
46 */
47#define ERROR_MAX 8 /* Max read/write errors per sector */
48#define ERROR_RESET 3 /* Reset controller every 4th retry */
49#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51/*
52 * Tune flags
53 */
54#define IDE_TUNE_NOAUTO 2
55#define IDE_TUNE_AUTO 1
56#define IDE_TUNE_DEFAULT 0
57
58/*
59 * state flags
60 */
61
62#define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67/*
68 * Definitions for accessing IDE controller registers
69 */
70#define IDE_NR_PORTS (10)
71
72#define IDE_DATA_OFFSET (0)
73#define IDE_ERROR_OFFSET (1)
74#define IDE_NSECTOR_OFFSET (2)
75#define IDE_SECTOR_OFFSET (3)
76#define IDE_LCYL_OFFSET (4)
77#define IDE_HCYL_OFFSET (5)
78#define IDE_SELECT_OFFSET (6)
79#define IDE_STATUS_OFFSET (7)
80#define IDE_CONTROL_OFFSET (8)
81#define IDE_IRQ_OFFSET (9)
82
83#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
1da177e4
LT
86#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97#define IDE_FEATURE_REG IDE_ERROR_REG
98#define IDE_COMMAND_REG IDE_STATUS_REG
99#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100#define IDE_IREASON_REG IDE_NSECTOR_REG
101#define IDE_BCOUNTL_REG IDE_LCYL_REG
102#define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108#define DRIVE_READY (READY_STAT | SEEK_STAT)
1da177e4
LT
109
110#define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112#define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114#define SATA_STATUS_OFFSET (0)
1da177e4 115#define SATA_ERROR_OFFSET (1)
1da177e4 116#define SATA_CONTROL_OFFSET (2)
1da177e4 117
1da177e4
LT
118/*
119 * Our Physical Region Descriptor (PRD) table should be large enough
120 * to handle the biggest I/O request we are likely to see. Since requests
121 * can have no more than 256 sectors, and since the typical blocksize is
122 * two or more sectors, we could get by with a limit of 128 entries here for
123 * the usual worst case. Most requests seem to include some contiguous blocks,
124 * further reducing the number of table entries required.
125 *
126 * The driver reverts to PIO mode for individual requests that exceed
127 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
128 * 100% of all crazy scenarios here is not necessary.
129 *
130 * As it turns out though, we must allocate a full 4KB page for this,
131 * so the two PRD tables (ide0 & ide1) will each get half of that,
132 * allowing each to have about 256 entries (8 bytes each) from this.
133 */
134#define PRD_BYTES 8
135#define PRD_ENTRIES 256
136
137/*
138 * Some more useful definitions
139 */
140#define PARTN_BITS 6 /* number of minor dev bits for partitions */
141#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
142#define SECTOR_SIZE 512
143#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
144#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
145
146/*
147 * Timeouts for various operations:
148 */
149#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
150#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
151#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
152#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
153#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
154#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
155
1da177e4
LT
156/*
157 * Check for an interrupt and acknowledge the interrupt status
158 */
159struct hwif_s;
160typedef int (ide_ack_intr_t)(struct hwif_s *);
161
1da177e4
LT
162/*
163 * hwif_chipset_t is used to keep track of the specific hardware
164 * chipset used by each IDE interface, if known.
165 */
528a572d 166enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
167 ide_cmd640, ide_dtc2278, ide_ali14xx,
168 ide_qd65xx, ide_umc8672, ide_ht6560b,
169 ide_rz1000, ide_trm290,
170 ide_cmd646, ide_cy82c693, ide_4drives,
171 ide_pmac, ide_etrax100, ide_acorn,
7c7e92a9 172 ide_au1xxx, ide_palm3710, ide_forced
528a572d
BZ
173};
174
175typedef u8 hwif_chipset_t;
1da177e4
LT
176
177/*
178 * Structure to hold all information about the location of this port
179 */
180typedef struct hw_regs_s {
181 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
182 int irq; /* our irq number */
1da177e4
LT
183 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
184 hwif_chipset_t chipset;
4349d5cd 185 struct device *dev;
1da177e4
LT
186} hw_regs_t;
187
baa8f3e9 188struct hwif_s * ide_find_port(unsigned long);
9e016a71 189struct hwif_s *ide_deprecated_find_port(unsigned long);
cbb010c1 190void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 191void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 192
f01393e4 193struct ide_drive_s;
cbb010c1 194int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
fd9bb539 195 struct hwif_s **);
1da177e4 196
1da177e4
LT
197static inline void ide_std_init_ports(hw_regs_t *hw,
198 unsigned long io_addr,
199 unsigned long ctl_addr)
200{
201 unsigned int i;
202
203 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
204 hw->io_ports[i] = io_addr++;
205
206 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
207}
208
209#include <asm/ide.h>
210
83d7dbc4
MM
211#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
212#undef MAX_HWIFS
83ae20c8
BH
213#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
214#endif
215
1da177e4
LT
216/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
217#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
218# define ide_default_io_base(index) (0)
219# define ide_default_irq(base) (0)
220# define ide_init_default_irq(base) (0)
221#endif
222
847ddd2b 223#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
1da177e4
LT
224static inline void ide_init_hwif_ports(hw_regs_t *hw,
225 unsigned long io_addr,
226 unsigned long ctl_addr,
227 int *irq)
228{
229 if (!ctl_addr)
230 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
231 else
232 ide_std_init_ports(hw, io_addr, ctl_addr);
233
234 if (irq)
235 *irq = 0;
236
237 hw->io_ports[IDE_IRQ_OFFSET] = 0;
238
239#ifdef CONFIG_PPC32
240 if (ppc_ide_md.ide_init_hwif)
241 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
242#endif
243}
244#else
245static inline void ide_init_hwif_ports(hw_regs_t *hw,
246 unsigned long io_addr,
247 unsigned long ctl_addr,
248 int *irq)
249{
250 if (io_addr || ctl_addr)
251 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
252}
847ddd2b 253#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
1da177e4
LT
254
255/* Currently only m68k, apus and m8xx need it */
256#ifndef IDE_ARCH_ACK_INTR
257# define ide_ack_intr(hwif) (1)
258#endif
259
260/* Currently only Atari needs it */
261#ifndef IDE_ARCH_LOCK
262# define ide_release_lock() do {} while (0)
263# define ide_get_lock(hdlr, data) do {} while (0)
264#endif /* IDE_ARCH_LOCK */
265
266/*
267 * Now for the data we need to maintain per-drive: ide_drive_t
268 */
269
270#define ide_scsi 0x21
271#define ide_disk 0x20
272#define ide_optical 0x7
273#define ide_cdrom 0x5
274#define ide_tape 0x1
275#define ide_floppy 0x0
276
277/*
278 * Special Driver Flags
279 *
280 * set_geometry : respecify drive geometry
281 * recalibrate : seek to cyl 0
282 * set_multmode : set multmode count
283 * set_tune : tune interface for drive
284 * serviced : service command
285 * reserved : unused
286 */
287typedef union {
288 unsigned all : 8;
289 struct {
1da177e4
LT
290 unsigned set_geometry : 1;
291 unsigned recalibrate : 1;
292 unsigned set_multmode : 1;
293 unsigned set_tune : 1;
294 unsigned serviced : 1;
295 unsigned reserved : 3;
1da177e4
LT
296 } b;
297} special_t;
298
1da177e4
LT
299/*
300 * ATA-IDE Select Register, aka Device-Head
301 *
302 * head : always zeros here
303 * unit : drive select number: 0/1
304 * bit5 : always 1
305 * lba : using LBA instead of CHS
306 * bit7 : always 1
307 */
308typedef union {
309 unsigned all : 8;
310 struct {
311#if defined(__LITTLE_ENDIAN_BITFIELD)
312 unsigned head : 4;
313 unsigned unit : 1;
314 unsigned bit5 : 1;
315 unsigned lba : 1;
316 unsigned bit7 : 1;
317#elif defined(__BIG_ENDIAN_BITFIELD)
318 unsigned bit7 : 1;
319 unsigned lba : 1;
320 unsigned bit5 : 1;
321 unsigned unit : 1;
322 unsigned head : 4;
323#else
324#error "Please fix <asm/byteorder.h>"
325#endif
326 } b;
327} select_t, ata_select_t;
328
1da177e4
LT
329/*
330 * Status returned from various ide_ functions
331 */
332typedef enum {
333 ide_stopped, /* no drive operation was started */
334 ide_started, /* a drive operation was started, handler was set */
335} ide_startstop_t;
336
337struct ide_driver_s;
338struct ide_settings_s;
339
e3a59b4d
HR
340#ifdef CONFIG_BLK_DEV_IDEACPI
341struct ide_acpi_drive_link;
342struct ide_acpi_hwif_link;
343#endif
344
1da177e4
LT
345typedef struct ide_drive_s {
346 char name[4]; /* drive name, such as "hda" */
347 char driver_req[10]; /* requests specific driver */
348
165125e1 349 struct request_queue *queue; /* request queue */
1da177e4
LT
350
351 struct request *rq; /* current request */
352 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
353 void *driver_data; /* extra driver data */
354 struct hd_driveid *id; /* drive model identification info */
7662d046 355#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
356 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
357 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 358#endif
1da177e4
LT
359 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
360
361 unsigned long sleep; /* sleep until this time */
362 unsigned long service_start; /* time we started last request */
363 unsigned long service_time; /* service time of last request */
364 unsigned long timeout; /* max time to wait for irq */
365
366 special_t special; /* special action flags */
367 select_t select; /* basic drive/head select reg value */
368
369 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT
370 u8 using_dma; /* disk is using dma for read/write */
371 u8 retry_pio; /* retrying dma capable host in pio */
372 u8 state; /* retry state */
373 u8 waiting_for_dma; /* dma currently in progress */
374 u8 unmask; /* okay to unmask other irqs */
36193484 375 u8 noflush; /* don't attempt flushes */
1da177e4
LT
376 u8 dsc_overlap; /* DSC overlap */
377 u8 nice1; /* give potential excess bandwidth */
378
379 unsigned present : 1; /* drive is physically present */
380 unsigned dead : 1; /* device ejected hint */
381 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
382 unsigned noprobe : 1; /* from: hdx=noprobe */
383 unsigned removable : 1; /* 1 if need to do check_media_change */
384 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
385 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
386 unsigned no_unmask : 1; /* disallow setting unmask bit */
387 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
388 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
1da177e4 389 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 390 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT
391 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
392 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
393 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
394 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
395 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
396 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
397 unsigned post_reset : 1;
7f8f48af 398 unsigned udma33_warned : 1;
1da177e4 399
1497943e 400 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
401 u8 quirk_list; /* considered quirky, set for a specific host */
402 u8 init_speed; /* transfer rate set at boot */
1da177e4 403 u8 current_speed; /* current transfer rate set */
513daadd 404 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
405 u8 dn; /* now wide spread use */
406 u8 wcache; /* status of write cache */
407 u8 acoustic; /* acoustic management */
408 u8 media; /* disk, cdrom, tape, floppy, ... */
409 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
410 u8 ready_stat; /* min status value for drive ready */
411 u8 mult_count; /* current multiple sector setting */
412 u8 mult_req; /* requested multiple sector setting */
413 u8 tune_req; /* requested drive tuning setting */
414 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
415 u8 bad_wstat; /* used for ignoring WRERR_STAT */
416 u8 nowerr; /* used for ignoring WRERR_STAT */
417 u8 sect0; /* offset of first sector for DM6:DDO */
418 u8 head; /* "real" number of heads */
419 u8 sect; /* "real" sectors per track */
420 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
421 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
422
423 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
424 unsigned int cyl; /* "real" number of cyls */
26bcb879 425 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
426 unsigned int failures; /* current failure count */
427 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 428 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
429
430 u64 capacity64; /* total number of sectors */
431
432 int lun; /* logical unit */
433 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
434#ifdef CONFIG_BLK_DEV_IDEACPI
435 struct ide_acpi_drive_link *acpidata;
436#endif
1da177e4
LT
437 struct list_head list;
438 struct device gendev;
f36d4024 439 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
440} ide_drive_t;
441
8604affd
BZ
442#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
443
1da177e4
LT
444#define IDE_CHIPSET_PCI_MASK \
445 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
446#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
447
039788e1 448struct ide_port_info;
1da177e4
LT
449
450typedef struct hwif_s {
451 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
452 struct hwif_s *mate; /* other hwif from same PCI chip */
453 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
454 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
455
456 char name[6]; /* name of interface, eg. "ide0" */
457
458 /* task file registers for pata and sata */
459 unsigned long io_ports[IDE_NR_PORTS];
460 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 461
1da177e4
LT
462 ide_drive_t drives[MAX_DRIVES]; /* drive info */
463
464 u8 major; /* our major number */
465 u8 index; /* 0 for ide0; 1 for ide1; ... */
466 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4
LT
467 u8 bus_state; /* power state of the IDE bus */
468
e95d9c6b 469 u32 host_flags;
6a824c92 470
4099d143
BZ
471 u8 pio_mask;
472
1da177e4
LT
473 u8 ultra_mask;
474 u8 mwdma_mask;
475 u8 swdma_mask;
476
49521f97
BZ
477 u8 cbl; /* cable type */
478
1da177e4
LT
479 hwif_chipset_t chipset; /* sub-module for tuning.. */
480
36501650
BZ
481 struct device *dev;
482
85620436 483 const struct ide_port_info *cds; /* chipset device struct */
1da177e4 484
18e181fe
BZ
485 ide_ack_intr_t *ack_intr;
486
1da177e4
LT
487 void (*rw_disk)(ide_drive_t *, struct request *);
488
489#if 0
490 ide_hwif_ops_t *hwifops;
491#else
1f2cf8b0
BZ
492 /* host specific initialization of devices on a port */
493 void (*port_init_devs)(struct hwif_s *);
88b2b32b 494 /* routine to program host for PIO mode */
26bcb879 495 void (*set_pio_mode)(ide_drive_t *, const u8);
88b2b32b
BZ
496 /* routine to program host for DMA mode */
497 void (*set_dma_mode)(ide_drive_t *, const u8);
1da177e4
LT
498 /* tweaks hardware to select drive */
499 void (*selectproc)(ide_drive_t *);
500 /* chipset polling based on hba specifics */
501 int (*reset_poll)(ide_drive_t *);
502 /* chipset specific changes to default for device-hba resets */
503 void (*pre_reset)(ide_drive_t *);
504 /* routine to reset controller after a disk reset */
505 void (*resetproc)(ide_drive_t *);
1da177e4
LT
506 /* special host masking for drive selection */
507 void (*maskproc)(ide_drive_t *, int);
508 /* check host's drive quirk list */
f01393e4 509 void (*quirkproc)(ide_drive_t *);
1da177e4
LT
510 /* driver soft-power interface */
511 int (*busproc)(ide_drive_t *, int);
1da177e4 512#endif
b4e44369 513 u8 (*mdma_filter)(ide_drive_t *);
2d5eaa6d 514 u8 (*udma_filter)(ide_drive_t *);
1da177e4 515
bfa14b42
BZ
516 u8 (*cable_detect)(struct hwif_s *);
517
1da177e4
LT
518 void (*ata_input_data)(ide_drive_t *, void *, u32);
519 void (*ata_output_data)(ide_drive_t *, void *, u32);
520
521 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
522 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
523
15ce926a 524 void (*dma_host_set)(ide_drive_t *, int);
1da177e4
LT
525 int (*dma_setup)(ide_drive_t *);
526 void (*dma_exec_cmd)(ide_drive_t *, u8);
527 void (*dma_start)(ide_drive_t *);
528 int (*ide_dma_end)(ide_drive_t *drive);
1da177e4 529 int (*ide_dma_test_irq)(ide_drive_t *drive);
f0dd8712 530 void (*ide_dma_clear_irq)(ide_drive_t *drive);
841d2a9b 531 void (*dma_lost_irq)(ide_drive_t *drive);
c283f5db 532 void (*dma_timeout)(ide_drive_t *drive);
1da177e4
LT
533
534 void (*OUTB)(u8 addr, unsigned long port);
535 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
536 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT
537 void (*OUTSW)(unsigned long port, void *addr, u32 count);
538 void (*OUTSL)(unsigned long port, void *addr, u32 count);
539
540 u8 (*INB)(unsigned long port);
541 u16 (*INW)(unsigned long port);
1da177e4
LT
542 void (*INSW)(unsigned long port, void *addr, u32 count);
543 void (*INSL)(unsigned long port, void *addr, u32 count);
544
545 /* dma physical region descriptor table (cpu view) */
546 unsigned int *dmatable_cpu;
547 /* dma physical region descriptor table (dma view) */
548 dma_addr_t dmatable_dma;
549 /* Scatter-gather list used to build the above */
550 struct scatterlist *sg_table;
551 int sg_max_nents; /* Maximum number of entries in it */
552 int sg_nents; /* Current number of entries in it */
553 int sg_dma_direction; /* dma transfer direction */
554
555 /* data phase of the active command (currently only valid for PIO/DMA) */
556 int data_phase;
557
558 unsigned int nsect;
559 unsigned int nleft;
55c16a70 560 struct scatterlist *cursg;
1da177e4
LT
561 unsigned int cursg_ofs;
562
1da177e4
LT
563 int rqsize; /* max sectors per request */
564 int irq; /* our irq number */
565
1da177e4
LT
566 unsigned long dma_base; /* base addr for dma ports */
567 unsigned long dma_command; /* dma command register */
568 unsigned long dma_vendor1; /* dma vendor 1 register */
569 unsigned long dma_status; /* dma status register */
570 unsigned long dma_vendor3; /* dma vendor 3 register */
571 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 572
1da177e4
LT
573 unsigned long config_data; /* for use by chipset-specific code */
574 unsigned long select_data; /* for use by chipset-specific code */
575
020e322d
SS
576 unsigned long extra_base; /* extra addr for dma ports */
577 unsigned extra_ports; /* number of extra dma ports */
578
1da177e4
LT
579 unsigned noprobe : 1; /* don't probe for this interface */
580 unsigned present : 1; /* this interface exists */
581 unsigned hold : 1; /* this interface is always present */
582 unsigned serialized : 1; /* serialized all channel operation */
583 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
584 unsigned reset : 1; /* reset after probe */
1da177e4 585 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
2ad1e558 586 unsigned mmio : 1; /* host uses MMIO */
b034304a 587 unsigned straight8 : 1; /* Alan's straight 8 check */
1da177e4
LT
588
589 struct device gendev;
f36d4024 590 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
591
592 void *hwif_data; /* extra hwif data */
593
594 unsigned dma;
e3a59b4d
HR
595
596#ifdef CONFIG_BLK_DEV_IDEACPI
597 struct ide_acpi_hwif_link *acpidata;
598#endif
22fc6ecc 599} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
600
601/*
602 * internal ide interrupt handler type
603 */
1da177e4
LT
604typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
605typedef int (ide_expiry_t)(ide_drive_t *);
606
0eea6458
BP
607/* used by ide-cd, ide-floppy, etc. */
608typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
609
1da177e4
LT
610typedef struct hwgroup_s {
611 /* irq handler, if active */
612 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 613
1da177e4
LT
614 /* BOOL: protects all fields below */
615 volatile int busy;
616 /* BOOL: wake us up on timer expiry */
617 unsigned int sleeping : 1;
618 /* BOOL: polling active & poll_timeout field valid */
619 unsigned int polling : 1;
913759ac
AC
620 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
621 unsigned int resetting : 1;
622
1da177e4
LT
623 /* current drive */
624 ide_drive_t *drive;
625 /* ptr to current hwif in linked-list */
626 ide_hwif_t *hwif;
627
1da177e4
LT
628 /* current request */
629 struct request *rq;
a6fbb1c8 630
1da177e4
LT
631 /* failsafe timer */
632 struct timer_list timer;
1da177e4
LT
633 /* timeout value during long polls */
634 unsigned long poll_timeout;
635 /* queried upon timeouts */
636 int (*expiry)(ide_drive_t *);
a6fbb1c8 637
23450319
SS
638 int req_gen;
639 int req_gen_timer;
1da177e4
LT
640} ide_hwgroup_t;
641
7662d046
BZ
642typedef struct ide_driver_s ide_driver_t;
643
f9383c42 644extern struct mutex ide_setting_mtx;
1da177e4 645
7662d046
BZ
646int set_io_32bit(ide_drive_t *, int);
647int set_pio_mode(ide_drive_t *, int);
648int set_using_dma(ide_drive_t *, int);
649
650#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
651/*
652 * configurable drive settings
653 */
654
655#define TYPE_INT 0
1497943e
BZ
656#define TYPE_BYTE 1
657#define TYPE_SHORT 2
1da177e4
LT
658
659#define SETTING_READ (1 << 0)
660#define SETTING_WRITE (1 << 1)
661#define SETTING_RW (SETTING_READ | SETTING_WRITE)
662
663typedef int (ide_procset_t)(ide_drive_t *, int);
664typedef struct ide_settings_s {
665 char *name;
666 int rw;
1da177e4
LT
667 int data_type;
668 int min;
669 int max;
670 int mul_factor;
671 int div_factor;
672 void *data;
673 ide_procset_t *set;
674 int auto_remove;
675 struct ide_settings_s *next;
676} ide_settings_t;
677
1497943e 678int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
679
680/*
681 * /proc/ide interface
682 */
683typedef struct {
684 const char *name;
685 mode_t mode;
686 read_proc_t *read_proc;
687 write_proc_t *write_proc;
688} ide_proc_entry_t;
689
ecfd80e4
BZ
690void proc_ide_create(void);
691void proc_ide_destroy(void);
5cbf79cd 692void ide_proc_register_port(ide_hwif_t *);
d9270a3f 693void ide_proc_port_register_devices(ide_hwif_t *);
5cbf79cd 694void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
695void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
696void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
697
698void ide_add_generic_settings(ide_drive_t *);
699
1da177e4
LT
700read_proc_t proc_ide_read_capacity;
701read_proc_t proc_ide_read_geometry;
702
703#ifdef CONFIG_BLK_DEV_IDEPCI
704void ide_pci_create_host_proc(const char *, get_info_t *);
705#endif
706
707/*
708 * Standard exit stuff:
709 */
710#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
711{ \
712 len -= off; \
713 if (len < count) { \
714 *eof = 1; \
715 if (len <= 0) \
716 return 0; \
717 } else \
718 len = count; \
719 *start = page + off; \
720 return len; \
721}
722#else
ecfd80e4
BZ
723static inline void proc_ide_create(void) { ; }
724static inline void proc_ide_destroy(void) { ; }
5cbf79cd 725static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 726static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5cbf79cd 727static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
728static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
729static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
730static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
731#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
732#endif
733
734/*
735 * Power Management step value (rq->pm->pm_step).
736 *
737 * The step value starts at 0 (ide_pm_state_start_suspend) for a
738 * suspend operation or 1000 (ide_pm_state_start_resume) for a
739 * resume operation.
740 *
741 * For each step, the core calls the subdriver start_power_step() first.
742 * This can return:
743 * - ide_stopped : In this case, the core calls us back again unless
744 * step have been set to ide_power_state_completed.
745 * - ide_started : In this case, the channel is left busy until an
746 * async event (interrupt) occurs.
747 * Typically, start_power_step() will issue a taskfile request with
748 * do_rw_taskfile().
749 *
750 * Upon reception of the interrupt, the core will call complete_power_step()
751 * with the error code if any. This routine should update the step value
752 * and return. It should not start a new request. The core will call
753 * start_power_step for the new step value, unless step have been set to
754 * ide_power_state_completed.
755 *
756 * Subdrivers are expected to define their own additional power
757 * steps from 1..999 for suspend and from 1001..1999 for resume,
758 * other values are reserved for future use.
759 */
760
761enum {
762 ide_pm_state_completed = -1,
763 ide_pm_state_start_suspend = 0,
764 ide_pm_state_start_resume = 1000,
765};
766
767/*
768 * Subdrivers support.
4ef3b8f4
LR
769 *
770 * The gendriver.owner field should be set to the module owner of this driver.
771 * The gendriver.name field should be set to the name of this driver
1da177e4 772 */
7662d046 773struct ide_driver_s {
1da177e4
LT
774 const char *version;
775 u8 media;
1da177e4 776 unsigned supports_dsc_overlap : 1;
1da177e4
LT
777 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
778 int (*end_request)(ide_drive_t *, int, int);
779 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
780 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 781 struct device_driver gen_driver;
4031bbe4
RK
782 int (*probe)(ide_drive_t *);
783 void (*remove)(ide_drive_t *);
0d2157f7 784 void (*resume)(ide_drive_t *);
4031bbe4 785 void (*shutdown)(ide_drive_t *);
7662d046
BZ
786#ifdef CONFIG_IDE_PROC_FS
787 ide_proc_entry_t *proc;
788#endif
789};
1da177e4 790
4031bbe4
RK
791#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
792
1da177e4
LT
793int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
794
795/*
796 * ide_hwifs[] is the master data structure used to keep track
797 * of just about everything in ide.c. Whenever possible, routines
798 * should be using pointers to a drive (ide_drive_t *) or
799 * pointers to a hwif (ide_hwif_t *), rather than indexing this
800 * structure directly (the allocation/layout may change!).
801 *
802 */
803#ifndef _IDE_C
804extern ide_hwif_t ide_hwifs[]; /* master data repository */
805#endif
806extern int noautodma;
807
808extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
809int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
810 int uptodate, int nr_sectors);
1da177e4 811
1da177e4
LT
812extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
813
cd2a2d96
BZ
814void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
815 ide_expiry_t *);
1da177e4
LT
816
817ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
818
1da177e4
LT
819ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
820
821ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
822
1da177e4
LT
823extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
824
825extern void ide_fix_driveid(struct hd_driveid *);
01745112 826
1da177e4
LT
827extern void ide_fixstring(u8 *, const int, const int);
828
74af21cf 829int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 830
1da177e4
LT
831extern ide_startstop_t ide_do_reset (ide_drive_t *);
832
1da177e4
LT
833extern void ide_init_drive_cmd (struct request *rq);
834
1da177e4
LT
835/*
836 * "action" parameter type for ide_do_drive_cmd() below.
837 */
838typedef enum {
839 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT
840 ide_preempt, /* insert rq in front of current request */
841 ide_head_wait, /* insert rq in front of current request and wait for it */
842 ide_end /* insert rq at end of list, but don't wait for it */
843} ide_action_t;
844
1da177e4
LT
845extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
846
1da177e4
LT
847extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
848
9e42237f
BZ
849enum {
850 IDE_TFLAG_LBA48 = (1 << 0),
851 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ
852 IDE_TFLAG_FLAGGED = (1 << 2),
853 IDE_TFLAG_OUT_DATA = (1 << 3),
854 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
855 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
856 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
857 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
858 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
859 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
860 IDE_TFLAG_OUT_HOB_NSECT |
861 IDE_TFLAG_OUT_HOB_LBAL |
862 IDE_TFLAG_OUT_HOB_LBAM |
863 IDE_TFLAG_OUT_HOB_LBAH,
864 IDE_TFLAG_OUT_FEATURE = (1 << 9),
865 IDE_TFLAG_OUT_NSECT = (1 << 10),
866 IDE_TFLAG_OUT_LBAL = (1 << 11),
867 IDE_TFLAG_OUT_LBAM = (1 << 12),
868 IDE_TFLAG_OUT_LBAH = (1 << 13),
869 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
870 IDE_TFLAG_OUT_NSECT |
871 IDE_TFLAG_OUT_LBAL |
872 IDE_TFLAG_OUT_LBAM |
873 IDE_TFLAG_OUT_LBAH,
807e35d6 874 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 875 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ
876 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
877 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 878 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 879 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ
880 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
881 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
882 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
883 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
884 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
885 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
886 IDE_TFLAG_IN_HOB_LBAM |
887 IDE_TFLAG_IN_HOB_LBAH,
888 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
889 IDE_TFLAG_IN_HOB_NSECT |
890 IDE_TFLAG_IN_HOB_LBA,
891 IDE_TFLAG_IN_NSECT = (1 << 25),
892 IDE_TFLAG_IN_LBAL = (1 << 26),
893 IDE_TFLAG_IN_LBAM = (1 << 27),
894 IDE_TFLAG_IN_LBAH = (1 << 28),
895 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
896 IDE_TFLAG_IN_LBAM |
897 IDE_TFLAG_IN_LBAH,
898 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
899 IDE_TFLAG_IN_LBA,
900 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ
901 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
902 IDE_TFLAG_IN_HOB,
903 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
904 IDE_TFLAG_IN_TF,
905 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
906 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH
907 /* force 16-bit I/O operations */
908 IDE_TFLAG_IO_16BIT = (1 << 30),
395d8ef5
BZ
909 /* ide_task_t was allocated using kmalloc() */
910 IDE_TFLAG_DYN = (1 << 31),
9e42237f
BZ
911};
912
650d841d
BZ
913struct ide_taskfile {
914 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
915
916 u8 hob_feature; /* 1-5: additional data to support LBA48 */
917 u8 hob_nsect;
918 u8 hob_lbal;
919 u8 hob_lbam;
920 u8 hob_lbah;
921
922 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
923
924 union { /*  7: */
925 u8 error; /* read: error */
926 u8 feature; /* write: feature */
927 };
928
929 u8 nsect; /* 8: number of sectors */
930 u8 lbal; /* 9: LBA low */
931 u8 lbam; /* 10: LBA mid */
932 u8 lbah; /* 11: LBA high */
933
934 u8 device; /* 12: device select */
935
936 union { /* 13: */
937 u8 status; /*  read: status  */
938 u8 command; /* write: command */
939 };
940};
941
1da177e4 942typedef struct ide_task_s {
650d841d
BZ
943 union {
944 struct ide_taskfile tf;
945 u8 tf_array[14];
946 };
866e2ec9 947 u32 tf_flags;
1da177e4 948 int data_phase;
1da177e4
LT
949 struct request *rq; /* copy of request */
950 void *special; /* valid_t generally */
951} ide_task_t;
952
9e42237f 953void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 954void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT
955
956extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 957extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT
958
959extern int drive_is_ready(ide_drive_t *);
1da177e4 960
2fc57388
BZ
961void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
962
f6e29e35 963ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 964
4d7a984b
TH
965void task_end_request(ide_drive_t *, struct request *, u8);
966
ac026ff2 967int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
968int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
969
1da177e4
LT
970int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
971int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
972int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
973
974extern int system_bus_clock(void);
975
976extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
977extern int ide_config_drive_speed(ide_drive_t *, u8);
978extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
979extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
980
981extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
982
1da177e4
LT
983extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
984
985extern int ide_spin_wait_hwgroup(ide_drive_t *);
986extern void ide_timer_expiry(unsigned long);
7d12e780 987extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 988extern void do_ide_request(struct request_queue *);
1da177e4
LT
989
990void ide_init_disk(struct gendisk *, ide_drive_t *);
991
6d208b39 992#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
ade2daf9 993extern int ide_scan_direction;
725522b5
GKH
994extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
995#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
996#else
997#define ide_pci_register_driver(d) pci_register_driver(d)
998#endif
999
85620436
BZ
1000void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1001void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1002
8e882ba1 1003#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
c413b9b9
BZ
1004void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1005#else
1006static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1007 const struct ide_port_info *d) { }
1008#endif
1009
1da177e4
LT
1010extern void default_hwif_iops(ide_hwif_t *);
1011extern void default_hwif_mmiops(ide_hwif_t *);
1012extern void default_hwif_transport(ide_hwif_t *);
1013
1da177e4
LT
1014typedef struct ide_pci_enablebit_s {
1015 u8 reg; /* byte pci reg holding the enable-bit */
1016 u8 mask; /* mask to isolate the enable-bit */
1017 u8 val; /* value of masked reg when "enabled" */
1018} ide_pci_enablebit_t;
1019
1020enum {
1021 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1022 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1023 /* single port device */
a5d8c5c8 1024 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1025 /* don't use legacy PIO blacklist */
1026 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1027 /* don't use conservative PIO "downgrade" */
1028 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
26bcb879
BZ
1029 /* use PIO8/9 for prefetch off/on */
1030 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1031 /* use PIO6/7 for fast-devsel off/on */
1032 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1033 /* use 100-102 and 200-202 PIO values to set DMA modes */
1034 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1035 /*
1036 * keep DMA setting when programming PIO mode, may be used only
1037 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1038 */
1039 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1040 /* program host for the transfer mode after programming device */
1041 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1042 /* don't program host/device for the transfer mode ("smart" hosts) */
1043 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1044 /* trust BIOS for programming chipset/device for DMA */
1045 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
807b90d0 1046 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
0ae2e178 1047 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ
1048 /* ATAPI DMA is unsupported */
1049 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
7cab14a7
BZ
1050 /* set if host is a "bootable" controller */
1051 IDE_HFLAG_BOOTABLE = (1 << 13),
47b68788
BZ
1052 /* host doesn't support DMA */
1053 IDE_HFLAG_NO_DMA = (1 << 14),
1054 /* check if host is PCI IDE device before allowing DMA */
1055 IDE_HFLAG_NO_AUTODMA = (1 << 15),
807b90d0
BZ
1056 /* don't autotune PIO */
1057 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
9ffcf364 1058 /* host is CS5510/CS5520 */
807b90d0 1059 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
238e4f14
BZ
1060 /* no LBA48 */
1061 IDE_HFLAG_NO_LBA48 = (1 << 17),
1062 /* no LBA48 DMA */
1063 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1064 /* data FIFO is cleared by an error */
1065 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1066 /* serialize ports */
1067 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1068 /* use legacy IRQs */
1069 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1070 /* force use of legacy IRQs */
1071 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1072 /* limit LBA48 requests to 256 sectors */
1073 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1074 /* use 32-bit I/O ops */
1075 IDE_HFLAG_IO_32BIT = (1 << 24),
1076 /* unmask IRQs */
1077 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1078 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
8704de8f
BZ
1079 /* host is CY82C693 */
1080 IDE_HFLAG_CY82C693 = (1 << 27),
8ac2b42a
BZ
1081 /* force host out of "simplex" mode */
1082 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1083 /* DSC overlap is unsupported */
1084 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1085 /* never use 32-bit I/O ops */
1086 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1087 /* never unmask IRQs */
1088 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1089};
1090
7cab14a7
BZ
1091#ifdef CONFIG_BLK_DEV_OFFBOARD
1092# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1093#else
1094# define IDE_HFLAG_OFF_BOARD 0
1095#endif
1096
039788e1 1097struct ide_port_info {
1da177e4 1098 char *name;
1da177e4
LT
1099 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1100 void (*init_iops)(ide_hwif_t *);
1101 void (*init_hwif)(ide_hwif_t *);
1102 void (*init_dma)(ide_hwif_t *, unsigned long);
1da177e4 1103 ide_pci_enablebit_t enablebits[2];
528a572d 1104 hwif_chipset_t chipset;
3071a9d0 1105 u8 extra;
9ffcf364 1106 u32 host_flags;
4099d143 1107 u8 pio_mask;
5f8b6c34
BZ
1108 u8 swdma_mask;
1109 u8 mwdma_mask;
18137207 1110 u8 udma_mask;
039788e1 1111};
1da177e4 1112
85620436
BZ
1113int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1114int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1115
1116void ide_map_sg(ide_drive_t *, struct request *);
1117void ide_init_sg_cmd(ide_drive_t *, struct request *);
1118
1119#define BAD_DMA_DRIVE 0
1120#define GOOD_DMA_DRIVE 1
1121
65e5f2e3
JC
1122struct drive_list_entry {
1123 const char *id_model;
1124 const char *id_firmware;
1125};
1126
1127int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1128
1129#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1130int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1131int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1132
1133u8 ide_find_dma_mode(ide_drive_t *, u8);
1134
1135static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1136{
1137 return ide_find_dma_mode(drive, XFER_UDMA_6);
1138}
1139
4a546e04 1140void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1141void ide_dma_off(ide_drive_t *);
4a546e04 1142void ide_dma_on(ide_drive_t *);
3608b5d7 1143int ide_set_dma(ide_drive_t *);
578cfa0d 1144void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1145ide_startstop_t ide_dma_intr(ide_drive_t *);
1146
062f9f02
BZ
1147int ide_build_sglist(ide_drive_t *, struct request *);
1148void ide_destroy_dmatable(ide_drive_t *);
1149
8e882ba1 1150#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1151extern int ide_build_dmatable(ide_drive_t *, struct request *);
1da177e4 1152extern int ide_release_dma(ide_hwif_t *);
ecf32796 1153extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1da177e4 1154
15ce926a 1155void ide_dma_host_set(ide_drive_t *, int);
1da177e4
LT
1156extern int ide_dma_setup(ide_drive_t *);
1157extern void ide_dma_start(ide_drive_t *);
1158extern int __ide_dma_end(ide_drive_t *);
841d2a9b 1159extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1160extern void ide_dma_timeout(ide_drive_t *);
8e882ba1 1161#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT
1162
1163#else
3ab7efe8 1164static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1165static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1166static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1167static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1168static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1169static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1170static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1171static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1172static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT
1173#endif /* CONFIG_BLK_DEV_IDEDMA */
1174
8e882ba1 1175#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4
LT
1176static inline void ide_release_dma(ide_hwif_t *drive) {;}
1177#endif
1178
e3a59b4d
HR
1179#ifdef CONFIG_BLK_DEV_IDEACPI
1180extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1181extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1182extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1183extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1184void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1185extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1186#else
1187static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1188static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1189static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1190static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1191static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1192static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1193#endif
1194
fbd13088 1195void ide_remove_port_from_hwgroup(ide_hwif_t *);
1da177e4
LT
1196extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1197extern void ide_hwif_release_regions(ide_hwif_t* hwif);
f82c2b17 1198void ide_unregister(unsigned int, int, int);
1da177e4
LT
1199
1200void ide_register_region(struct gendisk *);
1201void ide_unregister_region(struct gendisk *);
1202
f01393e4 1203void ide_undecoded_slave(ide_drive_t *);
1da177e4 1204
c413b9b9
BZ
1205int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1206int ide_device_add(u8 idx[4], const struct ide_port_info *);
1da177e4
LT
1207
1208static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1209{
1210 return hwif->hwif_data;
1211}
1212
1213static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1214{
1215 hwif->hwif_data = data;
1216}
1217
3ab7efe8 1218const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1219extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1220extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1221
2229833c
BZ
1222static inline int ide_dev_has_iordy(struct hd_driveid *id)
1223{
1224 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1225}
1226
6c3c22f3
SS
1227static inline int ide_dev_is_sata(struct hd_driveid *id)
1228{
1229 /*
1230 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1231 * verifying that word 80 by casting it to a signed type --
1232 * this trick allows us to filter out the reserved values of
1233 * 0x0000 and 0xffff along with the earlier ATA revisions...
1234 */
1235 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1236 return 1;
1237 return 0;
1238}
1239
a501633c 1240u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1241u8 ide_dump_status(ide_drive_t *, const char *, u8);
1242
1243typedef struct ide_pio_timings_s {
1244 int setup_time; /* Address setup (ns) minimum */
1245 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS
1246 int cycle_time; /* Cycle time (ns) minimum = */
1247 /* active + recovery (+ setup for some chips) */
1da177e4
LT
1248} ide_pio_timings_t;
1249
7dd00083 1250unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1251u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT
1252extern const ide_pio_timings_t ide_pio_timings[6];
1253
88b2b32b
BZ
1254int ide_set_pio_mode(ide_drive_t *, u8);
1255int ide_set_dma_mode(ide_drive_t *, u8);
1256
26bcb879
BZ
1257void ide_set_pio(ide_drive_t *, u8);
1258
1259static inline void ide_set_max_pio(ide_drive_t *drive)
1260{
1261 ide_set_pio(drive, 255);
1262}
1da177e4
LT
1263
1264extern spinlock_t ide_lock;
ef29888e 1265extern struct mutex ide_cfg_mtx;
1da177e4
LT
1266/*
1267 * Structure locking:
1268 *
ef29888e 1269 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1270 * ide_hwif_t->{next,hwgroup}
1271 * ide_drive_t->next
1272 *
1273 * ide_hwgroup_t->busy: ide_lock
1274 * ide_hwgroup_t->hwif: ide_lock
1275 * ide_hwif_t->mate: constant, no locking
1276 * ide_drive_t->hwif: constant, no locking
1277 */
1278
366c7f55 1279#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1280
1281extern struct bus_type ide_bus_type;
1282
1283/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1284#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1285
1286/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1287#define ide_id_has_flush_cache_ext(id) \
1288 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1289
7b9f25b5
BZ
1290static inline void ide_dump_identify(u8 *id)
1291{
1292 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1293}
1294
86b37860
CL
1295static inline int hwif_to_node(ide_hwif_t *hwif)
1296{
36501650 1297 struct pci_dev *dev = to_pci_dev(hwif->dev);
1f07e988 1298 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
86b37860
CL
1299}
1300
1b678347
BH
1301static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1302{
1303 ide_hwif_t *hwif = HWIF(drive);
1304
1305 return &hwif->drives[(drive->dn ^ 1) & 1];
1306}
1307
81ca6919
BZ
1308static inline void ide_set_irq(ide_drive_t *drive, int on)
1309{
1310 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1311}
1312
c47137a9
BZ
1313static inline u8 ide_read_status(ide_drive_t *drive)
1314{
1315 ide_hwif_t *hwif = drive->hwif;
1316
1317 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1318}
1319
1320static inline u8 ide_read_altstatus(ide_drive_t *drive)
1321{
1322 ide_hwif_t *hwif = drive->hwif;
1323
1324 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]);
1325}
1326
64a57fe4
BZ
1327static inline u8 ide_read_error(ide_drive_t *drive)
1328{
1329 ide_hwif_t *hwif = drive->hwif;
1330
1331 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]);
1332}
1333
1da177e4 1334#endif /* _IDE_H */