Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef _IDE_H |
2 | #define _IDE_H | |
3 | /* | |
4 | * linux/include/linux/ide.h | |
5 | * | |
6 | * Copyright (C) 1994-2002 Linus Torvalds & authors | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | |
3ceca727 | 11 | #include <linux/ata.h> |
1da177e4 LT |
12 | #include <linux/blkdev.h> |
13 | #include <linux/proc_fs.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/bitops.h> | |
16 | #include <linux/bio.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/pci.h> | |
f36d4024 | 19 | #include <linux/completion.h> |
feb22b7f | 20 | #include <linux/pm.h> |
e3a59b4d HR |
21 | #ifdef CONFIG_BLK_DEV_IDEACPI |
22 | #include <acpi/acpi.h> | |
23 | #endif | |
1da177e4 LT |
24 | #include <asm/byteorder.h> |
25 | #include <asm/system.h> | |
26 | #include <asm/io.h> | |
f9383c42 | 27 | #include <asm/mutex.h> |
1da177e4 | 28 | |
d45b70ab | 29 | #if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300) |
4ee06b7e BZ |
30 | # define SUPPORT_VLB_SYNC 0 |
31 | #else | |
32 | # define SUPPORT_VLB_SYNC 1 | |
1da177e4 LT |
33 | #endif |
34 | ||
1da177e4 LT |
35 | /* |
36 | * Probably not wise to fiddle with these | |
37 | */ | |
b40d1b88 | 38 | #define IDE_DEFAULT_MAX_FAILURES 1 |
1da177e4 LT |
39 | #define ERROR_MAX 8 /* Max read/write errors per sector */ |
40 | #define ERROR_RESET 3 /* Reset controller every 4th retry */ | |
41 | #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ | |
42 | ||
c152cc1a BZ |
43 | /* Error codes returned in rq->errors to the higher part of the driver. */ |
44 | enum { | |
45 | IDE_DRV_ERROR_GENERAL = 101, | |
46 | IDE_DRV_ERROR_FILEMARK = 102, | |
47 | IDE_DRV_ERROR_EOD = 103, | |
48 | }; | |
49 | ||
1da177e4 LT |
50 | /* |
51 | * Definitions for accessing IDE controller registers | |
52 | */ | |
53 | #define IDE_NR_PORTS (10) | |
54 | ||
4c3032d8 BZ |
55 | struct ide_io_ports { |
56 | unsigned long data_addr; | |
57 | ||
58 | union { | |
59 | unsigned long error_addr; /* read: error */ | |
60 | unsigned long feature_addr; /* write: feature */ | |
61 | }; | |
62 | ||
63 | unsigned long nsect_addr; | |
64 | unsigned long lbal_addr; | |
65 | unsigned long lbam_addr; | |
66 | unsigned long lbah_addr; | |
67 | ||
68 | unsigned long device_addr; | |
69 | ||
70 | union { | |
71 | unsigned long status_addr; /* read: status */ | |
72 | unsigned long command_addr; /* write: command */ | |
73 | }; | |
74 | ||
75 | unsigned long ctl_addr; | |
76 | ||
77 | unsigned long irq_addr; | |
78 | }; | |
1da177e4 LT |
79 | |
80 | #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) | |
1da177e4 | 81 | |
3a7d2484 BZ |
82 | #define BAD_R_STAT (ATA_BUSY | ATA_ERR) |
83 | #define BAD_W_STAT (BAD_R_STAT | ATA_DF) | |
84 | #define BAD_STAT (BAD_R_STAT | ATA_DRQ) | |
85 | #define DRIVE_READY (ATA_DRDY | ATA_DSC) | |
86 | ||
87 | #define BAD_CRC (ATA_ABORTED | ATA_ICRC) | |
1da177e4 LT |
88 | |
89 | #define SATA_NR_PORTS (3) /* 16 possible ?? */ | |
90 | ||
91 | #define SATA_STATUS_OFFSET (0) | |
1da177e4 | 92 | #define SATA_ERROR_OFFSET (1) |
1da177e4 | 93 | #define SATA_CONTROL_OFFSET (2) |
1da177e4 | 94 | |
1da177e4 LT |
95 | /* |
96 | * Our Physical Region Descriptor (PRD) table should be large enough | |
97 | * to handle the biggest I/O request we are likely to see. Since requests | |
98 | * can have no more than 256 sectors, and since the typical blocksize is | |
99 | * two or more sectors, we could get by with a limit of 128 entries here for | |
100 | * the usual worst case. Most requests seem to include some contiguous blocks, | |
101 | * further reducing the number of table entries required. | |
102 | * | |
103 | * The driver reverts to PIO mode for individual requests that exceed | |
104 | * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling | |
105 | * 100% of all crazy scenarios here is not necessary. | |
106 | * | |
107 | * As it turns out though, we must allocate a full 4KB page for this, | |
108 | * so the two PRD tables (ide0 & ide1) will each get half of that, | |
109 | * allowing each to have about 256 entries (8 bytes each) from this. | |
110 | */ | |
111 | #define PRD_BYTES 8 | |
112 | #define PRD_ENTRIES 256 | |
113 | ||
114 | /* | |
115 | * Some more useful definitions | |
116 | */ | |
117 | #define PARTN_BITS 6 /* number of minor dev bits for partitions */ | |
118 | #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ | |
119 | #define SECTOR_SIZE 512 | |
151a6701 | 120 | |
1da177e4 LT |
121 | /* |
122 | * Timeouts for various operations: | |
123 | */ | |
d6e2955a BZ |
124 | enum { |
125 | /* spec allows up to 20ms */ | |
126 | WAIT_DRQ = HZ / 10, /* 100ms */ | |
127 | /* some laptops are very slow */ | |
128 | WAIT_READY = 5 * HZ, /* 5s */ | |
129 | /* should be less than 3ms (?), if all ATAPI CD is closed at boot */ | |
130 | WAIT_PIDENTIFY = 10 * HZ, /* 10s */ | |
131 | /* worst case when spinning up */ | |
132 | WAIT_WORSTCASE = 30 * HZ, /* 30s */ | |
133 | /* maximum wait for an IRQ to happen */ | |
134 | WAIT_CMD = 10 * HZ, /* 10s */ | |
135 | /* Some drives require a longer IRQ timeout. */ | |
136 | WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */ | |
137 | /* | |
138 | * Some drives (for example, Seagate STT3401A Travan) require a very | |
139 | * long timeout, because they don't return an interrupt or clear their | |
140 | * BSY bit until after the command completes (even retension commands). | |
141 | */ | |
142 | WAIT_TAPE_CMD = 900 * HZ, /* 900s */ | |
143 | /* minimum sleep time */ | |
144 | WAIT_MIN_SLEEP = HZ / 50, /* 20ms */ | |
145 | }; | |
1da177e4 | 146 | |
79e36a9f EO |
147 | /* |
148 | * Op codes for special requests to be handled by ide_special_rq(). | |
149 | * Values should be in the range of 0x20 to 0x3f. | |
150 | */ | |
151 | #define REQ_DRIVE_RESET 0x20 | |
92f1f8fd | 152 | #define REQ_DEVSET_EXEC 0x21 |
4abdc6ee EO |
153 | #define REQ_PARK_HEADS 0x22 |
154 | #define REQ_UNPARK_HEADS 0x23 | |
79e36a9f | 155 | |
1da177e4 LT |
156 | /* |
157 | * Check for an interrupt and acknowledge the interrupt status | |
158 | */ | |
159 | struct hwif_s; | |
160 | typedef int (ide_ack_intr_t)(struct hwif_s *); | |
161 | ||
1da177e4 LT |
162 | /* |
163 | * hwif_chipset_t is used to keep track of the specific hardware | |
164 | * chipset used by each IDE interface, if known. | |
165 | */ | |
528a572d | 166 | enum { ide_unknown, ide_generic, ide_pci, |
1da177e4 LT |
167 | ide_cmd640, ide_dtc2278, ide_ali14xx, |
168 | ide_qd65xx, ide_umc8672, ide_ht6560b, | |
b7876a6f | 169 | ide_4drives, ide_pmac, ide_acorn, |
9a0e77f2 | 170 | ide_au1xxx, ide_palm3710 |
528a572d BZ |
171 | }; |
172 | ||
173 | typedef u8 hwif_chipset_t; | |
1da177e4 LT |
174 | |
175 | /* | |
176 | * Structure to hold all information about the location of this port | |
177 | */ | |
178 | typedef struct hw_regs_s { | |
4c3032d8 BZ |
179 | union { |
180 | struct ide_io_ports io_ports; | |
181 | unsigned long io_ports_array[IDE_NR_PORTS]; | |
182 | }; | |
183 | ||
1da177e4 | 184 | int irq; /* our irq number */ |
1da177e4 LT |
185 | ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ |
186 | hwif_chipset_t chipset; | |
c56c5648 | 187 | struct device *dev, *parent; |
d6276b5f | 188 | unsigned long config; |
1da177e4 LT |
189 | } hw_regs_t; |
190 | ||
1da177e4 LT |
191 | static inline void ide_std_init_ports(hw_regs_t *hw, |
192 | unsigned long io_addr, | |
193 | unsigned long ctl_addr) | |
194 | { | |
195 | unsigned int i; | |
196 | ||
4c3032d8 BZ |
197 | for (i = 0; i <= 7; i++) |
198 | hw->io_ports_array[i] = io_addr++; | |
1da177e4 | 199 | |
4c3032d8 | 200 | hw->io_ports.ctl_addr = ctl_addr; |
1da177e4 LT |
201 | } |
202 | ||
c5bfc375 | 203 | #define MAX_HWIFS 10 |
83ae20c8 | 204 | |
1da177e4 LT |
205 | /* |
206 | * Now for the data we need to maintain per-drive: ide_drive_t | |
207 | */ | |
208 | ||
209 | #define ide_scsi 0x21 | |
210 | #define ide_disk 0x20 | |
211 | #define ide_optical 0x7 | |
212 | #define ide_cdrom 0x5 | |
213 | #define ide_tape 0x1 | |
214 | #define ide_floppy 0x0 | |
215 | ||
216 | /* | |
217 | * Special Driver Flags | |
218 | * | |
219 | * set_geometry : respecify drive geometry | |
220 | * recalibrate : seek to cyl 0 | |
221 | * set_multmode : set multmode count | |
1da177e4 LT |
222 | * reserved : unused |
223 | */ | |
224 | typedef union { | |
225 | unsigned all : 8; | |
226 | struct { | |
1da177e4 LT |
227 | unsigned set_geometry : 1; |
228 | unsigned recalibrate : 1; | |
229 | unsigned set_multmode : 1; | |
6982daf7 | 230 | unsigned reserved : 5; |
1da177e4 LT |
231 | } b; |
232 | } special_t; | |
233 | ||
1da177e4 LT |
234 | /* |
235 | * Status returned from various ide_ functions | |
236 | */ | |
237 | typedef enum { | |
238 | ide_stopped, /* no drive operation was started */ | |
239 | ide_started, /* a drive operation was started, handler was set */ | |
240 | } ide_startstop_t; | |
241 | ||
d6ff9f64 BZ |
242 | enum { |
243 | IDE_TFLAG_LBA48 = (1 << 0), | |
19710d25 BZ |
244 | IDE_TFLAG_OUT_HOB_FEATURE = (1 << 1), |
245 | IDE_TFLAG_OUT_HOB_NSECT = (1 << 2), | |
246 | IDE_TFLAG_OUT_HOB_LBAL = (1 << 3), | |
247 | IDE_TFLAG_OUT_HOB_LBAM = (1 << 4), | |
248 | IDE_TFLAG_OUT_HOB_LBAH = (1 << 5), | |
d6ff9f64 BZ |
249 | IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE | |
250 | IDE_TFLAG_OUT_HOB_NSECT | | |
251 | IDE_TFLAG_OUT_HOB_LBAL | | |
252 | IDE_TFLAG_OUT_HOB_LBAM | | |
253 | IDE_TFLAG_OUT_HOB_LBAH, | |
19710d25 BZ |
254 | IDE_TFLAG_OUT_FEATURE = (1 << 6), |
255 | IDE_TFLAG_OUT_NSECT = (1 << 7), | |
256 | IDE_TFLAG_OUT_LBAL = (1 << 8), | |
257 | IDE_TFLAG_OUT_LBAM = (1 << 9), | |
258 | IDE_TFLAG_OUT_LBAH = (1 << 10), | |
d6ff9f64 BZ |
259 | IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE | |
260 | IDE_TFLAG_OUT_NSECT | | |
261 | IDE_TFLAG_OUT_LBAL | | |
262 | IDE_TFLAG_OUT_LBAM | | |
263 | IDE_TFLAG_OUT_LBAH, | |
19710d25 BZ |
264 | IDE_TFLAG_OUT_DEVICE = (1 << 11), |
265 | IDE_TFLAG_WRITE = (1 << 12), | |
266 | IDE_TFLAG_CUSTOM_HANDLER = (1 << 13), | |
267 | IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 14), | |
67625119 | 268 | IDE_TFLAG_IN_HOB_ERROR = (1 << 15), |
19710d25 BZ |
269 | IDE_TFLAG_IN_HOB_NSECT = (1 << 16), |
270 | IDE_TFLAG_IN_HOB_LBAL = (1 << 17), | |
271 | IDE_TFLAG_IN_HOB_LBAM = (1 << 18), | |
272 | IDE_TFLAG_IN_HOB_LBAH = (1 << 19), | |
d6ff9f64 BZ |
273 | IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL | |
274 | IDE_TFLAG_IN_HOB_LBAM | | |
275 | IDE_TFLAG_IN_HOB_LBAH, | |
67625119 | 276 | IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_ERROR | |
d6ff9f64 BZ |
277 | IDE_TFLAG_IN_HOB_NSECT | |
278 | IDE_TFLAG_IN_HOB_LBA, | |
67625119 | 279 | IDE_TFLAG_IN_ERROR = (1 << 20), |
19710d25 BZ |
280 | IDE_TFLAG_IN_NSECT = (1 << 21), |
281 | IDE_TFLAG_IN_LBAL = (1 << 22), | |
282 | IDE_TFLAG_IN_LBAM = (1 << 23), | |
283 | IDE_TFLAG_IN_LBAH = (1 << 24), | |
d6ff9f64 BZ |
284 | IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL | |
285 | IDE_TFLAG_IN_LBAM | | |
286 | IDE_TFLAG_IN_LBAH, | |
287 | IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT | | |
288 | IDE_TFLAG_IN_LBA, | |
19710d25 | 289 | IDE_TFLAG_IN_DEVICE = (1 << 25), |
d6ff9f64 BZ |
290 | IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB | |
291 | IDE_TFLAG_IN_HOB, | |
292 | IDE_TFLAG_TF = IDE_TFLAG_OUT_TF | | |
293 | IDE_TFLAG_IN_TF, | |
294 | IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE | | |
295 | IDE_TFLAG_IN_DEVICE, | |
296 | /* force 16-bit I/O operations */ | |
19710d25 | 297 | IDE_TFLAG_IO_16BIT = (1 << 26), |
22aa4b32 | 298 | /* struct ide_cmd was allocated using kmalloc() */ |
19710d25 | 299 | IDE_TFLAG_DYN = (1 << 27), |
adb1af98 | 300 | IDE_TFLAG_FS = (1 << 28), |
0dfb991c | 301 | IDE_TFLAG_MULTI_PIO = (1 << 29), |
19710d25 BZ |
302 | }; |
303 | ||
304 | enum { | |
305 | IDE_FTFLAG_FLAGGED = (1 << 0), | |
306 | IDE_FTFLAG_SET_IN_FLAGS = (1 << 1), | |
307 | IDE_FTFLAG_OUT_DATA = (1 << 2), | |
308 | IDE_FTFLAG_IN_DATA = (1 << 3), | |
d6ff9f64 BZ |
309 | }; |
310 | ||
311 | struct ide_taskfile { | |
312 | u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */ | |
67625119 SS |
313 | /* 1-5: additional data to support LBA48 */ |
314 | union { | |
315 | u8 hob_error; /* read: error */ | |
316 | u8 hob_feature; /* write: feature */ | |
317 | }; | |
d6ff9f64 | 318 | |
d6ff9f64 BZ |
319 | u8 hob_nsect; |
320 | u8 hob_lbal; | |
321 | u8 hob_lbam; | |
322 | u8 hob_lbah; | |
323 | ||
324 | u8 data; /* 6: low data byte (for TASKFILE IOCTL) */ | |
325 | ||
326 | union { /* 7: */ | |
327 | u8 error; /* read: error */ | |
328 | u8 feature; /* write: feature */ | |
329 | }; | |
330 | ||
331 | u8 nsect; /* 8: number of sectors */ | |
332 | u8 lbal; /* 9: LBA low */ | |
333 | u8 lbam; /* 10: LBA mid */ | |
334 | u8 lbah; /* 11: LBA high */ | |
335 | ||
336 | u8 device; /* 12: device select */ | |
337 | ||
338 | union { /* 13: */ | |
339 | u8 status; /* read: status */ | |
340 | u8 command; /* write: command */ | |
341 | }; | |
342 | }; | |
343 | ||
22aa4b32 | 344 | struct ide_cmd { |
d6ff9f64 BZ |
345 | union { |
346 | struct ide_taskfile tf; | |
347 | u8 tf_array[14]; | |
348 | }; | |
19710d25 | 349 | u8 ftf_flags; /* for TASKFILE ioctl */ |
d6ff9f64 | 350 | u32 tf_flags; |
0dfb991c | 351 | int protocol; |
b6308ee0 BZ |
352 | |
353 | int sg_nents; /* number of sg entries */ | |
354 | int orig_sg_nents; | |
355 | int sg_dma_direction; /* DMA transfer direction */ | |
356 | ||
bf717c0a | 357 | unsigned int nbytes; |
b6308ee0 | 358 | unsigned int nleft; |
a08915ba BZ |
359 | unsigned int last_xfer_len; |
360 | ||
b6308ee0 BZ |
361 | struct scatterlist *cursg; |
362 | unsigned int cursg_ofs; | |
363 | ||
d6ff9f64 BZ |
364 | struct request *rq; /* copy of request */ |
365 | void *special; /* valid_t generally */ | |
22aa4b32 | 366 | }; |
d6ff9f64 | 367 | |
67c56364 BZ |
368 | /* ATAPI packet command flags */ |
369 | enum { | |
370 | /* set when an error is considered normal - no retry (ide-tape) */ | |
371 | PC_FLAG_ABORT = (1 << 0), | |
372 | PC_FLAG_SUPPRESS_ERROR = (1 << 1), | |
373 | PC_FLAG_WAIT_FOR_DSC = (1 << 2), | |
374 | PC_FLAG_DMA_OK = (1 << 3), | |
375 | PC_FLAG_DMA_IN_PROGRESS = (1 << 4), | |
376 | PC_FLAG_DMA_ERROR = (1 << 5), | |
377 | PC_FLAG_WRITING = (1 << 6), | |
67c56364 BZ |
378 | }; |
379 | ||
380 | /* | |
381 | * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes. | |
382 | * This is used for several packet commands (not for READ/WRITE commands). | |
383 | */ | |
41fa9f86 | 384 | #define IDE_PC_BUFFER_SIZE 64 |
4cad085e | 385 | #define ATAPI_WAIT_PC (60 * HZ) |
67c56364 BZ |
386 | |
387 | struct ide_atapi_pc { | |
388 | /* actual packet bytes */ | |
389 | u8 c[12]; | |
390 | /* incremented on each retry */ | |
391 | int retries; | |
392 | int error; | |
393 | ||
394 | /* bytes to transfer */ | |
395 | int req_xfer; | |
396 | /* bytes actually transferred */ | |
397 | int xferred; | |
398 | ||
399 | /* data buffer */ | |
400 | u8 *buf; | |
401 | /* current buffer position */ | |
402 | u8 *cur_pos; | |
403 | int buf_size; | |
404 | /* missing/available data on the current buffer */ | |
405 | int b_count; | |
406 | ||
407 | /* the corresponding request */ | |
408 | struct request *rq; | |
409 | ||
410 | unsigned long flags; | |
411 | ||
412 | /* | |
413 | * those are more or less driver-specific and some of them are subject | |
414 | * to change/removal later. | |
415 | */ | |
416 | u8 pc_buf[IDE_PC_BUFFER_SIZE]; | |
417 | ||
418 | /* idetape only */ | |
419 | struct idetape_bh *bh; | |
420 | char *b_data; | |
421 | ||
67c56364 BZ |
422 | unsigned long timeout; |
423 | }; | |
424 | ||
8185d5aa | 425 | struct ide_devset; |
7f3c868b | 426 | struct ide_driver; |
1da177e4 | 427 | |
e3a59b4d HR |
428 | #ifdef CONFIG_BLK_DEV_IDEACPI |
429 | struct ide_acpi_drive_link; | |
430 | struct ide_acpi_hwif_link; | |
431 | #endif | |
432 | ||
806f80a6 BZ |
433 | struct ide_drive_s; |
434 | ||
435 | struct ide_disk_ops { | |
436 | int (*check)(struct ide_drive_s *, const char *); | |
437 | int (*get_capacity)(struct ide_drive_s *); | |
438 | void (*setup)(struct ide_drive_s *); | |
439 | void (*flush)(struct ide_drive_s *); | |
440 | int (*init_media)(struct ide_drive_s *, struct gendisk *); | |
441 | int (*set_doorlock)(struct ide_drive_s *, struct gendisk *, | |
442 | int); | |
443 | ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *, | |
444 | sector_t); | |
badf8082 AV |
445 | int (*ioctl)(struct ide_drive_s *, struct block_device *, |
446 | fmode_t, unsigned int, unsigned long); | |
806f80a6 BZ |
447 | }; |
448 | ||
3b8ac539 BP |
449 | /* ATAPI device flags */ |
450 | enum { | |
451 | IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), | |
0578042d BZ |
452 | |
453 | /* ide-cd */ | |
3b8ac539 | 454 | /* Drive cannot eject the disc. */ |
bf64741f | 455 | IDE_AFLAG_NO_EJECT = (1 << 1), |
3b8ac539 | 456 | /* Drive is a pre ATAPI 1.2 drive. */ |
bf64741f | 457 | IDE_AFLAG_PRE_ATAPI12 = (1 << 2), |
3b8ac539 | 458 | /* TOC addresses are in BCD. */ |
bf64741f | 459 | IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3), |
3b8ac539 | 460 | /* TOC track numbers are in BCD. */ |
bf64741f | 461 | IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4), |
3b8ac539 | 462 | /* Saved TOC information is current. */ |
bf64741f | 463 | IDE_AFLAG_TOC_VALID = (1 << 6), |
3b8ac539 | 464 | /* We think that the drive door is locked. */ |
bf64741f | 465 | IDE_AFLAG_DOOR_LOCKED = (1 << 7), |
3b8ac539 | 466 | /* SET_CD_SPEED command is unsupported. */ |
bf64741f BP |
467 | IDE_AFLAG_NO_SPEED_SELECT = (1 << 8), |
468 | IDE_AFLAG_VERTOS_300_SSD = (1 << 9), | |
469 | IDE_AFLAG_VERTOS_600_ESD = (1 << 10), | |
470 | IDE_AFLAG_SANYO_3CD = (1 << 11), | |
471 | IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12), | |
472 | IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13), | |
473 | IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14), | |
3b8ac539 BP |
474 | |
475 | /* ide-floppy */ | |
3b8ac539 | 476 | /* Avoid commands not supported in Clik drive */ |
bf64741f | 477 | IDE_AFLAG_CLIK_DRIVE = (1 << 15), |
3b8ac539 | 478 | /* Requires BH algorithm for packets */ |
bf64741f | 479 | IDE_AFLAG_ZIP_DRIVE = (1 << 16), |
49cac39e | 480 | /* Supports format progress report */ |
bf64741f | 481 | IDE_AFLAG_SRFP = (1 << 17), |
3b8ac539 BP |
482 | |
483 | /* ide-tape */ | |
bf64741f | 484 | IDE_AFLAG_IGNORE_DSC = (1 << 18), |
3b8ac539 | 485 | /* 0 When the tape position is unknown */ |
bf64741f | 486 | IDE_AFLAG_ADDRESS_VALID = (1 << 19), |
3b8ac539 | 487 | /* Device already opened */ |
bf64741f | 488 | IDE_AFLAG_BUSY = (1 << 20), |
3b8ac539 | 489 | /* Attempt to auto-detect the current user block size */ |
bf64741f | 490 | IDE_AFLAG_DETECT_BS = (1 << 21), |
3b8ac539 | 491 | /* Currently on a filemark */ |
bf64741f | 492 | IDE_AFLAG_FILEMARK = (1 << 22), |
3b8ac539 | 493 | /* 0 = no tape is loaded, so we don't rewind after ejecting */ |
bf64741f | 494 | IDE_AFLAG_MEDIUM_PRESENT = (1 << 23), |
f20f2586 | 495 | |
bf64741f | 496 | IDE_AFLAG_NO_AUTOCLOSE = (1 << 24), |
3b8ac539 BP |
497 | }; |
498 | ||
97100fc8 BZ |
499 | /* device flags */ |
500 | enum { | |
501 | /* restore settings after device reset */ | |
502 | IDE_DFLAG_KEEP_SETTINGS = (1 << 0), | |
503 | /* device is using DMA for read/write */ | |
504 | IDE_DFLAG_USING_DMA = (1 << 1), | |
505 | /* okay to unmask other IRQs */ | |
506 | IDE_DFLAG_UNMASK = (1 << 2), | |
507 | /* don't attempt flushes */ | |
508 | IDE_DFLAG_NOFLUSH = (1 << 3), | |
509 | /* DSC overlap */ | |
510 | IDE_DFLAG_DSC_OVERLAP = (1 << 4), | |
511 | /* give potential excess bandwidth */ | |
512 | IDE_DFLAG_NICE1 = (1 << 5), | |
513 | /* device is physically present */ | |
514 | IDE_DFLAG_PRESENT = (1 << 6), | |
97100fc8 BZ |
515 | /* id read from device (synthetic if not set) */ |
516 | IDE_DFLAG_ID_READ = (1 << 8), | |
517 | IDE_DFLAG_NOPROBE = (1 << 9), | |
518 | /* need to do check_media_change() */ | |
519 | IDE_DFLAG_REMOVABLE = (1 << 10), | |
520 | /* needed for removable devices */ | |
521 | IDE_DFLAG_ATTACH = (1 << 11), | |
522 | IDE_DFLAG_FORCED_GEOM = (1 << 12), | |
523 | /* disallow setting unmask bit */ | |
524 | IDE_DFLAG_NO_UNMASK = (1 << 13), | |
525 | /* disallow enabling 32-bit I/O */ | |
526 | IDE_DFLAG_NO_IO_32BIT = (1 << 14), | |
527 | /* for removable only: door lock/unlock works */ | |
528 | IDE_DFLAG_DOORLOCKING = (1 << 15), | |
529 | /* disallow DMA */ | |
530 | IDE_DFLAG_NODMA = (1 << 16), | |
531 | /* powermanagment told us not to do anything, so sleep nicely */ | |
532 | IDE_DFLAG_BLOCKED = (1 << 17), | |
97100fc8 | 533 | /* sleeping & sleep field valid */ |
5317464d BP |
534 | IDE_DFLAG_SLEEPING = (1 << 18), |
535 | IDE_DFLAG_POST_RESET = (1 << 19), | |
536 | IDE_DFLAG_UDMA33_WARNED = (1 << 20), | |
537 | IDE_DFLAG_LBA48 = (1 << 21), | |
97100fc8 | 538 | /* status of write cache */ |
5317464d | 539 | IDE_DFLAG_WCACHE = (1 << 22), |
97100fc8 | 540 | /* used for ignoring ATA_DF */ |
5317464d | 541 | IDE_DFLAG_NOWERR = (1 << 23), |
c3922048 | 542 | /* retrying in PIO */ |
5317464d BP |
543 | IDE_DFLAG_DMA_PIO_RETRY = (1 << 24), |
544 | IDE_DFLAG_LBA = (1 << 25), | |
4abdc6ee | 545 | /* don't unload heads */ |
5317464d | 546 | IDE_DFLAG_NO_UNLOAD = (1 << 26), |
4abdc6ee | 547 | /* heads unloaded, please don't reset port */ |
5317464d BP |
548 | IDE_DFLAG_PARKED = (1 << 27), |
549 | IDE_DFLAG_MEDIA_CHANGED = (1 << 28), | |
da167876 | 550 | /* write protect */ |
5317464d BP |
551 | IDE_DFLAG_WP = (1 << 29), |
552 | IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30), | |
97100fc8 BZ |
553 | }; |
554 | ||
d7c26ebb | 555 | struct ide_drive_s { |
1da177e4 LT |
556 | char name[4]; /* drive name, such as "hda" */ |
557 | char driver_req[10]; /* requests specific driver */ | |
558 | ||
165125e1 | 559 | struct request_queue *queue; /* request queue */ |
1da177e4 LT |
560 | |
561 | struct request *rq; /* current request */ | |
1da177e4 | 562 | void *driver_data; /* extra driver data */ |
48fb2688 | 563 | u16 *id; /* identification info */ |
7662d046 | 564 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 | 565 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
92f1f8fd | 566 | const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */ |
7662d046 | 567 | #endif |
1da177e4 LT |
568 | struct hwif_s *hwif; /* actually (ide_hwif_t *) */ |
569 | ||
806f80a6 BZ |
570 | const struct ide_disk_ops *disk_ops; |
571 | ||
97100fc8 BZ |
572 | unsigned long dev_flags; |
573 | ||
1da177e4 | 574 | unsigned long sleep; /* sleep until this time */ |
1da177e4 LT |
575 | unsigned long timeout; /* max time to wait for irq */ |
576 | ||
577 | special_t special; /* special action flags */ | |
1da177e4 | 578 | |
7f612f27 | 579 | u8 select; /* basic drive/head select reg value */ |
1da177e4 | 580 | u8 retry_pio; /* retrying dma capable host in pio */ |
1da177e4 | 581 | u8 waiting_for_dma; /* dma currently in progress */ |
0a9b6f88 | 582 | u8 dma; /* atapi dma flag */ |
1da177e4 | 583 | |
1da177e4 LT |
584 | u8 quirk_list; /* considered quirky, set for a specific host */ |
585 | u8 init_speed; /* transfer rate set at boot */ | |
1da177e4 | 586 | u8 current_speed; /* current transfer rate set */ |
513daadd | 587 | u8 desired_speed; /* desired transfer rate set */ |
1da177e4 | 588 | u8 dn; /* now wide spread use */ |
1da177e4 LT |
589 | u8 acoustic; /* acoustic management */ |
590 | u8 media; /* disk, cdrom, tape, floppy, ... */ | |
1da177e4 LT |
591 | u8 ready_stat; /* min status value for drive ready */ |
592 | u8 mult_count; /* current multiple sector setting */ | |
593 | u8 mult_req; /* requested multiple sector setting */ | |
1da177e4 | 594 | u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ |
3a7d2484 | 595 | u8 bad_wstat; /* used for ignoring ATA_DF */ |
1da177e4 LT |
596 | u8 head; /* "real" number of heads */ |
597 | u8 sect; /* "real" sectors per track */ | |
598 | u8 bios_head; /* BIOS/fdisk/LILO number of heads */ | |
599 | u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ | |
600 | ||
baf08f0b BZ |
601 | /* delay this long before sending packet command */ |
602 | u8 pc_delay; | |
603 | ||
1da177e4 LT |
604 | unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ |
605 | unsigned int cyl; /* "real" number of cyls */ | |
abb596b2 | 606 | unsigned int drive_data; /* used by set_pio_mode/dev_select() */ |
1da177e4 LT |
607 | unsigned int failures; /* current failure count */ |
608 | unsigned int max_failures; /* maximum allowed failure count */ | |
dbe217af | 609 | u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ |
1da177e4 LT |
610 | |
611 | u64 capacity64; /* total number of sectors */ | |
612 | ||
613 | int lun; /* logical unit */ | |
614 | int crc_count; /* crc counter to reduce drive speed */ | |
b22b2ca4 BP |
615 | |
616 | unsigned long debug_mask; /* debugging levels switch */ | |
617 | ||
e3a59b4d HR |
618 | #ifdef CONFIG_BLK_DEV_IDEACPI |
619 | struct ide_acpi_drive_link *acpidata; | |
620 | #endif | |
1da177e4 LT |
621 | struct list_head list; |
622 | struct device gendev; | |
f36d4024 | 623 | struct completion gendev_rel_comp; /* to deal with device release() */ |
d7c26ebb | 624 | |
2b9efba4 BZ |
625 | /* current packet command */ |
626 | struct ide_atapi_pc *pc; | |
627 | ||
5e2040fd BZ |
628 | /* last failed packet command */ |
629 | struct ide_atapi_pc *failed_pc; | |
630 | ||
d7c26ebb | 631 | /* callback for packet commands */ |
03a2faae | 632 | int (*pc_callback)(struct ide_drive_s *, int); |
3b8ac539 | 633 | |
85e39035 BZ |
634 | void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *); |
635 | int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *, | |
636 | unsigned int, int); | |
637 | ||
d6251d44 BP |
638 | ide_startstop_t (*irq_handler)(struct ide_drive_s *); |
639 | ||
3b8ac539 | 640 | unsigned long atapi_flags; |
67c56364 BZ |
641 | |
642 | struct ide_atapi_pc request_sense_pc; | |
643 | struct request request_sense_rq; | |
d7c26ebb BP |
644 | }; |
645 | ||
646 | typedef struct ide_drive_s ide_drive_t; | |
1da177e4 | 647 | |
5aeddf90 BP |
648 | #define to_ide_device(dev) container_of(dev, ide_drive_t, gendev) |
649 | ||
650 | #define to_ide_drv(obj, cont_type) \ | |
8fed4368 | 651 | container_of(obj, struct cont_type, dev) |
5aeddf90 BP |
652 | |
653 | #define ide_drv_g(disk, cont_type) \ | |
654 | container_of((disk)->private_data, struct cont_type, driver) | |
8604affd | 655 | |
039788e1 | 656 | struct ide_port_info; |
1da177e4 | 657 | |
374e042c BZ |
658 | struct ide_tp_ops { |
659 | void (*exec_command)(struct hwif_s *, u8); | |
660 | u8 (*read_status)(struct hwif_s *); | |
661 | u8 (*read_altstatus)(struct hwif_s *); | |
ecf3a31d | 662 | void (*write_devctl)(struct hwif_s *, u8); |
374e042c | 663 | |
abb596b2 | 664 | void (*dev_select)(ide_drive_t *); |
22aa4b32 BZ |
665 | void (*tf_load)(ide_drive_t *, struct ide_cmd *); |
666 | void (*tf_read)(ide_drive_t *, struct ide_cmd *); | |
374e042c | 667 | |
adb1af98 BZ |
668 | void (*input_data)(ide_drive_t *, struct ide_cmd *, |
669 | void *, unsigned int); | |
670 | void (*output_data)(ide_drive_t *, struct ide_cmd *, | |
671 | void *, unsigned int); | |
374e042c BZ |
672 | }; |
673 | ||
674 | extern const struct ide_tp_ops default_tp_ops; | |
675 | ||
39b986a6 BZ |
676 | /** |
677 | * struct ide_port_ops - IDE port operations | |
678 | * | |
679 | * @init_dev: host specific initialization of a device | |
680 | * @set_pio_mode: routine to program host for PIO mode | |
681 | * @set_dma_mode: routine to program host for DMA mode | |
39b986a6 BZ |
682 | * @reset_poll: chipset polling based on hba specifics |
683 | * @pre_reset: chipset specific changes to default for device-hba resets | |
684 | * @resetproc: routine to reset controller after a disk reset | |
685 | * @maskproc: special host masking for drive selection | |
686 | * @quirkproc: check host's drive quirk list | |
bfa7d8e5 | 687 | * @clear_irq: clear IRQ |
39b986a6 BZ |
688 | * |
689 | * @mdma_filter: filter MDMA modes | |
690 | * @udma_filter: filter UDMA modes | |
691 | * | |
692 | * @cable_detect: detect cable type | |
693 | */ | |
ac95beed | 694 | struct ide_port_ops { |
e6d95bd1 | 695 | void (*init_dev)(ide_drive_t *); |
ac95beed | 696 | void (*set_pio_mode)(ide_drive_t *, const u8); |
ac95beed | 697 | void (*set_dma_mode)(ide_drive_t *, const u8); |
ac95beed | 698 | int (*reset_poll)(ide_drive_t *); |
ac95beed | 699 | void (*pre_reset)(ide_drive_t *); |
ac95beed | 700 | void (*resetproc)(ide_drive_t *); |
ac95beed | 701 | void (*maskproc)(ide_drive_t *, int); |
ac95beed | 702 | void (*quirkproc)(ide_drive_t *); |
bfa7d8e5 | 703 | void (*clear_irq)(ide_drive_t *); |
ac95beed BZ |
704 | |
705 | u8 (*mdma_filter)(ide_drive_t *); | |
706 | u8 (*udma_filter)(ide_drive_t *); | |
707 | ||
708 | u8 (*cable_detect)(struct hwif_s *); | |
709 | }; | |
710 | ||
5e37bdc0 BZ |
711 | struct ide_dma_ops { |
712 | void (*dma_host_set)(struct ide_drive_s *, int); | |
22981694 | 713 | int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *); |
5e37bdc0 BZ |
714 | void (*dma_start)(struct ide_drive_s *); |
715 | int (*dma_end)(struct ide_drive_s *); | |
716 | int (*dma_test_irq)(struct ide_drive_s *); | |
717 | void (*dma_lost_irq)(struct ide_drive_s *); | |
35c9b4da | 718 | /* below ones are optional */ |
8a4a5738 | 719 | int (*dma_check)(struct ide_drive_s *, struct ide_cmd *); |
22117d6e | 720 | int (*dma_timer_expiry)(struct ide_drive_s *); |
35c9b4da | 721 | void (*dma_clear)(struct ide_drive_s *); |
592b5315 SS |
722 | /* |
723 | * The following method is optional and only required to be | |
724 | * implemented for the SFF-8038i compatible controllers. | |
725 | */ | |
726 | u8 (*dma_sff_read_status)(struct hwif_s *); | |
5e37bdc0 BZ |
727 | }; |
728 | ||
08da591e BZ |
729 | struct ide_host; |
730 | ||
1da177e4 | 731 | typedef struct hwif_s { |
1da177e4 | 732 | struct hwif_s *mate; /* other hwif from same PCI chip */ |
1da177e4 LT |
733 | struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ |
734 | ||
08da591e BZ |
735 | struct ide_host *host; |
736 | ||
1da177e4 LT |
737 | char name[6]; /* name of interface, eg. "ide0" */ |
738 | ||
4c3032d8 BZ |
739 | struct ide_io_ports io_ports; |
740 | ||
1da177e4 | 741 | unsigned long sata_scr[SATA_NR_PORTS]; |
1da177e4 | 742 | |
2bd24a1c | 743 | ide_drive_t *devices[MAX_DRIVES + 1]; |
1da177e4 LT |
744 | |
745 | u8 major; /* our major number */ | |
746 | u8 index; /* 0 for ide0; 1 for ide1; ... */ | |
747 | u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ | |
1da177e4 | 748 | |
e95d9c6b | 749 | u32 host_flags; |
6a824c92 | 750 | |
4099d143 BZ |
751 | u8 pio_mask; |
752 | ||
1da177e4 LT |
753 | u8 ultra_mask; |
754 | u8 mwdma_mask; | |
755 | u8 swdma_mask; | |
756 | ||
49521f97 BZ |
757 | u8 cbl; /* cable type */ |
758 | ||
1da177e4 LT |
759 | hwif_chipset_t chipset; /* sub-module for tuning.. */ |
760 | ||
36501650 BZ |
761 | struct device *dev; |
762 | ||
18e181fe BZ |
763 | ide_ack_intr_t *ack_intr; |
764 | ||
1da177e4 LT |
765 | void (*rw_disk)(ide_drive_t *, struct request *); |
766 | ||
374e042c | 767 | const struct ide_tp_ops *tp_ops; |
ac95beed | 768 | const struct ide_port_ops *port_ops; |
f37afdac | 769 | const struct ide_dma_ops *dma_ops; |
bfa14b42 | 770 | |
1da177e4 LT |
771 | /* dma physical region descriptor table (cpu view) */ |
772 | unsigned int *dmatable_cpu; | |
773 | /* dma physical region descriptor table (dma view) */ | |
774 | dma_addr_t dmatable_dma; | |
2bbd57ca BZ |
775 | |
776 | /* maximum number of PRD table entries */ | |
777 | int prd_max_nents; | |
778 | /* PRD entry size in bytes */ | |
779 | int prd_ent_size; | |
780 | ||
1da177e4 LT |
781 | /* Scatter-gather list used to build the above */ |
782 | struct scatterlist *sg_table; | |
783 | int sg_max_nents; /* Maximum number of entries in it */ | |
1da177e4 | 784 | |
22aa4b32 | 785 | struct ide_cmd cmd; /* current command */ |
d6ff9f64 | 786 | |
1da177e4 LT |
787 | int rqsize; /* max sectors per request */ |
788 | int irq; /* our irq number */ | |
789 | ||
1da177e4 | 790 | unsigned long dma_base; /* base addr for dma ports */ |
1da177e4 | 791 | |
1da177e4 LT |
792 | unsigned long config_data; /* for use by chipset-specific code */ |
793 | unsigned long select_data; /* for use by chipset-specific code */ | |
794 | ||
020e322d SS |
795 | unsigned long extra_base; /* extra addr for dma ports */ |
796 | unsigned extra_ports; /* number of extra dma ports */ | |
797 | ||
1da177e4 | 798 | unsigned present : 1; /* this interface exists */ |
5b31f855 | 799 | unsigned busy : 1; /* serializes devices on a port */ |
1da177e4 | 800 | |
f74c9141 BZ |
801 | struct device gendev; |
802 | struct device *portdev; | |
803 | ||
f36d4024 | 804 | struct completion gendev_rel_comp; /* To deal with device release() */ |
1da177e4 LT |
805 | |
806 | void *hwif_data; /* extra hwif data */ | |
807 | ||
e3a59b4d HR |
808 | #ifdef CONFIG_BLK_DEV_IDEACPI |
809 | struct ide_acpi_hwif_link *acpidata; | |
810 | #endif | |
b65fac32 BZ |
811 | |
812 | /* IRQ handler, if active */ | |
813 | ide_startstop_t (*handler)(ide_drive_t *); | |
814 | ||
815 | /* BOOL: polling active & poll_timeout field valid */ | |
816 | unsigned int polling : 1; | |
817 | ||
818 | /* current drive */ | |
819 | ide_drive_t *cur_dev; | |
820 | ||
821 | /* current request */ | |
822 | struct request *rq; | |
823 | ||
824 | /* failsafe timer */ | |
825 | struct timer_list timer; | |
826 | /* timeout value during long polls */ | |
827 | unsigned long poll_timeout; | |
828 | /* queried upon timeouts */ | |
829 | int (*expiry)(ide_drive_t *); | |
830 | ||
831 | int req_gen; | |
832 | int req_gen_timer; | |
833 | ||
834 | spinlock_t lock; | |
22fc6ecc | 835 | } ____cacheline_internodealigned_in_smp ide_hwif_t; |
1da177e4 | 836 | |
a36223b0 BZ |
837 | #define MAX_HOST_PORTS 4 |
838 | ||
48c3c107 | 839 | struct ide_host { |
2bd24a1c | 840 | ide_hwif_t *ports[MAX_HOST_PORTS + 1]; |
48c3c107 | 841 | unsigned int n_ports; |
6cdf6eb3 | 842 | struct device *dev[2]; |
e354c1d8 | 843 | |
2ed0ef54 | 844 | int (*init_chipset)(struct pci_dev *); |
e354c1d8 BZ |
845 | |
846 | void (*get_lock)(irq_handler_t, void *); | |
847 | void (*release_lock)(void); | |
848 | ||
849d7130 | 849 | irq_handler_t irq_handler; |
e354c1d8 | 850 | |
ef0b0427 | 851 | unsigned long host_flags; |
255115fb BZ |
852 | |
853 | int irq_flags; | |
854 | ||
6cdf6eb3 | 855 | void *host_priv; |
bd53cbcc | 856 | ide_hwif_t *cur_port; /* for hosts requiring serialization */ |
5b31f855 BZ |
857 | |
858 | /* used for hosts requiring serialization */ | |
e720b9e4 | 859 | volatile unsigned long host_busy; |
48c3c107 BZ |
860 | }; |
861 | ||
5b31f855 BZ |
862 | #define IDE_HOST_BUSY 0 |
863 | ||
1da177e4 LT |
864 | /* |
865 | * internal ide interrupt handler type | |
866 | */ | |
1da177e4 LT |
867 | typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); |
868 | typedef int (ide_expiry_t)(ide_drive_t *); | |
869 | ||
0eea6458 | 870 | /* used by ide-cd, ide-floppy, etc. */ |
adb1af98 | 871 | typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned); |
0eea6458 | 872 | |
f9383c42 | 873 | extern struct mutex ide_setting_mtx; |
1da177e4 | 874 | |
92f1f8fd EO |
875 | /* |
876 | * configurable drive settings | |
877 | */ | |
878 | ||
879 | #define DS_SYNC (1 << 0) | |
880 | ||
881 | struct ide_devset { | |
882 | int (*get)(ide_drive_t *); | |
883 | int (*set)(ide_drive_t *, int); | |
884 | unsigned int flags; | |
885 | }; | |
886 | ||
887 | #define __DEVSET(_flags, _get, _set) { \ | |
888 | .flags = _flags, \ | |
889 | .get = _get, \ | |
890 | .set = _set, \ | |
891 | } | |
7662d046 | 892 | |
8185d5aa | 893 | #define ide_devset_get(name, field) \ |
92f1f8fd | 894 | static int get_##name(ide_drive_t *drive) \ |
8185d5aa BZ |
895 | { \ |
896 | return drive->field; \ | |
897 | } | |
898 | ||
899 | #define ide_devset_set(name, field) \ | |
92f1f8fd | 900 | static int set_##name(ide_drive_t *drive, int arg) \ |
8185d5aa BZ |
901 | { \ |
902 | drive->field = arg; \ | |
903 | return 0; \ | |
904 | } | |
905 | ||
97100fc8 BZ |
906 | #define ide_devset_get_flag(name, flag) \ |
907 | static int get_##name(ide_drive_t *drive) \ | |
908 | { \ | |
909 | return !!(drive->dev_flags & flag); \ | |
910 | } | |
911 | ||
912 | #define ide_devset_set_flag(name, flag) \ | |
913 | static int set_##name(ide_drive_t *drive, int arg) \ | |
914 | { \ | |
915 | if (arg) \ | |
916 | drive->dev_flags |= flag; \ | |
917 | else \ | |
918 | drive->dev_flags &= ~flag; \ | |
919 | return 0; \ | |
920 | } | |
921 | ||
92f1f8fd EO |
922 | #define __IDE_DEVSET(_name, _flags, _get, _set) \ |
923 | const struct ide_devset ide_devset_##_name = \ | |
924 | __DEVSET(_flags, _get, _set) | |
925 | ||
926 | #define IDE_DEVSET(_name, _flags, _get, _set) \ | |
927 | static __IDE_DEVSET(_name, _flags, _get, _set) | |
928 | ||
929 | #define ide_devset_rw(_name, _func) \ | |
930 | IDE_DEVSET(_name, 0, get_##_func, set_##_func) | |
931 | ||
932 | #define ide_devset_w(_name, _func) \ | |
933 | IDE_DEVSET(_name, 0, NULL, set_##_func) | |
934 | ||
f8790489 BZ |
935 | #define ide_ext_devset_rw(_name, _func) \ |
936 | __IDE_DEVSET(_name, 0, get_##_func, set_##_func) | |
937 | ||
938 | #define ide_ext_devset_rw_sync(_name, _func) \ | |
939 | __IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func) | |
92f1f8fd EO |
940 | |
941 | #define ide_decl_devset(_name) \ | |
942 | extern const struct ide_devset ide_devset_##_name | |
943 | ||
944 | ide_decl_devset(io_32bit); | |
945 | ide_decl_devset(keepsettings); | |
946 | ide_decl_devset(pio_mode); | |
947 | ide_decl_devset(unmaskirq); | |
948 | ide_decl_devset(using_dma); | |
949 | ||
7662d046 | 950 | #ifdef CONFIG_IDE_PROC_FS |
1da177e4 | 951 | /* |
92f1f8fd | 952 | * /proc/ide interface |
1da177e4 LT |
953 | */ |
954 | ||
92f1f8fd EO |
955 | #define ide_devset_rw_field(_name, _field) \ |
956 | ide_devset_get(_name, _field); \ | |
957 | ide_devset_set(_name, _field); \ | |
958 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) | |
959 | ||
97100fc8 BZ |
960 | #define ide_devset_rw_flag(_name, _field) \ |
961 | ide_devset_get_flag(_name, _field); \ | |
962 | ide_devset_set_flag(_name, _field); \ | |
963 | IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) | |
964 | ||
92f1f8fd EO |
965 | struct ide_proc_devset { |
966 | const char *name; | |
967 | const struct ide_devset *setting; | |
968 | int min, max; | |
969 | int (*mulf)(ide_drive_t *); | |
970 | int (*divf)(ide_drive_t *); | |
8185d5aa BZ |
971 | }; |
972 | ||
92f1f8fd EO |
973 | #define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \ |
974 | .name = __stringify(_name), \ | |
975 | .setting = &ide_devset_##_name, \ | |
976 | .min = _min, \ | |
977 | .max = _max, \ | |
978 | .mulf = _mulf, \ | |
979 | .divf = _divf, \ | |
8185d5aa BZ |
980 | } |
981 | ||
92f1f8fd EO |
982 | #define IDE_PROC_DEVSET(_name, _min, _max) \ |
983 | __IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL) | |
8185d5aa | 984 | |
1da177e4 LT |
985 | typedef struct { |
986 | const char *name; | |
987 | mode_t mode; | |
988 | read_proc_t *read_proc; | |
989 | write_proc_t *write_proc; | |
990 | } ide_proc_entry_t; | |
991 | ||
ecfd80e4 BZ |
992 | void proc_ide_create(void); |
993 | void proc_ide_destroy(void); | |
5cbf79cd | 994 | void ide_proc_register_port(ide_hwif_t *); |
d9270a3f | 995 | void ide_proc_port_register_devices(ide_hwif_t *); |
5b0c4b30 | 996 | void ide_proc_unregister_device(ide_drive_t *); |
5cbf79cd | 997 | void ide_proc_unregister_port(ide_hwif_t *); |
7f3c868b BZ |
998 | void ide_proc_register_driver(ide_drive_t *, struct ide_driver *); |
999 | void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *); | |
7662d046 | 1000 | |
1da177e4 LT |
1001 | read_proc_t proc_ide_read_capacity; |
1002 | read_proc_t proc_ide_read_geometry; | |
1003 | ||
1da177e4 LT |
1004 | /* |
1005 | * Standard exit stuff: | |
1006 | */ | |
1007 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ | |
1008 | { \ | |
1009 | len -= off; \ | |
1010 | if (len < count) { \ | |
1011 | *eof = 1; \ | |
1012 | if (len <= 0) \ | |
1013 | return 0; \ | |
1014 | } else \ | |
1015 | len = count; \ | |
1016 | *start = page + off; \ | |
1017 | return len; \ | |
1018 | } | |
1019 | #else | |
ecfd80e4 BZ |
1020 | static inline void proc_ide_create(void) { ; } |
1021 | static inline void proc_ide_destroy(void) { ; } | |
5cbf79cd | 1022 | static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } |
d9270a3f | 1023 | static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; } |
5b0c4b30 | 1024 | static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; } |
5cbf79cd | 1025 | static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } |
7f3c868b BZ |
1026 | static inline void ide_proc_register_driver(ide_drive_t *drive, |
1027 | struct ide_driver *driver) { ; } | |
1028 | static inline void ide_proc_unregister_driver(ide_drive_t *drive, | |
1029 | struct ide_driver *driver) { ; } | |
1da177e4 LT |
1030 | #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; |
1031 | #endif | |
1032 | ||
e1c7c464 BP |
1033 | enum { |
1034 | /* enter/exit functions */ | |
1035 | IDE_DBG_FUNC = (1 << 0), | |
1036 | /* sense key/asc handling */ | |
1037 | IDE_DBG_SENSE = (1 << 1), | |
1038 | /* packet commands handling */ | |
1039 | IDE_DBG_PC = (1 << 2), | |
1040 | /* request handling */ | |
1041 | IDE_DBG_RQ = (1 << 3), | |
1042 | /* driver probing/setup */ | |
1043 | IDE_DBG_PROBE = (1 << 4), | |
1044 | }; | |
1045 | ||
1046 | /* DRV_NAME has to be defined in the driver before using the macro below */ | |
088b1b88 BP |
1047 | #define __ide_debug_log(lvl, fmt, args...) \ |
1048 | { \ | |
1049 | if (unlikely(drive->debug_mask & lvl)) \ | |
1050 | printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \ | |
1051 | __func__, ## args); \ | |
e1c7c464 BP |
1052 | } |
1053 | ||
1da177e4 | 1054 | /* |
0d346ba0 | 1055 | * Power Management state machine (rq->pm->pm_step). |
1da177e4 | 1056 | * |
0d346ba0 | 1057 | * For each step, the core calls ide_start_power_step() first. |
1da177e4 LT |
1058 | * This can return: |
1059 | * - ide_stopped : In this case, the core calls us back again unless | |
1060 | * step have been set to ide_power_state_completed. | |
1061 | * - ide_started : In this case, the channel is left busy until an | |
1062 | * async event (interrupt) occurs. | |
0d346ba0 | 1063 | * Typically, ide_start_power_step() will issue a taskfile request with |
1da177e4 LT |
1064 | * do_rw_taskfile(). |
1065 | * | |
0d346ba0 | 1066 | * Upon reception of the interrupt, the core will call ide_complete_power_step() |
1da177e4 LT |
1067 | * with the error code if any. This routine should update the step value |
1068 | * and return. It should not start a new request. The core will call | |
0d346ba0 BZ |
1069 | * ide_start_power_step() for the new step value, unless step have been |
1070 | * set to IDE_PM_COMPLETED. | |
1da177e4 | 1071 | */ |
1da177e4 | 1072 | enum { |
0d346ba0 BZ |
1073 | IDE_PM_START_SUSPEND, |
1074 | IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND, | |
1075 | IDE_PM_STANDBY, | |
1076 | ||
1077 | IDE_PM_START_RESUME, | |
1078 | IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME, | |
1079 | IDE_PM_IDLE, | |
1080 | IDE_PM_RESTORE_DMA, | |
1081 | ||
1082 | IDE_PM_COMPLETED, | |
1da177e4 LT |
1083 | }; |
1084 | ||
e2984c62 BZ |
1085 | int generic_ide_suspend(struct device *, pm_message_t); |
1086 | int generic_ide_resume(struct device *); | |
1087 | ||
1088 | void ide_complete_power_step(ide_drive_t *, struct request *); | |
1089 | ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *); | |
3616b653 | 1090 | void ide_complete_pm_rq(ide_drive_t *, struct request *); |
e2984c62 BZ |
1091 | void ide_check_pm_state(ide_drive_t *, struct request *); |
1092 | ||
1da177e4 LT |
1093 | /* |
1094 | * Subdrivers support. | |
4ef3b8f4 LR |
1095 | * |
1096 | * The gendriver.owner field should be set to the module owner of this driver. | |
1097 | * The gendriver.name field should be set to the name of this driver | |
1da177e4 | 1098 | */ |
7f3c868b | 1099 | struct ide_driver { |
1da177e4 | 1100 | const char *version; |
1da177e4 | 1101 | ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); |
1da177e4 | 1102 | struct device_driver gen_driver; |
4031bbe4 RK |
1103 | int (*probe)(ide_drive_t *); |
1104 | void (*remove)(ide_drive_t *); | |
0d2157f7 | 1105 | void (*resume)(ide_drive_t *); |
4031bbe4 | 1106 | void (*shutdown)(ide_drive_t *); |
7662d046 | 1107 | #ifdef CONFIG_IDE_PROC_FS |
79cb3803 BZ |
1108 | ide_proc_entry_t * (*proc_entries)(ide_drive_t *); |
1109 | const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *); | |
7662d046 BZ |
1110 | #endif |
1111 | }; | |
1da177e4 | 1112 | |
7f3c868b | 1113 | #define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver) |
4031bbe4 | 1114 | |
08da591e BZ |
1115 | int ide_device_get(ide_drive_t *); |
1116 | void ide_device_put(ide_drive_t *); | |
1117 | ||
aa768773 BZ |
1118 | struct ide_ioctl_devset { |
1119 | unsigned int get_ioctl; | |
1120 | unsigned int set_ioctl; | |
92f1f8fd | 1121 | const struct ide_devset *setting; |
aa768773 BZ |
1122 | }; |
1123 | ||
1124 | int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int, | |
1125 | unsigned long, const struct ide_ioctl_devset *); | |
1126 | ||
1bddd9e6 | 1127 | int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long); |
1da177e4 | 1128 | |
ebae41a5 BZ |
1129 | extern int ide_vlb_clk; |
1130 | extern int ide_pci_clk; | |
1131 | ||
130e8867 | 1132 | unsigned int ide_rq_bytes(struct request *); |
1caf236d | 1133 | int ide_end_rq(ide_drive_t *, struct request *, int, unsigned int); |
327fa1c2 BZ |
1134 | void ide_kill_rq(ide_drive_t *, struct request *); |
1135 | ||
60c0cd02 BZ |
1136 | void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); |
1137 | void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); | |
1da177e4 | 1138 | |
35b5d0be BZ |
1139 | void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *, |
1140 | unsigned int); | |
1fc14258 | 1141 | |
9f87abe8 BZ |
1142 | void ide_pad_transfer(ide_drive_t *, int, int); |
1143 | ||
9892ec54 | 1144 | ide_startstop_t ide_error(ide_drive_t *, const char *, u8); |
1da177e4 | 1145 | |
4dde4492 | 1146 | void ide_fix_driveid(u16 *); |
01745112 | 1147 | |
1da177e4 LT |
1148 | extern void ide_fixstring(u8 *, const int, const int); |
1149 | ||
b163f46d BZ |
1150 | int ide_busy_sleep(ide_hwif_t *, unsigned long, int); |
1151 | ||
74af21cf | 1152 | int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); |
1da177e4 | 1153 | |
c4e66c36 | 1154 | ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *); |
11938c92 | 1155 | ide_startstop_t ide_do_devset(ide_drive_t *, struct request *); |
c4e66c36 | 1156 | |
1da177e4 LT |
1157 | extern ide_startstop_t ide_do_reset (ide_drive_t *); |
1158 | ||
92f1f8fd EO |
1159 | extern int ide_devset_execute(ide_drive_t *drive, |
1160 | const struct ide_devset *setting, int arg); | |
1161 | ||
22aa4b32 | 1162 | void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8); |
f974b196 | 1163 | int ide_complete_rq(ide_drive_t *, int, unsigned int); |
1da177e4 | 1164 | |
089c5c7e | 1165 | void ide_tf_dump(const char *, struct ide_taskfile *); |
1da177e4 | 1166 | |
374e042c BZ |
1167 | void ide_exec_command(ide_hwif_t *, u8); |
1168 | u8 ide_read_status(ide_hwif_t *); | |
1169 | u8 ide_read_altstatus(ide_hwif_t *); | |
ecf3a31d | 1170 | void ide_write_devctl(ide_hwif_t *, u8); |
374e042c | 1171 | |
abb596b2 | 1172 | void ide_dev_select(ide_drive_t *); |
22aa4b32 BZ |
1173 | void ide_tf_load(ide_drive_t *, struct ide_cmd *); |
1174 | void ide_tf_read(ide_drive_t *, struct ide_cmd *); | |
374e042c | 1175 | |
adb1af98 BZ |
1176 | void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); |
1177 | void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); | |
374e042c | 1178 | |
ed4af48f | 1179 | void SELECT_MASK(ide_drive_t *, int); |
1da177e4 | 1180 | |
92eb4380 | 1181 | u8 ide_read_error(ide_drive_t *); |
1823649b | 1182 | void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *); |
92eb4380 | 1183 | |
51509eec BZ |
1184 | int ide_check_atapi_device(ide_drive_t *, const char *); |
1185 | ||
7bf7420a BZ |
1186 | void ide_init_pc(struct ide_atapi_pc *); |
1187 | ||
4abdc6ee EO |
1188 | /* Disk head parking */ |
1189 | extern wait_queue_head_t ide_park_wq; | |
1190 | ssize_t ide_park_show(struct device *dev, struct device_attribute *attr, | |
1191 | char *buf); | |
1192 | ssize_t ide_park_store(struct device *dev, struct device_attribute *attr, | |
1193 | const char *buf, size_t len); | |
1194 | ||
7645c151 BZ |
1195 | /* |
1196 | * Special requests for ide-tape block device strategy routine. | |
1197 | * | |
1198 | * In order to service a character device command, we add special requests to | |
1199 | * the tail of our block device request queue and wait for their completion. | |
1200 | */ | |
1201 | enum { | |
1202 | REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */ | |
1203 | REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */ | |
1204 | REQ_IDETAPE_READ = (1 << 2), | |
1205 | REQ_IDETAPE_WRITE = (1 << 3), | |
1206 | }; | |
1207 | ||
2ac07d92 | 1208 | int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *); |
7645c151 | 1209 | |
de699ad5 | 1210 | int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *); |
0c8a6c7a | 1211 | int ide_do_start_stop(ide_drive_t *, struct gendisk *, int); |
0578042d | 1212 | int ide_set_media_lock(ide_drive_t *, struct gendisk *, int); |
6b0da28b BZ |
1213 | void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *); |
1214 | void ide_retry_pc(ide_drive_t *, struct gendisk *); | |
0578042d | 1215 | |
4cad085e | 1216 | int ide_cd_expiry(ide_drive_t *); |
844b9468 | 1217 | |
392de1d5 BP |
1218 | int ide_cd_get_xferlen(struct request *); |
1219 | ||
b788ee9c | 1220 | ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *); |
594c16d8 | 1221 | |
22aa4b32 | 1222 | ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *); |
1da177e4 | 1223 | |
a08915ba BZ |
1224 | void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int); |
1225 | ||
adb1af98 | 1226 | void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8); |
4d7a984b | 1227 | |
22aa4b32 BZ |
1228 | int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16); |
1229 | int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *); | |
9a3c49be | 1230 | |
22aa4b32 | 1231 | int ide_taskfile_ioctl(ide_drive_t *, unsigned long); |
1da177e4 | 1232 | |
2ebe1d9e BZ |
1233 | int ide_dev_read_id(ide_drive_t *, u8, u16 *); |
1234 | ||
1da177e4 | 1235 | extern int ide_driveid_update(ide_drive_t *); |
1da177e4 LT |
1236 | extern int ide_config_drive_speed(ide_drive_t *, u8); |
1237 | extern u8 eighty_ninty_three (ide_drive_t *); | |
1da177e4 LT |
1238 | extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); |
1239 | ||
1240 | extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); | |
1241 | ||
1da177e4 LT |
1242 | extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); |
1243 | ||
1da177e4 | 1244 | extern void ide_timer_expiry(unsigned long); |
7d12e780 | 1245 | extern irqreturn_t ide_intr(int irq, void *dev_id); |
165125e1 | 1246 | extern void do_ide_request(struct request_queue *); |
1da177e4 LT |
1247 | |
1248 | void ide_init_disk(struct gendisk *, ide_drive_t *); | |
1249 | ||
6d208b39 | 1250 | #ifdef CONFIG_IDEPCI_PCIBUS_ORDER |
725522b5 GKH |
1251 | extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); |
1252 | #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) | |
6d208b39 BZ |
1253 | #else |
1254 | #define ide_pci_register_driver(d) pci_register_driver(d) | |
1255 | #endif | |
1256 | ||
6636487e BZ |
1257 | static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) |
1258 | { | |
1259 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) | |
1260 | return 1; | |
1261 | return 0; | |
1262 | } | |
1263 | ||
86ccf37c | 1264 | void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, |
48c3c107 | 1265 | hw_regs_t *, hw_regs_t **); |
85620436 | 1266 | void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); |
1da177e4 | 1267 | |
8e882ba1 | 1268 | #ifdef CONFIG_BLK_DEV_IDEDMA_PCI |
b123f56e BZ |
1269 | int ide_pci_set_master(struct pci_dev *, const char *); |
1270 | unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *); | |
ebb00fb5 | 1271 | int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *); |
b123f56e | 1272 | int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); |
c413b9b9 | 1273 | #else |
b123f56e BZ |
1274 | static inline int ide_hwif_setup_dma(ide_hwif_t *hwif, |
1275 | const struct ide_port_info *d) | |
1276 | { | |
1277 | return -EINVAL; | |
1278 | } | |
c413b9b9 BZ |
1279 | #endif |
1280 | ||
c0ae5023 | 1281 | struct ide_pci_enablebit { |
1da177e4 LT |
1282 | u8 reg; /* byte pci reg holding the enable-bit */ |
1283 | u8 mask; /* mask to isolate the enable-bit */ | |
1284 | u8 val; /* value of masked reg when "enabled" */ | |
c0ae5023 | 1285 | }; |
1da177e4 LT |
1286 | |
1287 | enum { | |
1288 | /* Uses ISA control ports not PCI ones. */ | |
a5d8c5c8 | 1289 | IDE_HFLAG_ISA_PORTS = (1 << 0), |
6a824c92 | 1290 | /* single port device */ |
a5d8c5c8 | 1291 | IDE_HFLAG_SINGLE = (1 << 1), |
6a824c92 BZ |
1292 | /* don't use legacy PIO blacklist */ |
1293 | IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), | |
e277f91f BZ |
1294 | /* set for the second port of QD65xx */ |
1295 | IDE_HFLAG_QD_2ND_PORT = (1 << 3), | |
26bcb879 BZ |
1296 | /* use PIO8/9 for prefetch off/on */ |
1297 | IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), | |
1298 | /* use PIO6/7 for fast-devsel off/on */ | |
1299 | IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), | |
1300 | /* use 100-102 and 200-202 PIO values to set DMA modes */ | |
1301 | IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), | |
aedea591 BZ |
1302 | /* |
1303 | * keep DMA setting when programming PIO mode, may be used only | |
1304 | * for hosts which have separate PIO and DMA timings (ie. PMAC) | |
1305 | */ | |
1306 | IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), | |
88b2b32b BZ |
1307 | /* program host for the transfer mode after programming device */ |
1308 | IDE_HFLAG_POST_SET_MODE = (1 << 8), | |
1309 | /* don't program host/device for the transfer mode ("smart" hosts) */ | |
1310 | IDE_HFLAG_NO_SET_MODE = (1 << 9), | |
0ae2e178 BZ |
1311 | /* trust BIOS for programming chipset/device for DMA */ |
1312 | IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), | |
cafa027b BZ |
1313 | /* host is CS5510/CS5520 */ |
1314 | IDE_HFLAG_CS5520 = (1 << 11), | |
33c1002e BZ |
1315 | /* ATAPI DMA is unsupported */ |
1316 | IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), | |
5e71d9c5 BZ |
1317 | /* set if host is a "non-bootable" controller */ |
1318 | IDE_HFLAG_NON_BOOTABLE = (1 << 13), | |
47b68788 BZ |
1319 | /* host doesn't support DMA */ |
1320 | IDE_HFLAG_NO_DMA = (1 << 14), | |
1321 | /* check if host is PCI IDE device before allowing DMA */ | |
1322 | IDE_HFLAG_NO_AUTODMA = (1 << 15), | |
c5dd43ec BZ |
1323 | /* host uses MMIO */ |
1324 | IDE_HFLAG_MMIO = (1 << 16), | |
238e4f14 BZ |
1325 | /* no LBA48 */ |
1326 | IDE_HFLAG_NO_LBA48 = (1 << 17), | |
1327 | /* no LBA48 DMA */ | |
1328 | IDE_HFLAG_NO_LBA48_DMA = (1 << 18), | |
ed67b923 BZ |
1329 | /* data FIFO is cleared by an error */ |
1330 | IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), | |
1c51361a BZ |
1331 | /* serialize ports */ |
1332 | IDE_HFLAG_SERIALIZE = (1 << 20), | |
2787cb8a BZ |
1333 | /* host is DTC2278 */ |
1334 | IDE_HFLAG_DTC2278 = (1 << 21), | |
c094ea07 BZ |
1335 | /* 4 devices on a single set of I/O ports */ |
1336 | IDE_HFLAG_4DRIVES = (1 << 22), | |
1f66019b BZ |
1337 | /* host is TRM290 */ |
1338 | IDE_HFLAG_TRM290 = (1 << 23), | |
caea7602 BZ |
1339 | /* use 32-bit I/O ops */ |
1340 | IDE_HFLAG_IO_32BIT = (1 << 24), | |
1341 | /* unmask IRQs */ | |
1342 | IDE_HFLAG_UNMASK_IRQS = (1 << 25), | |
6636487e | 1343 | IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26), |
1fd18905 BZ |
1344 | /* serialize ports if DMA is possible (for sl82c105) */ |
1345 | IDE_HFLAG_SERIALIZE_DMA = (1 << 27), | |
8ac2b42a BZ |
1346 | /* force host out of "simplex" mode */ |
1347 | IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), | |
4166c199 BZ |
1348 | /* DSC overlap is unsupported */ |
1349 | IDE_HFLAG_NO_DSC = (1 << 29), | |
807b90d0 BZ |
1350 | /* never use 32-bit I/O ops */ |
1351 | IDE_HFLAG_NO_IO_32BIT = (1 << 30), | |
1352 | /* never unmask IRQs */ | |
1353 | IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), | |
1da177e4 LT |
1354 | }; |
1355 | ||
7cab14a7 | 1356 | #ifdef CONFIG_BLK_DEV_OFFBOARD |
7cab14a7 | 1357 | # define IDE_HFLAG_OFF_BOARD 0 |
5e71d9c5 BZ |
1358 | #else |
1359 | # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE | |
7cab14a7 BZ |
1360 | #endif |
1361 | ||
039788e1 | 1362 | struct ide_port_info { |
1da177e4 | 1363 | char *name; |
e354c1d8 | 1364 | |
2ed0ef54 | 1365 | int (*init_chipset)(struct pci_dev *); |
e354c1d8 BZ |
1366 | |
1367 | void (*get_lock)(irq_handler_t, void *); | |
1368 | void (*release_lock)(void); | |
1369 | ||
1da177e4 LT |
1370 | void (*init_iops)(ide_hwif_t *); |
1371 | void (*init_hwif)(ide_hwif_t *); | |
b123f56e BZ |
1372 | int (*init_dma)(ide_hwif_t *, |
1373 | const struct ide_port_info *); | |
ac95beed | 1374 | |
374e042c | 1375 | const struct ide_tp_ops *tp_ops; |
ac95beed | 1376 | const struct ide_port_ops *port_ops; |
f37afdac | 1377 | const struct ide_dma_ops *dma_ops; |
ac95beed | 1378 | |
c0ae5023 BZ |
1379 | struct ide_pci_enablebit enablebits[2]; |
1380 | ||
528a572d | 1381 | hwif_chipset_t chipset; |
6b492496 BZ |
1382 | |
1383 | u16 max_sectors; /* if < than the default one */ | |
1384 | ||
9ffcf364 | 1385 | u32 host_flags; |
255115fb BZ |
1386 | |
1387 | int irq_flags; | |
1388 | ||
4099d143 | 1389 | u8 pio_mask; |
5f8b6c34 BZ |
1390 | u8 swdma_mask; |
1391 | u8 mwdma_mask; | |
18137207 | 1392 | u8 udma_mask; |
039788e1 | 1393 | }; |
1da177e4 | 1394 | |
6cdf6eb3 BZ |
1395 | int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *); |
1396 | int ide_pci_init_two(struct pci_dev *, struct pci_dev *, | |
1397 | const struct ide_port_info *, void *); | |
ef0b0427 | 1398 | void ide_pci_remove(struct pci_dev *); |
1da177e4 | 1399 | |
feb22b7f BZ |
1400 | #ifdef CONFIG_PM |
1401 | int ide_pci_suspend(struct pci_dev *, pm_message_t); | |
1402 | int ide_pci_resume(struct pci_dev *); | |
1403 | #else | |
1404 | #define ide_pci_suspend NULL | |
1405 | #define ide_pci_resume NULL | |
1406 | #endif | |
1407 | ||
22981694 | 1408 | void ide_map_sg(ide_drive_t *, struct ide_cmd *); |
bf717c0a | 1409 | void ide_init_sg_cmd(struct ide_cmd *, unsigned int); |
1da177e4 LT |
1410 | |
1411 | #define BAD_DMA_DRIVE 0 | |
1412 | #define GOOD_DMA_DRIVE 1 | |
1413 | ||
65e5f2e3 JC |
1414 | struct drive_list_entry { |
1415 | const char *id_model; | |
1416 | const char *id_firmware; | |
1417 | }; | |
1418 | ||
4dde4492 | 1419 | int ide_in_drive_list(u16 *, const struct drive_list_entry *); |
a5b7e70d BZ |
1420 | |
1421 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
2dbe7e91 | 1422 | int ide_dma_good_drive(ide_drive_t *); |
1da177e4 | 1423 | int __ide_dma_bad_drive(ide_drive_t *); |
3ab7efe8 | 1424 | int ide_id_dma_bug(ide_drive_t *); |
7670df73 BZ |
1425 | |
1426 | u8 ide_find_dma_mode(ide_drive_t *, u8); | |
1427 | ||
1428 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) | |
1429 | { | |
1430 | return ide_find_dma_mode(drive, XFER_UDMA_6); | |
1431 | } | |
1432 | ||
4a546e04 | 1433 | void ide_dma_off_quietly(ide_drive_t *); |
7469aaf6 | 1434 | void ide_dma_off(ide_drive_t *); |
4a546e04 | 1435 | void ide_dma_on(ide_drive_t *); |
3608b5d7 | 1436 | int ide_set_dma(ide_drive_t *); |
578cfa0d | 1437 | void ide_check_dma_crc(ide_drive_t *); |
1da177e4 LT |
1438 | ide_startstop_t ide_dma_intr(ide_drive_t *); |
1439 | ||
2bbd57ca BZ |
1440 | int ide_allocate_dma_engine(ide_hwif_t *); |
1441 | void ide_release_dma_engine(ide_hwif_t *); | |
1442 | ||
5ae5412d | 1443 | int ide_dma_prepare(ide_drive_t *, struct ide_cmd *); |
f094d4d8 | 1444 | void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *); |
062f9f02 | 1445 | |
8e882ba1 | 1446 | #ifdef CONFIG_BLK_DEV_IDEDMA_SFF |
2dbe7e91 | 1447 | int config_drive_for_dma(ide_drive_t *); |
22981694 | 1448 | int ide_build_dmatable(ide_drive_t *, struct ide_cmd *); |
15ce926a | 1449 | void ide_dma_host_set(ide_drive_t *, int); |
22981694 | 1450 | int ide_dma_setup(ide_drive_t *, struct ide_cmd *); |
1da177e4 | 1451 | extern void ide_dma_start(ide_drive_t *); |
653bcf52 | 1452 | int ide_dma_end(ide_drive_t *); |
f37afdac | 1453 | int ide_dma_test_irq(ide_drive_t *); |
22117d6e | 1454 | int ide_dma_sff_timer_expiry(ide_drive_t *); |
592b5315 | 1455 | u8 ide_dma_sff_read_status(ide_hwif_t *); |
71fc9fcc | 1456 | extern const struct ide_dma_ops sff_dma_ops; |
2dbe7e91 BZ |
1457 | #else |
1458 | static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } | |
8e882ba1 | 1459 | #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ |
1da177e4 | 1460 | |
de23ec9c | 1461 | void ide_dma_lost_irq(ide_drive_t *); |
65ca5377 | 1462 | ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int); |
de23ec9c | 1463 | |
1da177e4 | 1464 | #else |
3ab7efe8 | 1465 | static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; } |
7670df73 | 1466 | static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } |
2d5eaa6d | 1467 | static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } |
4a546e04 | 1468 | static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } |
7469aaf6 | 1469 | static inline void ide_dma_off(ide_drive_t *drive) { ; } |
4a546e04 | 1470 | static inline void ide_dma_on(ide_drive_t *drive) { ; } |
1da177e4 | 1471 | static inline void ide_dma_verbose(ide_drive_t *drive) { ; } |
3608b5d7 | 1472 | static inline int ide_set_dma(ide_drive_t *drive) { return 1; } |
578cfa0d | 1473 | static inline void ide_check_dma_crc(ide_drive_t *drive) { ; } |
22117d6e | 1474 | static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; } |
65ca5377 | 1475 | static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; } |
0d1bad21 | 1476 | static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; } |
5ae5412d BZ |
1477 | static inline int ide_dma_prepare(ide_drive_t *drive, |
1478 | struct ide_cmd *cmd) { return 1; } | |
f094d4d8 BZ |
1479 | static inline void ide_dma_unmap_sg(ide_drive_t *drive, |
1480 | struct ide_cmd *cmd) { ; } | |
2bbd57ca | 1481 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
1da177e4 | 1482 | |
e3a59b4d | 1483 | #ifdef CONFIG_BLK_DEV_IDEACPI |
8b803bd1 | 1484 | int ide_acpi_init(void); |
e3a59b4d HR |
1485 | extern int ide_acpi_exec_tfs(ide_drive_t *drive); |
1486 | extern void ide_acpi_get_timing(ide_hwif_t *hwif); | |
1487 | extern void ide_acpi_push_timing(ide_hwif_t *hwif); | |
8b803bd1 | 1488 | void ide_acpi_init_port(ide_hwif_t *); |
eafd88a3 | 1489 | void ide_acpi_port_init_devices(ide_hwif_t *); |
5e32132b | 1490 | extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); |
e3a59b4d | 1491 | #else |
8b803bd1 | 1492 | static inline int ide_acpi_init(void) { return 0; } |
e3a59b4d HR |
1493 | static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } |
1494 | static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } | |
1495 | static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } | |
8b803bd1 | 1496 | static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; } |
eafd88a3 | 1497 | static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; } |
5e32132b | 1498 | static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} |
e3a59b4d HR |
1499 | #endif |
1500 | ||
1da177e4 LT |
1501 | void ide_register_region(struct gendisk *); |
1502 | void ide_unregister_region(struct gendisk *); | |
1503 | ||
f01393e4 | 1504 | void ide_undecoded_slave(ide_drive_t *); |
1da177e4 | 1505 | |
9fd91d95 | 1506 | void ide_port_apply_params(ide_hwif_t *); |
ebdab07d | 1507 | int ide_sysfs_register_port(ide_hwif_t *); |
9fd91d95 | 1508 | |
48c3c107 | 1509 | struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **); |
8a69580e | 1510 | void ide_host_free(struct ide_host *); |
48c3c107 BZ |
1511 | int ide_host_register(struct ide_host *, const struct ide_port_info *, |
1512 | hw_regs_t **); | |
6f904d01 BZ |
1513 | int ide_host_add(const struct ide_port_info *, hw_regs_t **, |
1514 | struct ide_host **); | |
48c3c107 | 1515 | void ide_host_remove(struct ide_host *); |
0bfeee7d | 1516 | int ide_legacy_device_add(const struct ide_port_info *, unsigned long); |
2dde7861 BZ |
1517 | void ide_port_unregister_devices(ide_hwif_t *); |
1518 | void ide_port_scan(ide_hwif_t *); | |
1da177e4 LT |
1519 | |
1520 | static inline void *ide_get_hwifdata (ide_hwif_t * hwif) | |
1521 | { | |
1522 | return hwif->hwif_data; | |
1523 | } | |
1524 | ||
1525 | static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) | |
1526 | { | |
1527 | hwif->hwif_data = data; | |
1528 | } | |
1529 | ||
1da177e4 | 1530 | extern void ide_toggle_bounce(ide_drive_t *drive, int on); |
1da177e4 | 1531 | |
a501633c | 1532 | u64 ide_get_lba_addr(struct ide_taskfile *, int); |
1da177e4 LT |
1533 | u8 ide_dump_status(ide_drive_t *, const char *, u8); |
1534 | ||
3be53f3f BZ |
1535 | struct ide_timing { |
1536 | u8 mode; | |
1537 | u8 setup; /* t1 */ | |
1538 | u16 act8b; /* t2 for 8-bit io */ | |
1539 | u16 rec8b; /* t2i for 8-bit io */ | |
1540 | u16 cyc8b; /* t0 for 8-bit io */ | |
1541 | u16 active; /* t2 or tD */ | |
1542 | u16 recover; /* t2i or tK */ | |
1543 | u16 cycle; /* t0 */ | |
1544 | u16 udma; /* t2CYCTYP/2 */ | |
1545 | }; | |
1546 | ||
1547 | enum { | |
1548 | IDE_TIMING_SETUP = (1 << 0), | |
1549 | IDE_TIMING_ACT8B = (1 << 1), | |
1550 | IDE_TIMING_REC8B = (1 << 2), | |
1551 | IDE_TIMING_CYC8B = (1 << 3), | |
1552 | IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B | | |
1553 | IDE_TIMING_CYC8B, | |
1554 | IDE_TIMING_ACTIVE = (1 << 4), | |
1555 | IDE_TIMING_RECOVER = (1 << 5), | |
1556 | IDE_TIMING_CYCLE = (1 << 6), | |
1557 | IDE_TIMING_UDMA = (1 << 7), | |
1558 | IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT | | |
1559 | IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER | | |
1560 | IDE_TIMING_CYCLE | IDE_TIMING_UDMA, | |
1561 | }; | |
1562 | ||
f06ab340 | 1563 | struct ide_timing *ide_timing_find_mode(u8); |
c9d6c1a2 | 1564 | u16 ide_pio_cycle_time(ide_drive_t *, u8); |
f06ab340 BZ |
1565 | void ide_timing_merge(struct ide_timing *, struct ide_timing *, |
1566 | struct ide_timing *, unsigned int); | |
1567 | int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int); | |
1568 | ||
7eeaaaa5 | 1569 | #ifdef CONFIG_IDE_XFER_MODE |
9ad54093 | 1570 | int ide_scan_pio_blacklist(char *); |
7eeaaaa5 | 1571 | const char *ide_xfer_verbose(u8); |
2134758d | 1572 | u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); |
88b2b32b BZ |
1573 | int ide_set_pio_mode(ide_drive_t *, u8); |
1574 | int ide_set_dma_mode(ide_drive_t *, u8); | |
26bcb879 | 1575 | void ide_set_pio(ide_drive_t *, u8); |
7eeaaaa5 BZ |
1576 | int ide_set_xfer_rate(ide_drive_t *, u8); |
1577 | #else | |
1578 | static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; } | |
1579 | static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; } | |
1580 | #endif | |
26bcb879 BZ |
1581 | |
1582 | static inline void ide_set_max_pio(ide_drive_t *drive) | |
1583 | { | |
1584 | ide_set_pio(drive, 255); | |
1585 | } | |
1da177e4 | 1586 | |
ebdab07d BZ |
1587 | char *ide_media_string(ide_drive_t *); |
1588 | ||
1589 | extern struct device_attribute ide_dev_attrs[]; | |
1da177e4 | 1590 | extern struct bus_type ide_bus_type; |
f74c9141 | 1591 | extern struct class *ide_port_class; |
1da177e4 | 1592 | |
7b9f25b5 BZ |
1593 | static inline void ide_dump_identify(u8 *id) |
1594 | { | |
1595 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0); | |
1596 | } | |
1597 | ||
86b37860 CL |
1598 | static inline int hwif_to_node(ide_hwif_t *hwif) |
1599 | { | |
96f80219 | 1600 | return hwif->dev ? dev_to_node(hwif->dev) : -1; |
86b37860 CL |
1601 | } |
1602 | ||
7e59ea21 | 1603 | static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive) |
1b678347 | 1604 | { |
5e7f3a46 | 1605 | ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1]; |
1b678347 | 1606 | |
97100fc8 | 1607 | return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL; |
1b678347 | 1608 | } |
2bd24a1c BZ |
1609 | |
1610 | #define ide_port_for_each_dev(i, dev, port) \ | |
1611 | for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) | |
1612 | ||
7ed5b157 BZ |
1613 | #define ide_port_for_each_present_dev(i, dev, port) \ |
1614 | for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \ | |
1615 | if ((dev)->dev_flags & IDE_DFLAG_PRESENT) | |
1616 | ||
2bd24a1c BZ |
1617 | #define ide_host_for_each_port(i, port, host) \ |
1618 | for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++) | |
1619 | ||
1da177e4 | 1620 | #endif /* _IDE_H */ |