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79a9becd AC |
1 | #ifndef __LINUX_GPIO_DRIVER_H |
2 | #define __LINUX_GPIO_DRIVER_H | |
3 | ||
4 | #include <linux/types.h> | |
c9a9972b | 5 | #include <linux/module.h> |
14250520 LW |
6 | #include <linux/irq.h> |
7 | #include <linux/irqchip/chained_irq.h> | |
8 | #include <linux/irqdomain.h> | |
79a9becd AC |
9 | |
10 | struct device; | |
11 | struct gpio_desc; | |
c9a9972b AC |
12 | struct of_phandle_args; |
13 | struct device_node; | |
f3ed0b66 | 14 | struct seq_file; |
79a9becd | 15 | |
bb1e88cc AC |
16 | #ifdef CONFIG_GPIOLIB |
17 | ||
79a9becd AC |
18 | /** |
19 | * struct gpio_chip - abstract a GPIO controller | |
20 | * @label: for diagnostics | |
21 | * @dev: optional device providing the GPIOs | |
22 | * @owner: helps prevent removal of modules exporting active GPIOs | |
23 | * @list: links gpio_chips together for traversal | |
24 | * @request: optional hook for chip-specific activation, such as | |
25 | * enabling module power and clock; may sleep | |
26 | * @free: optional hook for chip-specific deactivation, such as | |
27 | * disabling module power and clock; may sleep | |
28 | * @get_direction: returns direction for signal "offset", 0=out, 1=in, | |
29 | * (same as GPIOF_DIR_XXX), or negative error | |
30 | * @direction_input: configures signal "offset" as input, or returns error | |
31 | * @direction_output: configures signal "offset" as output, or returns error | |
32 | * @get: returns value for signal "offset"; for output signals this | |
33 | * returns either the value actually sensed, or zero | |
34 | * @set: assigns output value for signal "offset" | |
35 | * @set_debounce: optional hook for setting debounce time for specified gpio in | |
36 | * interrupt triggered gpio chips | |
37 | * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; | |
38 | * implementation may not sleep | |
39 | * @dbg_show: optional routine to show contents in debugfs; default code | |
40 | * will be used when this is omitted, but custom code can show extra | |
41 | * state (such as pullup/pulldown configuration). | |
42 | * @base: identifies the first GPIO number handled by this chip; or, if | |
43 | * negative during registration, requests dynamic ID allocation. | |
44 | * @ngpio: the number of GPIOs handled by this controller; the last GPIO | |
45 | * handled is (base + ngpio - 1). | |
46 | * @desc: array of ngpio descriptors. Private. | |
79a9becd AC |
47 | * @names: if set, must be an array of strings to use as alternative |
48 | * names for the GPIOs in this chip. Any entry in the array | |
49 | * may be NULL if there is no alias for the GPIO, however the | |
50 | * array must be @ngpio entries long. A name can include a single printk | |
51 | * format specifier for an unsigned int. It is substituted by the actual | |
52 | * number of the gpio. | |
9fb1f39e | 53 | * @can_sleep: flag must be set iff get()/set() methods sleep, as they |
1c8732bb LW |
54 | * must while accessing GPIO expander chips over I2C or SPI. This |
55 | * implies that if the chip supports IRQs, these IRQs need to be threaded | |
56 | * as the chip access may sleep when e.g. reading out the IRQ status | |
57 | * registers. | |
9fb1f39e | 58 | * @exported: flags if the gpiochip is exported for use from sysfs. Private. |
79a9becd AC |
59 | * |
60 | * A gpio_chip can help platforms abstract various sources of GPIOs so | |
61 | * they can all be accessed through a common programing interface. | |
62 | * Example sources would be SOC controllers, FPGAs, multifunction | |
63 | * chips, dedicated GPIO expanders, and so on. | |
64 | * | |
65 | * Each chip controls a number of signals, identified in method calls | |
66 | * by "offset" values in the range 0..(@ngpio - 1). When those signals | |
67 | * are referenced through calls like gpio_get_value(gpio), the offset | |
68 | * is calculated by subtracting @base from the gpio number. | |
69 | */ | |
70 | struct gpio_chip { | |
71 | const char *label; | |
72 | struct device *dev; | |
73 | struct module *owner; | |
74 | struct list_head list; | |
75 | ||
76 | int (*request)(struct gpio_chip *chip, | |
77 | unsigned offset); | |
78 | void (*free)(struct gpio_chip *chip, | |
79 | unsigned offset); | |
80 | int (*get_direction)(struct gpio_chip *chip, | |
81 | unsigned offset); | |
82 | int (*direction_input)(struct gpio_chip *chip, | |
83 | unsigned offset); | |
84 | int (*direction_output)(struct gpio_chip *chip, | |
85 | unsigned offset, int value); | |
86 | int (*get)(struct gpio_chip *chip, | |
87 | unsigned offset); | |
88 | void (*set)(struct gpio_chip *chip, | |
89 | unsigned offset, int value); | |
90 | int (*set_debounce)(struct gpio_chip *chip, | |
91 | unsigned offset, | |
92 | unsigned debounce); | |
93 | ||
94 | int (*to_irq)(struct gpio_chip *chip, | |
95 | unsigned offset); | |
96 | ||
97 | void (*dbg_show)(struct seq_file *s, | |
98 | struct gpio_chip *chip); | |
99 | int base; | |
100 | u16 ngpio; | |
101 | struct gpio_desc *desc; | |
102 | const char *const *names; | |
9fb1f39e LW |
103 | bool can_sleep; |
104 | bool exported; | |
79a9becd | 105 | |
14250520 LW |
106 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
107 | /* | |
108 | * With CONFIG_GPIO_IRQCHIP we get an irqchip inside the gpiolib | |
109 | * to handle IRQs for most practical cases. | |
110 | */ | |
111 | struct irq_chip *irqchip; | |
112 | struct irq_domain *irqdomain; | |
c3626fde | 113 | unsigned int irq_base; |
14250520 LW |
114 | irq_flow_handler_t irq_handler; |
115 | unsigned int irq_default_type; | |
116 | #endif | |
117 | ||
79a9becd AC |
118 | #if defined(CONFIG_OF_GPIO) |
119 | /* | |
120 | * If CONFIG_OF is enabled, then all GPIO controllers described in the | |
121 | * device tree automatically may have an OF translation | |
122 | */ | |
123 | struct device_node *of_node; | |
124 | int of_gpio_n_cells; | |
125 | int (*of_xlate)(struct gpio_chip *gc, | |
126 | const struct of_phandle_args *gpiospec, u32 *flags); | |
127 | #endif | |
128 | #ifdef CONFIG_PINCTRL | |
129 | /* | |
130 | * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally | |
131 | * describe the actual pin range which they serve in an SoC. This | |
132 | * information would be used by pinctrl subsystem to configure | |
133 | * corresponding pins for gpio usage. | |
134 | */ | |
135 | struct list_head pin_ranges; | |
136 | #endif | |
137 | }; | |
138 | ||
139 | extern const char *gpiochip_is_requested(struct gpio_chip *chip, | |
140 | unsigned offset); | |
141 | ||
142 | /* add/remove chips */ | |
143 | extern int gpiochip_add(struct gpio_chip *chip); | |
14c8a620 | 144 | extern int gpiochip_remove(struct gpio_chip *chip); |
79a9becd AC |
145 | extern struct gpio_chip *gpiochip_find(void *data, |
146 | int (*match)(struct gpio_chip *chip, void *data)); | |
147 | ||
148 | /* lock/unlock as IRQ */ | |
d74be6df AC |
149 | int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset); |
150 | void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); | |
79a9becd | 151 | |
bb1e88cc AC |
152 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); |
153 | ||
14250520 LW |
154 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
155 | ||
156 | void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, | |
157 | struct irq_chip *irqchip, | |
158 | int parent_irq, | |
159 | irq_flow_handler_t parent_handler); | |
160 | ||
161 | int gpiochip_irqchip_add(struct gpio_chip *gpiochip, | |
162 | struct irq_chip *irqchip, | |
163 | unsigned int first_irq, | |
164 | irq_flow_handler_t handler, | |
165 | unsigned int type); | |
166 | ||
167 | #endif /* CONFIG_GPIO_IRQCHIP */ | |
168 | ||
f7d4ad98 GR |
169 | int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label); |
170 | void gpiochip_free_own_desc(struct gpio_desc *desc); | |
171 | ||
bb1e88cc AC |
172 | #else /* CONFIG_GPIOLIB */ |
173 | ||
174 | static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
175 | { | |
176 | /* GPIO can never have been requested */ | |
177 | WARN_ON(1); | |
178 | return ERR_PTR(-ENODEV); | |
179 | } | |
180 | ||
181 | #endif /* CONFIG_GPIOLIB */ | |
182 | ||
79a9becd | 183 | #endif |