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10e5247f KA |
1 | /* |
2 | * Copyright (c) 2006, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
15 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
16 | * | |
17 | * Copyright (C) Ashok Raj <ashok.raj@intel.com> | |
18 | * Copyright (C) Shaohua Li <shaohua.li@intel.com> | |
19 | */ | |
20 | ||
21 | #ifndef __DMAR_H__ | |
22 | #define __DMAR_H__ | |
23 | ||
24 | #include <linux/acpi.h> | |
25 | #include <linux/types.h> | |
ba395927 | 26 | #include <linux/msi.h> |
10e5247f | 27 | |
ba395927 KA |
28 | #ifdef CONFIG_DMAR |
29 | struct intel_iommu; | |
30 | ||
d94afc6c | 31 | extern const char *dmar_get_fault_reason(u8 fault_reason); |
3460a6d9 KA |
32 | |
33 | /* Can't use the common MSI interrupt functions | |
34 | * since DMAR is not a pci device | |
35 | */ | |
36 | extern void dmar_msi_unmask(unsigned int irq); | |
37 | extern void dmar_msi_mask(unsigned int irq); | |
38 | extern void dmar_msi_read(int irq, struct msi_msg *msg); | |
39 | extern void dmar_msi_write(int irq, struct msi_msg *msg); | |
40 | extern int dmar_set_interrupt(struct intel_iommu *iommu); | |
41 | extern int arch_setup_dmar_msi(unsigned int irq); | |
42 | ||
ba395927 KA |
43 | /* Intel IOMMU detection and initialization functions */ |
44 | extern void detect_intel_iommu(void); | |
45 | extern int intel_iommu_init(void); | |
10e5247f KA |
46 | |
47 | extern int dmar_table_init(void); | |
48 | extern int early_dmar_detect(void); | |
1886e8a9 | 49 | extern int dmar_dev_scope_init(void); |
10e5247f KA |
50 | |
51 | extern struct list_head dmar_drhd_units; | |
52 | extern struct list_head dmar_rmrr_units; | |
53 | ||
54 | struct dmar_drhd_unit { | |
55 | struct list_head list; /* list of drhd units */ | |
1886e8a9 | 56 | struct acpi_dmar_header *hdr; /* ACPI header */ |
10e5247f KA |
57 | u64 reg_base_addr; /* register base address*/ |
58 | struct pci_dev **devices; /* target device array */ | |
59 | int devices_cnt; /* target device count */ | |
60 | u8 ignored:1; /* ignore drhd */ | |
61 | u8 include_all:1; | |
62 | struct intel_iommu *iommu; | |
63 | }; | |
64 | ||
65 | struct dmar_rmrr_unit { | |
66 | struct list_head list; /* list of rmrr units */ | |
1886e8a9 | 67 | struct acpi_dmar_header *hdr; /* ACPI header */ |
10e5247f KA |
68 | u64 base_address; /* reserved base address*/ |
69 | u64 end_address; /* reserved end address */ | |
70 | struct pci_dev **devices; /* target devices */ | |
71 | int devices_cnt; /* target device count */ | |
72 | }; | |
73 | ||
ba395927 KA |
74 | #define for_each_drhd_unit(drhd) \ |
75 | list_for_each_entry(drhd, &dmar_drhd_units, list) | |
76 | #define for_each_rmrr_units(rmrr) \ | |
77 | list_for_each_entry(rmrr, &dmar_rmrr_units, list) | |
1886e8a9 SS |
78 | |
79 | extern int alloc_iommu(struct dmar_drhd_unit *); | |
ba395927 KA |
80 | #else |
81 | static inline void detect_intel_iommu(void) | |
82 | { | |
83 | return; | |
84 | } | |
85 | static inline int intel_iommu_init(void) | |
86 | { | |
87 | return -ENODEV; | |
88 | } | |
1886e8a9 SS |
89 | static inline int dmar_table_init(void) |
90 | { | |
91 | return -ENODEV; | |
92 | } | |
ba395927 | 93 | #endif /* !CONFIG_DMAR */ |
10e5247f | 94 | #endif /* __DMAR_H__ */ |