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tracing: Fix function graph trace_pipe to properly display failed entries
[linux-2.6-block.git] / include / linux / dma-mapping.h
CommitLineData
96532bab
RD		 1#ifndef _LINUX_DMA_MAPPING_H
2#define _LINUX_DMA_MAPPING_H
1da177e4
LT		 3
4#include <linux/device.h>
5#include <linux/err.h>
f0402a26
FT		 6#include <linux/dma-attrs.h>
7#include <linux/scatterlist.h>
1da177e4
LT		 8
9/* These definitions mirror those in pci.h, so they can be used
10 * interchangeably with their PCI_ counterparts */
11enum dma_data_direction {
12 DMA_BIDIRECTIONAL = 0,
13 DMA_TO_DEVICE = 1,
14 DMA_FROM_DEVICE = 2,
15 DMA_NONE = 3,
16};
17
f0402a26
FT		 18struct dma_map_ops {
19 void* (*alloc_coherent)(struct device *dev, size_t size,
20 dma_addr_t *dma_handle, gfp_t gfp);
21 void (*free_coherent)(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle);
23 dma_addr_t (*map_page)(struct device *dev, struct page *page,
24 unsigned long offset, size_t size,
25 enum dma_data_direction dir,
26 struct dma_attrs *attrs);
27 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
28 size_t size, enum dma_data_direction dir,
29 struct dma_attrs *attrs);
30 int (*map_sg)(struct device *dev, struct scatterlist *sg,
31 int nents, enum dma_data_direction dir,
32 struct dma_attrs *attrs);
33 void (*unmap_sg)(struct device *dev,
34 struct scatterlist *sg, int nents,
35 enum dma_data_direction dir,
36 struct dma_attrs *attrs);
37 void (*sync_single_for_cpu)(struct device *dev,
38 dma_addr_t dma_handle, size_t size,
39 enum dma_data_direction dir);
40 void (*sync_single_for_device)(struct device *dev,
41 dma_addr_t dma_handle, size_t size,
42 enum dma_data_direction dir);
43 void (*sync_single_range_for_cpu)(struct device *dev,
44 dma_addr_t dma_handle,
45 unsigned long offset,
46 size_t size,
47 enum dma_data_direction dir);
48 void (*sync_single_range_for_device)(struct device *dev,
49 dma_addr_t dma_handle,
50 unsigned long offset,
51 size_t size,
52 enum dma_data_direction dir);
53 void (*sync_sg_for_cpu)(struct device *dev,
54 struct scatterlist *sg, int nents,
55 enum dma_data_direction dir);
56 void (*sync_sg_for_device)(struct device *dev,
57 struct scatterlist *sg, int nents,
58 enum dma_data_direction dir);
59 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
60 int (*dma_supported)(struct device *dev, u64 mask);
f726f30e 61 int (*set_dma_mask)(struct device *dev, u64 mask);
f0402a26
FT		 62 int is_phys;
63};
64
8f286c33 65#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
34c65384 66
d68412b6
JS		 67typedef u64 DMA_nnBIT_MASK __deprecated;
68
8f286c33
AM		 69/*
70 * NOTE: do not use the below macros in new code and do not add new definitions
71 * here.
72 *
73 * Instead, just open-code DMA_BIT_MASK(n) within your driver
74 */
d68412b6
JS		 75#define DMA_64BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(64)
76#define DMA_48BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(48)
77#define DMA_47BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(47)
78#define DMA_40BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(40)
79#define DMA_39BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(39)
80#define DMA_35BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(35)
81#define DMA_32BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(32)
82#define DMA_31BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(31)
83#define DMA_30BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(30)
84#define DMA_29BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(29)
85#define DMA_28BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(28)
86#define DMA_24BIT_MASK (DMA_nnBIT_MASK)DMA_BIT_MASK(24)
1da177e4 87
32e8f702
JB		 88#define DMA_MASK_NONE 0x0ULL
89
d6bd3a39
REB		 90static inline int valid_dma_direction(int dma_direction)
91{
92 return ((dma_direction == DMA_BIDIRECTIONAL) ||
93 (dma_direction == DMA_TO_DEVICE) ||
94 (dma_direction == DMA_FROM_DEVICE));
95}
96
32e8f702
JB		 97static inline int is_device_dma_capable(struct device *dev)
98{
99 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
100}
101
1b0fac45 102#ifdef CONFIG_HAS_DMA
1da177e4 103#include <asm/dma-mapping.h>
1b0fac45
DW		 104#else
105#include <asm-generic/dma-mapping-broken.h>
106#endif
1da177e4 107
dbe6f186
FT		 108/* for backwards compatibility, removed soon */
109static inline void __deprecated dma_sync_single(struct device *dev,
110 dma_addr_t addr, size_t size,
111 enum dma_data_direction dir)
112{
113 dma_sync_single_for_cpu(dev, addr, size, dir);
114}
115
116static inline void __deprecated dma_sync_sg(struct device *dev,
117 struct scatterlist *sg, int nelems,
118 enum dma_data_direction dir)
119{
120 dma_sync_sg_for_cpu(dev, sg, nelems, dir);
121}
1da177e4 122
589fc9a6
FT		 123static inline u64 dma_get_mask(struct device *dev)
124{
07a2c01a 125 if (dev && dev->dma_mask && *dev->dma_mask)
589fc9a6 126 return *dev->dma_mask;
284901a9 127 return DMA_BIT_MASK(32);
589fc9a6
FT		 128}
129
1da177e4
LT		 130extern u64 dma_get_required_mask(struct device *dev);
131
6b7b6510
FT		 132static inline unsigned int dma_get_max_seg_size(struct device *dev)
133{
134 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
135}
136
137static inline unsigned int dma_set_max_seg_size(struct device *dev,
138 unsigned int size)
139{
140 if (dev->dma_parms) {
141 dev->dma_parms->max_segment_size = size;
142 return 0;
143 } else
144 return -EIO;
145}
146
d22a6966
FT		 147static inline unsigned long dma_get_seg_boundary(struct device *dev)
148{
149 return dev->dma_parms ?
150 dev->dma_parms->segment_boundary_mask : 0xffffffff;
151}
152
153static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
154{
155 if (dev->dma_parms) {
156 dev->dma_parms->segment_boundary_mask = mask;
157 return 0;
158 } else
159 return -EIO;
160}
161
1da177e4
LT		 162/* flags for the coherent memory api */
163#define DMA_MEMORY_MAP 0x01
164#define DMA_MEMORY_IO 0x02
165#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
166#define DMA_MEMORY_EXCLUSIVE 0x08
167
168#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
169static inline int
170dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
171 dma_addr_t device_addr, size_t size, int flags)
172{
173 return 0;
174}
175
176static inline void
177dma_release_declared_memory(struct device *dev)
178{
179}
180
181static inline void *
182dma_mark_declared_memory_occupied(struct device *dev,
183 dma_addr_t device_addr, size_t size)
184{
185 return ERR_PTR(-EBUSY);
186}
187#endif
188
9ac7849e
TH		 189/*
190 * Managed DMA API
191 */
192extern void *dmam_alloc_coherent(struct device *dev, size_t size,
193 dma_addr_t *dma_handle, gfp_t gfp);
194extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
195 dma_addr_t dma_handle);
196extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
197 dma_addr_t *dma_handle, gfp_t gfp);
198extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
199 dma_addr_t dma_handle);
200#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
201extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
202 dma_addr_t device_addr, size_t size,
203 int flags);
204extern void dmam_release_declared_memory(struct device *dev);
205#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
206static inline int dmam_declare_coherent_memory(struct device *dev,
207 dma_addr_t bus_addr, dma_addr_t device_addr,
208 size_t size, gfp_t gfp)
209{
210 return 0;
211}
1da177e4 212
9ac7849e
TH		 213static inline void dmam_release_declared_memory(struct device *dev)
214{
215}
216#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
1da177e4 217
74bc7cee
AK		 218#ifndef CONFIG_HAVE_DMA_ATTRS
219struct dma_attrs;
220
221#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
222 dma_map_single(dev, cpu_addr, size, dir)
223
224#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
225 dma_unmap_single(dev, dma_addr, size, dir)
226
227#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
228 dma_map_sg(dev, sgl, nents, dir)
229
230#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
231 dma_unmap_sg(dev, sgl, nents, dir)
232
233#endif /* CONFIG_HAVE_DMA_ATTRS */
234
9ac7849e 235#endif
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