[linux-block.git] / include / linux / dma-map-ops.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * This header is for implementations of dma_map_ops and related code.
 * It should not be included in drivers just using the DMA API.
 */
#ifndef _LINUX_DMA_MAP_OPS_H
#define _LINUX_DMA_MAP_OPS_H

#include <linux/dma-mapping.h>
#include <linux/pgtable.h>

struct cma;

struct dma_map_ops {
	void *(*alloc)(struct device *dev, size_t size,
			dma_addr_t *dma_handle, gfp_t gfp,
			unsigned long attrs);
	void (*free)(struct device *dev, size_t size, void *vaddr,
			dma_addr_t dma_handle, unsigned long attrs);
	struct page *(*alloc_pages)(struct device *dev, size_t size,
			dma_addr_t *dma_handle, enum dma_data_direction dir,
			gfp_t gfp);
	void (*free_pages)(struct device *dev, size_t size, struct page *vaddr,
			dma_addr_t dma_handle, enum dma_data_direction dir);
	struct sg_table *(*alloc_noncontiguous)(struct device *dev, size_t size,
			enum dma_data_direction dir, gfp_t gfp,
			unsigned long attrs);
	void (*free_noncontiguous)(struct device *dev, size_t size,
			struct sg_table *sgt, enum dma_data_direction dir);
	int (*mmap)(struct device *, struct vm_area_struct *,
			void *, dma_addr_t, size_t, unsigned long attrs);

	int (*get_sgtable)(struct device *dev, struct sg_table *sgt,
			void *cpu_addr, dma_addr_t dma_addr, size_t size,
			unsigned long attrs);

	dma_addr_t (*map_page)(struct device *dev, struct page *page,
			unsigned long offset, size_t size,
			enum dma_data_direction dir, unsigned long attrs);
	void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
			size_t size, enum dma_data_direction dir,
			unsigned long attrs);
	/*
	 * map_sg should return a negative error code on error. See
	 * dma_map_sgtable() for a list of appropriate error codes
	 * and their meanings.
	 */
	int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
			enum dma_data_direction dir, unsigned long attrs);
	void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
			enum dma_data_direction dir, unsigned long attrs);
	dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
			size_t size, enum dma_data_direction dir,
			unsigned long attrs);
	void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
			size_t size, enum dma_data_direction dir,
			unsigned long attrs);
	void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
			size_t size, enum dma_data_direction dir);
	void (*sync_single_for_device)(struct device *dev,
			dma_addr_t dma_handle, size_t size,
			enum dma_data_direction dir);
	void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
			int nents, enum dma_data_direction dir);
	void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
			int nents, enum dma_data_direction dir);
	void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
			enum dma_data_direction direction);
	int (*dma_supported)(struct device *dev, u64 mask);
	u64 (*get_required_mask)(struct device *dev);
	size_t (*max_mapping_size)(struct device *dev);
	unsigned long (*get_merge_boundary)(struct device *dev);
};

#ifdef CONFIG_DMA_OPS
#include <asm/dma-mapping.h>

static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
	if (dev->dma_ops)
		return dev->dma_ops;
	return get_arch_dma_ops(dev->bus);
}

static inline void set_dma_ops(struct device *dev,
			       const struct dma_map_ops *dma_ops)
{
	dev->dma_ops = dma_ops;
}
#else /* CONFIG_DMA_OPS */
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
	return NULL;
}
static inline void set_dma_ops(struct device *dev,
			       const struct dma_map_ops *dma_ops)
{
}
#endif /* CONFIG_DMA_OPS */

#ifdef CONFIG_DMA_CMA
extern struct cma *dma_contiguous_default_area;

static inline struct cma *dev_get_cma_area(struct device *dev)
{
	if (dev && dev->cma_area)
		return dev->cma_area;
	return dma_contiguous_default_area;
}

void dma_contiguous_reserve(phys_addr_t addr_limit);
int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
		phys_addr_t limit, struct cma **res_cma, bool fixed);

struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
				       unsigned int order, bool no_warn);
bool dma_release_from_contiguous(struct device *dev, struct page *pages,
				 int count);
struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp);
void dma_free_contiguous(struct device *dev, struct page *page, size_t size);

void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
#else /* CONFIG_DMA_CMA */
static inline struct cma *dev_get_cma_area(struct device *dev)
{
	return NULL;
}
static inline void dma_contiguous_reserve(phys_addr_t limit)
{
}
static inline int dma_contiguous_reserve_area(phys_addr_t size,
		phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
		bool fixed)
{
	return -ENOSYS;
}
static inline struct page *dma_alloc_from_contiguous(struct device *dev,
		size_t count, unsigned int order, bool no_warn)
{
	return NULL;
}
static inline bool dma_release_from_contiguous(struct device *dev,
		struct page *pages, int count)
{
	return false;
}
/* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size,
		gfp_t gfp)
{
	return NULL;
}
static inline void dma_free_contiguous(struct device *dev, struct page *page,
		size_t size)
{
	__free_pages(page, get_order(size));
}
#endif /* CONFIG_DMA_CMA*/

#ifdef CONFIG_DMA_PERNUMA_CMA
void dma_pernuma_cma_reserve(void);
#else
static inline void dma_pernuma_cma_reserve(void) { }
#endif /* CONFIG_DMA_PERNUMA_CMA */

#ifdef CONFIG_DMA_DECLARE_COHERENT
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
		dma_addr_t device_addr, size_t size);
int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
		dma_addr_t *dma_handle, void **ret);
int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
		void *cpu_addr, size_t size, int *ret);
#else
static inline int dma_declare_coherent_memory(struct device *dev,
		phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
{
	return -ENOSYS;
}
#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
#endif /* CONFIG_DMA_DECLARE_COHERENT */

#ifdef CONFIG_DMA_GLOBAL_POOL
void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
		dma_addr_t *dma_handle);
int dma_release_from_global_coherent(int order, void *vaddr);
int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
		size_t size, int *ret);
int dma_init_global_coherent(phys_addr_t phys_addr, size_t size);
#else
static inline void *dma_alloc_from_global_coherent(struct device *dev,
		ssize_t size, dma_addr_t *dma_handle)
{
	return NULL;
}
static inline int dma_release_from_global_coherent(int order, void *vaddr)
{
	return 0;
}
static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
		void *cpu_addr, size_t size, int *ret)
{
	return 0;
}
#endif /* CONFIG_DMA_GLOBAL_POOL */

/*
 * This is the actual return value from the ->alloc_noncontiguous method.
 * The users of the DMA API should only care about the sg_table, but to make
 * the DMA-API internal vmaping and freeing easier we stash away the page
 * array as well (except for the fallback case).  This can go away any time,
 * e.g. when a vmap-variant that takes a scatterlist comes along.
 */
struct dma_sgt_handle {
	struct sg_table sgt;
	struct page **pages;
};
#define sgt_handle(sgt) \
	container_of((sgt), struct dma_sgt_handle, sgt)

int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
		void *cpu_addr, dma_addr_t dma_addr, size_t size,
		unsigned long attrs);
int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
		void *cpu_addr, dma_addr_t dma_addr, size_t size,
		unsigned long attrs);
struct page *dma_common_alloc_pages(struct device *dev, size_t size,
		dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr,
		dma_addr_t dma_handle, enum dma_data_direction dir);

struct page **dma_common_find_pages(void *cpu_addr);
void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot,
		const void *caller);
void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot,
		const void *caller);
void dma_common_free_remap(void *cpu_addr, size_t size);

struct page *dma_alloc_from_pool(struct device *dev, size_t size,
		void **cpu_addr, gfp_t flags,
		bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
bool dma_free_from_pool(struct device *dev, void *start, size_t size);

int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
		dma_addr_t dma_start, u64 size);

#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
	defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
	defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
extern bool dma_default_coherent;
static inline bool dev_is_dma_coherent(struct device *dev)
{
	return dev->dma_coherent;
}
#else
static inline bool dev_is_dma_coherent(struct device *dev)
{
	return true;
}
#endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */

void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
		gfp_t gfp, unsigned long attrs);
void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
		dma_addr_t dma_addr, unsigned long attrs);

#ifdef CONFIG_MMU
/*
 * Page protection so that devices that can't snoop CPU caches can use the
 * memory coherently.  We default to pgprot_noncached which is usually used
 * for ioremap as a safe bet, but architectures can override this with less
 * strict semantics if possible.
 */
#ifndef pgprot_dmacoherent
#define pgprot_dmacoherent(prot)	pgprot_noncached(prot)
#endif

pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
#else
static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
		unsigned long attrs)
{
	return prot;	/* no protection bits supported without page tables */
}
#endif /* CONFIG_MMU */

#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
		enum dma_data_direction dir);
#else
static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
		enum dma_data_direction dir)
{
}
#endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */

#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
		enum dma_data_direction dir);
#else
static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
		enum dma_data_direction dir)
{
}
#endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */

#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
void arch_sync_dma_for_cpu_all(void);
#else
static inline void arch_sync_dma_for_cpu_all(void)
{
}
#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */

#ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
void arch_dma_prep_coherent(struct page *page, size_t size);
#else
static inline void arch_dma_prep_coherent(struct page *page, size_t size)
{
}
#endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */

#ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
void arch_dma_mark_clean(phys_addr_t paddr, size_t size);
#else
static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
{
}
#endif /* ARCH_HAS_DMA_MARK_CLEAN */

void *arch_dma_set_uncached(void *addr, size_t size);
void arch_dma_clear_uncached(void *addr, size_t size);

#ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr);
bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle);
bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
		int nents);
bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
		int nents);
#else
#define arch_dma_map_page_direct(d, a)		(false)
#define arch_dma_unmap_page_direct(d, a)	(false)
#define arch_dma_map_sg_direct(d, s, n)		(false)
#define arch_dma_unmap_sg_direct(d, s, n)	(false)
#endif

#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
		const struct iommu_ops *iommu, bool coherent);
#else
static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
		u64 size, const struct iommu_ops *iommu, bool coherent)
{
}
#endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */

#ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
void arch_teardown_dma_ops(struct device *dev);
#else
static inline void arch_teardown_dma_ops(struct device *dev)
{
}
#endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */

#ifdef CONFIG_DMA_API_DEBUG
void dma_debug_add_bus(struct bus_type *bus);
void debug_dma_dump_mappings(struct device *dev);
#else
static inline void dma_debug_add_bus(struct bus_type *bus)
{
}
static inline void debug_dma_dump_mappings(struct device *dev)
{
}
#endif /* CONFIG_DMA_API_DEBUG */

extern const struct dma_map_ops dma_dummy_ops;

#endif /* _LINUX_DMA_MAP_OPS_H */
Commit	Line	Data
0a0f0d8b CH	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* This header is for implementations of dma_map_ops and related code.
	4	* It should not be included in drivers just using the DMA API.
	5	*/
	6	#ifndef _LINUX_DMA_MAP_OPS_H
	7	#define _LINUX_DMA_MAP_OPS_H
	8
	9	#include <linux/dma-mapping.h>
9f4df96b	10	#include <linux/pgtable.h>
0a0f0d8b	11
0b1abd1f CH	12	struct cma;
0b1abd1f CH	13
0a0f0d8b CH	14	struct dma_map_ops {
	15	void (alloc)(struct device *dev, size_t size,
	16	dma_addr_t *dma_handle, gfp_t gfp,
	17	unsigned long attrs);
	18	void (free)(struct device dev, size_t size, void *vaddr,
	19	dma_addr_t dma_handle, unsigned long attrs);
	20	struct page (alloc_pages)(struct device *dev, size_t size,
	21	dma_addr_t *dma_handle, enum dma_data_direction dir,
	22	gfp_t gfp);
	23	void (free_pages)(struct device dev, size_t size, struct page *vaddr,
	24	dma_addr_t dma_handle, enum dma_data_direction dir);
7d5b5738 CH	25	struct sg_table (alloc_noncontiguous)(struct device *dev, size_t size,
	26	enum dma_data_direction dir, gfp_t gfp,
	27	unsigned long attrs);
	28	void (free_noncontiguous)(struct device dev, size_t size,
	29	struct sg_table *sgt, enum dma_data_direction dir);
0a0f0d8b CH	30	int (mmap)(struct device , struct vm_area_struct *,
	31	void *, dma_addr_t, size_t, unsigned long attrs);
	32
	33	int (get_sgtable)(struct device dev, struct sg_table *sgt,
	34	void *cpu_addr, dma_addr_t dma_addr, size_t size,
	35	unsigned long attrs);
	36
	37	dma_addr_t (map_page)(struct device dev, struct page *page,
	38	unsigned long offset, size_t size,
	39	enum dma_data_direction dir, unsigned long attrs);
	40	void (unmap_page)(struct device dev, dma_addr_t dma_handle,
	41	size_t size, enum dma_data_direction dir,
	42	unsigned long attrs);
	43	/*
fffe3cc8 LG	44	* map_sg should return a negative error code on error. See
	45	* dma_map_sgtable() for a list of appropriate error codes
	46	* and their meanings.
0a0f0d8b CH	47	*/
	48	int (map_sg)(struct device dev, struct scatterlist *sg, int nents,
	49	enum dma_data_direction dir, unsigned long attrs);
	50	void (unmap_sg)(struct device dev, struct scatterlist *sg, int nents,
	51	enum dma_data_direction dir, unsigned long attrs);
	52	dma_addr_t (map_resource)(struct device dev, phys_addr_t phys_addr,
	53	size_t size, enum dma_data_direction dir,
	54	unsigned long attrs);
	55	void (unmap_resource)(struct device dev, dma_addr_t dma_handle,
	56	size_t size, enum dma_data_direction dir,
	57	unsigned long attrs);
	58	void (sync_single_for_cpu)(struct device dev, dma_addr_t dma_handle,
	59	size_t size, enum dma_data_direction dir);
	60	void (sync_single_for_device)(struct device dev,
	61	dma_addr_t dma_handle, size_t size,
	62	enum dma_data_direction dir);
	63	void (sync_sg_for_cpu)(struct device dev, struct scatterlist *sg,
	64	int nents, enum dma_data_direction dir);
	65	void (sync_sg_for_device)(struct device dev, struct scatterlist *sg,
	66	int nents, enum dma_data_direction dir);
	67	void (cache_sync)(struct device dev, void *vaddr, size_t size,
	68	enum dma_data_direction direction);
	69	int (dma_supported)(struct device dev, u64 mask);
	70	u64 (get_required_mask)(struct device dev);
	71	size_t (max_mapping_size)(struct device dev);
	72	unsigned long (get_merge_boundary)(struct device dev);
	73	};
	74
	75	#ifdef CONFIG_DMA_OPS
	76	#include <asm/dma-mapping.h>
	77
	78	static inline const struct dma_map_ops get_dma_ops(struct device dev)
	79	{
	80	if (dev->dma_ops)
	81	return dev->dma_ops;
	82	return get_arch_dma_ops(dev->bus);
	83	}
	84
	85	static inline void set_dma_ops(struct device *dev,
	86	const struct dma_map_ops *dma_ops)
	87	{
	88	dev->dma_ops = dma_ops;
	89	}
	90	#else /* CONFIG_DMA_OPS */
	91	static inline const struct dma_map_ops get_dma_ops(struct device dev)
	92	{
	93	return NULL;
	94	}
	95	static inline void set_dma_ops(struct device *dev,
	96	const struct dma_map_ops *dma_ops)
	97	{
	98	}
	99	#endif /* CONFIG_DMA_OPS */
	100
0b1abd1f CH	101	#ifdef CONFIG_DMA_CMA
	102	extern struct cma *dma_contiguous_default_area;
	103
	104	static inline struct cma dev_get_cma_area(struct device dev)
	105	{
	106	if (dev && dev->cma_area)
	107	return dev->cma_area;
	108	return dma_contiguous_default_area;
	109	}
	110
	111	void dma_contiguous_reserve(phys_addr_t addr_limit);
	112	int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
	113	phys_addr_t limit, struct cma **res_cma, bool fixed);
	114
	115	struct page dma_alloc_from_contiguous(struct device dev, size_t count,
	116	unsigned int order, bool no_warn);
	117	bool dma_release_from_contiguous(struct device dev, struct page pages,
	118	int count);
	119	struct page dma_alloc_contiguous(struct device dev, size_t size, gfp_t gfp);
	120	void dma_free_contiguous(struct device dev, struct page page, size_t size);
5db5d930 CH	121
5db5d930 CH	122	void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
0b1abd1f CH	123	#else /* CONFIG_DMA_CMA */
	124	static inline struct cma dev_get_cma_area(struct device dev)
	125	{
	126	return NULL;
	127	}
	128	static inline void dma_contiguous_reserve(phys_addr_t limit)
	129	{
	130	}
	131	static inline int dma_contiguous_reserve_area(phys_addr_t size,
	132	phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
	133	bool fixed)
	134	{
	135	return -ENOSYS;
	136	}
	137	static inline struct page dma_alloc_from_contiguous(struct device dev,
	138	size_t count, unsigned int order, bool no_warn)
	139	{
	140	return NULL;
	141	}
	142	static inline bool dma_release_from_contiguous(struct device *dev,
	143	struct page *pages, int count)
	144	{
	145	return false;
	146	}
	147	/* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
	148	static inline struct page dma_alloc_contiguous(struct device dev, size_t size,
	149	gfp_t gfp)
	150	{
	151	return NULL;
	152	}
	153	static inline void dma_free_contiguous(struct device dev, struct page page,
	154	size_t size)
	155	{
	156	__free_pages(page, get_order(size));
	157	}
	158	#endif /* CONFIG_DMA_CMA*/
	159
	160	#ifdef CONFIG_DMA_PERNUMA_CMA
	161	void dma_pernuma_cma_reserve(void);
	162	#else
	163	static inline void dma_pernuma_cma_reserve(void) { }
	164	#endif /* CONFIG_DMA_PERNUMA_CMA */
	165
0a0f0d8b CH	166	#ifdef CONFIG_DMA_DECLARE_COHERENT
	167	int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
	168	dma_addr_t device_addr, size_t size);
	169	int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
	170	dma_addr_t dma_handle, void *ret);
	171	int dma_release_from_dev_coherent(struct device dev, int order, void vaddr);
	172	int dma_mmap_from_dev_coherent(struct device dev, struct vm_area_struct vma,
	173	void cpu_addr, size_t size, int ret);
0a0f0d8b CH	174	#else
	175	static inline int dma_declare_coherent_memory(struct device *dev,
	176	phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
	177	{
	178	return -ENOSYS;
	179	}
	180	#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
	181	#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
	182	#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
22f9feb4	183	#endif /* CONFIG_DMA_DECLARE_COHERENT */
0a0f0d8b	184
22f9feb4 CH	185	#ifdef CONFIG_DMA_GLOBAL_POOL
	186	void dma_alloc_from_global_coherent(struct device dev, ssize_t size,
	187	dma_addr_t *dma_handle);
	188	int dma_release_from_global_coherent(int order, void *vaddr);
	189	int dma_mmap_from_global_coherent(struct vm_area_struct vma, void cpu_addr,
	190	size_t size, int *ret);
	191	int dma_init_global_coherent(phys_addr_t phys_addr, size_t size);
	192	#else
0a0f0d8b CH	193	static inline void dma_alloc_from_global_coherent(struct device dev,
	194	ssize_t size, dma_addr_t *dma_handle)
	195	{
	196	return NULL;
	197	}
	198	static inline int dma_release_from_global_coherent(int order, void *vaddr)
	199	{
	200	return 0;
	201	}
	202	static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
	203	void cpu_addr, size_t size, int ret)
	204	{
	205	return 0;
	206	}
22f9feb4	207	#endif /* CONFIG_DMA_GLOBAL_POOL */
0a0f0d8b	208
7d5b5738 CH	209	/*
	210	* This is the actual return value from the ->alloc_noncontiguous method.
	211	* The users of the DMA API should only care about the sg_table, but to make
	212	* the DMA-API internal vmaping and freeing easier we stash away the page
	213	* array as well (except for the fallback case). This can go away any time,
	214	* e.g. when a vmap-variant that takes a scatterlist comes along.
	215	*/
	216	struct dma_sgt_handle {
	217	struct sg_table sgt;
	218	struct page **pages;
	219	};
	220	#define sgt_handle(sgt) \
	221	container_of((sgt), struct dma_sgt_handle, sgt)
	222
695cebe5 CH	223	int dma_common_get_sgtable(struct device dev, struct sg_table sgt,
	224	void *cpu_addr, dma_addr_t dma_addr, size_t size,
	225	unsigned long attrs);
	226	int dma_common_mmap(struct device dev, struct vm_area_struct vma,
	227	void *cpu_addr, dma_addr_t dma_addr, size_t size,
	228	unsigned long attrs);
	229	struct page dma_common_alloc_pages(struct device dev, size_t size,
	230	dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
	231	void dma_common_free_pages(struct device dev, size_t size, struct page vaddr,
	232	dma_addr_t dma_handle, enum dma_data_direction dir);
	233
	234	struct page *dma_common_find_pages(void cpu_addr);
	235	void dma_common_contiguous_remap(struct page page, size_t size, pgprot_t prot,
	236	const void *caller);
	237	void dma_common_pages_remap(struct page *pages, size_t size, pgprot_t prot,
	238	const void *caller);
	239	void dma_common_free_remap(void *cpu_addr, size_t size);
	240
	241	struct page dma_alloc_from_pool(struct device dev, size_t size,
	242	void **cpu_addr, gfp_t flags,
	243	bool (phys_addr_ok)(struct device , phys_addr_t, size_t));
	244	bool dma_free_from_pool(struct device dev, void start, size_t size);
	245
16fee29b CH	246	int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
	247	dma_addr_t dma_start, u64 size);
	248
6d4e9a8e	249	#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) \|\| \
9f4df96b CH	250	defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) \|\| \
9f4df96b CH	251	defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
6d4e9a8e	252	extern bool dma_default_coherent;
9f4df96b CH	253	static inline bool dev_is_dma_coherent(struct device *dev)
	254	{
	255	return dev->dma_coherent;
	256	}
	257	#else
	258	static inline bool dev_is_dma_coherent(struct device *dev)
	259	{
	260	return true;
	261	}
	262	#endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */
	263
9f4df96b CH	264	void arch_dma_alloc(struct device dev, size_t size, dma_addr_t *dma_handle,
	265	gfp_t gfp, unsigned long attrs);
	266	void arch_dma_free(struct device dev, size_t size, void cpu_addr,
	267	dma_addr_t dma_addr, unsigned long attrs);
	268
	269	#ifdef CONFIG_MMU
	270	/*
	271	* Page protection so that devices that can't snoop CPU caches can use the
	272	* memory coherently. We default to pgprot_noncached which is usually used
	273	* for ioremap as a safe bet, but architectures can override this with less
	274	* strict semantics if possible.
	275	*/
	276	#ifndef pgprot_dmacoherent
	277	#define pgprot_dmacoherent(prot) pgprot_noncached(prot)
	278	#endif
	279
	280	pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
	281	#else
	282	static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
	283	unsigned long attrs)
	284	{
	285	return prot; /* no protection bits supported without page tables */
	286	}
	287	#endif /* CONFIG_MMU */
	288
	289	#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
	290	void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
	291	enum dma_data_direction dir);
	292	#else
	293	static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
	294	enum dma_data_direction dir)
	295	{
	296	}
	297	#endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
	298
	299	#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
	300	void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
	301	enum dma_data_direction dir);
	302	#else
	303	static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
	304	enum dma_data_direction dir)
	305	{
	306	}
	307	#endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
	308
	309	#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
	310	void arch_sync_dma_for_cpu_all(void);
	311	#else
	312	static inline void arch_sync_dma_for_cpu_all(void)
	313	{
	314	}
	315	#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
	316
	317	#ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
	318	void arch_dma_prep_coherent(struct page *page, size_t size);
	319	#else
	320	static inline void arch_dma_prep_coherent(struct page *page, size_t size)
	321	{
	322	}
	323	#endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
	324
	325	#ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
	326	void arch_dma_mark_clean(phys_addr_t paddr, size_t size);
	327	#else
328	static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
329	{
330	}
331	#endif /* ARCH_HAS_DMA_MARK_CLEAN */
332
333	void arch_dma_set_uncached(void addr, size_t size);
334	void arch_dma_clear_uncached(void *addr, size_t size);
335
8d8d53cf AK	336	#ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
	337	bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr);
	338	bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle);
	339	bool arch_dma_map_sg_direct(struct device dev, struct scatterlist sg,
	340	int nents);
	341	bool arch_dma_unmap_sg_direct(struct device dev, struct scatterlist sg,
	342	int nents);
	343	#else
	344	#define arch_dma_map_page_direct(d, a) (false)
	345	#define arch_dma_unmap_page_direct(d, a) (false)
	346	#define arch_dma_map_sg_direct(d, s, n) (false)
	347	#define arch_dma_unmap_sg_direct(d, s, n) (false)
	348	#endif
	349
0a0f0d8b CH	350	#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
	351	void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
	352	const struct iommu_ops *iommu, bool coherent);
	353	#else
	354	static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
	355	u64 size, const struct iommu_ops *iommu, bool coherent)
	356	{
	357	}
	358	#endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
	359
	360	#ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
	361	void arch_teardown_dma_ops(struct device *dev);
	362	#else
	363	static inline void arch_teardown_dma_ops(struct device *dev)
	364	{
	365	}
	366	#endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
	367
a1fd09e8 CH	368	#ifdef CONFIG_DMA_API_DEBUG
	369	void dma_debug_add_bus(struct bus_type *bus);
	370	void debug_dma_dump_mappings(struct device *dev);
	371	#else
	372	static inline void dma_debug_add_bus(struct bus_type *bus)
	373	{
	374	}
	375	static inline void debug_dma_dump_mappings(struct device *dev)
	376	{
	377	}
	378	#endif /* CONFIG_DMA_API_DEBUG */
	379
0a0f0d8b CH	380	extern const struct dma_map_ops dma_dummy_ops;
	381
	382	#endif /* _LINUX_DMA_MAP_OPS_H */