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e941759c ML |
1 | /* |
2 | * Fence mechanism for dma-buf to allow for asynchronous dma access | |
3 | * | |
4 | * Copyright (C) 2012 Canonical Ltd | |
5 | * Copyright (C) 2012 Texas Instruments | |
6 | * | |
7 | * Authors: | |
8 | * Rob Clark <robdclark@gmail.com> | |
9 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License version 2 as published by | |
13 | * the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
18 | * more details. | |
19 | */ | |
20 | ||
f54d1867 CW |
21 | #ifndef __LINUX_DMA_FENCE_H |
22 | #define __LINUX_DMA_FENCE_H | |
e941759c ML |
23 | |
24 | #include <linux/err.h> | |
25 | #include <linux/wait.h> | |
26 | #include <linux/list.h> | |
27 | #include <linux/bitops.h> | |
28 | #include <linux/kref.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/printk.h> | |
3c3b177a | 31 | #include <linux/rcupdate.h> |
e941759c | 32 | |
f54d1867 CW |
33 | struct dma_fence; |
34 | struct dma_fence_ops; | |
35 | struct dma_fence_cb; | |
e941759c ML |
36 | |
37 | /** | |
f54d1867 | 38 | * struct dma_fence - software synchronization primitive |
e941759c | 39 | * @refcount: refcount for this fence |
f54d1867 | 40 | * @ops: dma_fence_ops associated with this fence |
3c3b177a | 41 | * @rcu: used for releasing fence with kfree_rcu |
e941759c ML |
42 | * @cb_list: list of all callbacks to call |
43 | * @lock: spin_lock_irqsave used for locking | |
44 | * @context: execution context this fence belongs to, returned by | |
f54d1867 | 45 | * dma_fence_context_alloc() |
e941759c ML |
46 | * @seqno: the sequence number of this fence inside the execution context, |
47 | * can be compared to decide which fence would be signaled later. | |
f54d1867 | 48 | * @flags: A mask of DMA_FENCE_FLAG_* defined below |
e941759c | 49 | * @timestamp: Timestamp when the fence was signaled. |
a009e975 | 50 | * @error: Optional, only valid if < 0, must be set before calling |
f54d1867 | 51 | * dma_fence_signal, indicates that the fence has completed with an error. |
e941759c ML |
52 | * |
53 | * the flags member must be manipulated and read using the appropriate | |
54 | * atomic ops (bit_*), so taking the spinlock will not be needed most | |
55 | * of the time. | |
56 | * | |
f54d1867 | 57 | * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled |
76250f2b | 58 | * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling |
f54d1867 CW |
59 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called |
60 | * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the | |
e941759c ML |
61 | * implementer of the fence for its own purposes. Can be used in different |
62 | * ways by different fence implementers, so do not rely on this. | |
63 | * | |
3590d50e | 64 | * Since atomic bitops are used, this is not guaranteed to be the case. |
f54d1867 | 65 | * Particularly, if the bit was set, but dma_fence_signal was called right |
e941759c | 66 | * before this bit was set, it would have been able to set the |
f54d1867 CW |
67 | * DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called. |
68 | * Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting | |
69 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that | |
70 | * after dma_fence_signal was called, any enable_signaling call will have either | |
e941759c ML |
71 | * been completed, or never called at all. |
72 | */ | |
f54d1867 | 73 | struct dma_fence { |
e941759c | 74 | struct kref refcount; |
f54d1867 | 75 | const struct dma_fence_ops *ops; |
3c3b177a | 76 | struct rcu_head rcu; |
e941759c ML |
77 | struct list_head cb_list; |
78 | spinlock_t *lock; | |
76bf0db5 | 79 | u64 context; |
b312d8ca | 80 | u64 seqno; |
e941759c ML |
81 | unsigned long flags; |
82 | ktime_t timestamp; | |
a009e975 | 83 | int error; |
e941759c ML |
84 | }; |
85 | ||
f54d1867 CW |
86 | enum dma_fence_flag_bits { |
87 | DMA_FENCE_FLAG_SIGNALED_BIT, | |
76250f2b | 88 | DMA_FENCE_FLAG_TIMESTAMP_BIT, |
f54d1867 CW |
89 | DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
90 | DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ | |
e941759c ML |
91 | }; |
92 | ||
f54d1867 CW |
93 | typedef void (*dma_fence_func_t)(struct dma_fence *fence, |
94 | struct dma_fence_cb *cb); | |
e941759c ML |
95 | |
96 | /** | |
2c269b09 DV |
97 | * struct dma_fence_cb - callback for dma_fence_add_callback() |
98 | * @node: used by dma_fence_add_callback() to append this struct to fence::cb_list | |
f54d1867 | 99 | * @func: dma_fence_func_t to call |
e941759c | 100 | * |
2c269b09 | 101 | * This struct will be initialized by dma_fence_add_callback(), additional |
f54d1867 | 102 | * data can be passed along by embedding dma_fence_cb in another struct. |
e941759c | 103 | */ |
f54d1867 | 104 | struct dma_fence_cb { |
e941759c | 105 | struct list_head node; |
f54d1867 | 106 | dma_fence_func_t func; |
e941759c ML |
107 | }; |
108 | ||
109 | /** | |
f54d1867 | 110 | * struct dma_fence_ops - operations implemented for fence |
e941759c | 111 | * |
e941759c | 112 | */ |
f54d1867 | 113 | struct dma_fence_ops { |
5e498abf CK |
114 | /** |
115 | * @use_64bit_seqno: | |
116 | * | |
117 | * True if this dma_fence implementation uses 64bit seqno, false | |
118 | * otherwise. | |
119 | */ | |
120 | bool use_64bit_seqno; | |
121 | ||
2c269b09 DV |
122 | /** |
123 | * @get_driver_name: | |
124 | * | |
125 | * Returns the driver name. This is a callback to allow drivers to | |
126 | * compute the name at runtime, without having it to store permanently | |
127 | * for each fence, or build a cache of some sort. | |
128 | * | |
129 | * This callback is mandatory. | |
130 | */ | |
f54d1867 | 131 | const char * (*get_driver_name)(struct dma_fence *fence); |
2c269b09 DV |
132 | |
133 | /** | |
134 | * @get_timeline_name: | |
135 | * | |
136 | * Return the name of the context this fence belongs to. This is a | |
137 | * callback to allow drivers to compute the name at runtime, without | |
138 | * having it to store permanently for each fence, or build a cache of | |
139 | * some sort. | |
140 | * | |
141 | * This callback is mandatory. | |
142 | */ | |
f54d1867 | 143 | const char * (*get_timeline_name)(struct dma_fence *fence); |
2c269b09 DV |
144 | |
145 | /** | |
146 | * @enable_signaling: | |
147 | * | |
148 | * Enable software signaling of fence. | |
149 | * | |
150 | * For fence implementations that have the capability for hw->hw | |
151 | * signaling, they can implement this op to enable the necessary | |
152 | * interrupts, or insert commands into cmdstream, etc, to avoid these | |
153 | * costly operations for the common case where only hw->hw | |
154 | * synchronization is required. This is called in the first | |
155 | * dma_fence_wait() or dma_fence_add_callback() path to let the fence | |
156 | * implementation know that there is another driver waiting on the | |
157 | * signal (ie. hw->sw case). | |
158 | * | |
159 | * This function can be called from atomic context, but not | |
160 | * from irq context, so normal spinlocks can be used. | |
161 | * | |
162 | * A return value of false indicates the fence already passed, | |
163 | * or some failure occurred that made it impossible to enable | |
164 | * signaling. True indicates successful enabling. | |
165 | * | |
166 | * &dma_fence.error may be set in enable_signaling, but only when false | |
167 | * is returned. | |
168 | * | |
169 | * Since many implementations can call dma_fence_signal() even when before | |
170 | * @enable_signaling has been called there's a race window, where the | |
171 | * dma_fence_signal() might result in the final fence reference being | |
172 | * released and its memory freed. To avoid this, implementations of this | |
173 | * callback should grab their own reference using dma_fence_get(), to be | |
174 | * released when the fence is signalled (through e.g. the interrupt | |
175 | * handler). | |
176 | * | |
c701317a DV |
177 | * This callback is optional. If this callback is not present, then the |
178 | * driver must always have signaling enabled. | |
2c269b09 | 179 | */ |
f54d1867 | 180 | bool (*enable_signaling)(struct dma_fence *fence); |
2c269b09 DV |
181 | |
182 | /** | |
183 | * @signaled: | |
184 | * | |
185 | * Peek whether the fence is signaled, as a fastpath optimization for | |
186 | * e.g. dma_fence_wait() or dma_fence_add_callback(). Note that this | |
187 | * callback does not need to make any guarantees beyond that a fence | |
188 | * once indicates as signalled must always return true from this | |
189 | * callback. This callback may return false even if the fence has | |
190 | * completed already, in this case information hasn't propogated throug | |
191 | * the system yet. See also dma_fence_is_signaled(). | |
192 | * | |
193 | * May set &dma_fence.error if returning true. | |
194 | * | |
195 | * This callback is optional. | |
196 | */ | |
f54d1867 | 197 | bool (*signaled)(struct dma_fence *fence); |
2c269b09 DV |
198 | |
199 | /** | |
200 | * @wait: | |
201 | * | |
418cc6ca DV |
202 | * Custom wait implementation, defaults to dma_fence_default_wait() if |
203 | * not set. | |
2c269b09 | 204 | * |
418cc6ca DV |
205 | * The dma_fence_default_wait implementation should work for any fence, as long |
206 | * as @enable_signaling works correctly. This hook allows drivers to | |
207 | * have an optimized version for the case where a process context is | |
208 | * already available, e.g. if @enable_signaling for the general case | |
209 | * needs to set up a worker thread. | |
2c269b09 DV |
210 | * |
211 | * Must return -ERESTARTSYS if the wait is intr = true and the wait was | |
212 | * interrupted, and remaining jiffies if fence has signaled, or 0 if wait | |
213 | * timed out. Can also return other error values on custom implementations, | |
214 | * which should be treated as if the fence is signaled. For example a hardware | |
215 | * lockup could be reported like that. | |
216 | * | |
418cc6ca | 217 | * This callback is optional. |
2c269b09 | 218 | */ |
f54d1867 CW |
219 | signed long (*wait)(struct dma_fence *fence, |
220 | bool intr, signed long timeout); | |
2c269b09 DV |
221 | |
222 | /** | |
223 | * @release: | |
224 | * | |
225 | * Called on destruction of fence to release additional resources. | |
226 | * Can be called from irq context. This callback is optional. If it is | |
227 | * NULL, then dma_fence_free() is instead called as the default | |
228 | * implementation. | |
229 | */ | |
f54d1867 CW |
230 | void (*release)(struct dma_fence *fence); |
231 | ||
2c269b09 DV |
232 | /** |
233 | * @fence_value_str: | |
234 | * | |
235 | * Callback to fill in free-form debug info specific to this fence, like | |
236 | * the sequence number. | |
237 | * | |
238 | * This callback is optional. | |
239 | */ | |
f54d1867 | 240 | void (*fence_value_str)(struct dma_fence *fence, char *str, int size); |
2c269b09 DV |
241 | |
242 | /** | |
243 | * @timeline_value_str: | |
244 | * | |
245 | * Fills in the current value of the timeline as a string, like the | |
1b48b720 DV |
246 | * sequence number. Note that the specific fence passed to this function |
247 | * should not matter, drivers should only use it to look up the | |
248 | * corresponding timeline structures. | |
2c269b09 | 249 | */ |
f54d1867 CW |
250 | void (*timeline_value_str)(struct dma_fence *fence, |
251 | char *str, int size); | |
e941759c ML |
252 | }; |
253 | ||
f54d1867 | 254 | void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, |
b312d8ca | 255 | spinlock_t *lock, u64 context, u64 seqno); |
e941759c | 256 | |
f54d1867 CW |
257 | void dma_fence_release(struct kref *kref); |
258 | void dma_fence_free(struct dma_fence *fence); | |
e941759c | 259 | |
4be05420 | 260 | /** |
f54d1867 | 261 | * dma_fence_put - decreases refcount of the fence |
2c269b09 | 262 | * @fence: fence to reduce refcount of |
4be05420 | 263 | */ |
f54d1867 | 264 | static inline void dma_fence_put(struct dma_fence *fence) |
4be05420 CW |
265 | { |
266 | if (fence) | |
f54d1867 | 267 | kref_put(&fence->refcount, dma_fence_release); |
4be05420 CW |
268 | } |
269 | ||
e941759c | 270 | /** |
f54d1867 | 271 | * dma_fence_get - increases refcount of the fence |
2c269b09 | 272 | * @fence: fence to increase refcount of |
e941759c ML |
273 | * |
274 | * Returns the same fence, with refcount increased by 1. | |
275 | */ | |
f54d1867 | 276 | static inline struct dma_fence *dma_fence_get(struct dma_fence *fence) |
e941759c ML |
277 | { |
278 | if (fence) | |
279 | kref_get(&fence->refcount); | |
280 | return fence; | |
281 | } | |
282 | ||
3c3b177a | 283 | /** |
f54d1867 CW |
284 | * dma_fence_get_rcu - get a fence from a reservation_object_list with |
285 | * rcu read lock | |
2c269b09 | 286 | * @fence: fence to increase refcount of |
3c3b177a ML |
287 | * |
288 | * Function returns NULL if no refcount could be obtained, or the fence. | |
289 | */ | |
f54d1867 | 290 | static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence) |
3c3b177a ML |
291 | { |
292 | if (kref_get_unless_zero(&fence->refcount)) | |
293 | return fence; | |
294 | else | |
295 | return NULL; | |
296 | } | |
297 | ||
e941759c | 298 | /** |
f54d1867 | 299 | * dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence |
2c269b09 | 300 | * @fencep: pointer to fence to increase refcount of |
4be05420 CW |
301 | * |
302 | * Function returns NULL if no refcount could be obtained, or the fence. | |
303 | * This function handles acquiring a reference to a fence that may be | |
5f0d5a3a | 304 | * reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU), |
4be05420 CW |
305 | * so long as the caller is using RCU on the pointer to the fence. |
306 | * | |
307 | * An alternative mechanism is to employ a seqlock to protect a bunch of | |
308 | * fences, such as used by struct reservation_object. When using a seqlock, | |
309 | * the seqlock must be taken before and checked after a reference to the | |
310 | * fence is acquired (as shown here). | |
311 | * | |
312 | * The caller is required to hold the RCU read lock. | |
e941759c | 313 | */ |
f54d1867 | 314 | static inline struct dma_fence * |
5f72db59 | 315 | dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep) |
e941759c | 316 | { |
4be05420 | 317 | do { |
f54d1867 | 318 | struct dma_fence *fence; |
4be05420 CW |
319 | |
320 | fence = rcu_dereference(*fencep); | |
f8e0731d | 321 | if (!fence) |
4be05420 CW |
322 | return NULL; |
323 | ||
f8e0731d CK |
324 | if (!dma_fence_get_rcu(fence)) |
325 | continue; | |
326 | ||
f54d1867 | 327 | /* The atomic_inc_not_zero() inside dma_fence_get_rcu() |
4be05420 CW |
328 | * provides a full memory barrier upon success (such as now). |
329 | * This is paired with the write barrier from assigning | |
330 | * to the __rcu protected fence pointer so that if that | |
331 | * pointer still matches the current fence, we know we | |
332 | * have successfully acquire a reference to it. If it no | |
333 | * longer matches, we are holding a reference to some other | |
334 | * reallocated pointer. This is possible if the allocator | |
5f0d5a3a | 335 | * is using a freelist like SLAB_TYPESAFE_BY_RCU where the |
4be05420 CW |
336 | * fence remains valid for the RCU grace period, but it |
337 | * may be reallocated. When using such allocators, we are | |
338 | * responsible for ensuring the reference we get is to | |
339 | * the right fence, as below. | |
340 | */ | |
341 | if (fence == rcu_access_pointer(*fencep)) | |
342 | return rcu_pointer_handoff(fence); | |
343 | ||
f54d1867 | 344 | dma_fence_put(fence); |
4be05420 | 345 | } while (1); |
e941759c ML |
346 | } |
347 | ||
f54d1867 CW |
348 | int dma_fence_signal(struct dma_fence *fence); |
349 | int dma_fence_signal_locked(struct dma_fence *fence); | |
350 | signed long dma_fence_default_wait(struct dma_fence *fence, | |
351 | bool intr, signed long timeout); | |
352 | int dma_fence_add_callback(struct dma_fence *fence, | |
353 | struct dma_fence_cb *cb, | |
354 | dma_fence_func_t func); | |
355 | bool dma_fence_remove_callback(struct dma_fence *fence, | |
356 | struct dma_fence_cb *cb); | |
357 | void dma_fence_enable_sw_signaling(struct dma_fence *fence); | |
e941759c ML |
358 | |
359 | /** | |
f54d1867 CW |
360 | * dma_fence_is_signaled_locked - Return an indication if the fence |
361 | * is signaled yet. | |
2c269b09 | 362 | * @fence: the fence to check |
e941759c ML |
363 | * |
364 | * Returns true if the fence was already signaled, false if not. Since this | |
365 | * function doesn't enable signaling, it is not guaranteed to ever return | |
2c269b09 DV |
366 | * true if dma_fence_add_callback(), dma_fence_wait() or |
367 | * dma_fence_enable_sw_signaling() haven't been called before. | |
e941759c | 368 | * |
2c269b09 DV |
369 | * This function requires &dma_fence.lock to be held. |
370 | * | |
371 | * See also dma_fence_is_signaled(). | |
e941759c ML |
372 | */ |
373 | static inline bool | |
f54d1867 | 374 | dma_fence_is_signaled_locked(struct dma_fence *fence) |
e941759c | 375 | { |
f54d1867 | 376 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
377 | return true; |
378 | ||
379 | if (fence->ops->signaled && fence->ops->signaled(fence)) { | |
f54d1867 | 380 | dma_fence_signal_locked(fence); |
e941759c ML |
381 | return true; |
382 | } | |
383 | ||
384 | return false; | |
385 | } | |
386 | ||
387 | /** | |
f54d1867 | 388 | * dma_fence_is_signaled - Return an indication if the fence is signaled yet. |
2c269b09 | 389 | * @fence: the fence to check |
e941759c ML |
390 | * |
391 | * Returns true if the fence was already signaled, false if not. Since this | |
392 | * function doesn't enable signaling, it is not guaranteed to ever return | |
2c269b09 DV |
393 | * true if dma_fence_add_callback(), dma_fence_wait() or |
394 | * dma_fence_enable_sw_signaling() haven't been called before. | |
e941759c | 395 | * |
f54d1867 | 396 | * It's recommended for seqno fences to call dma_fence_signal when the |
e941759c ML |
397 | * operation is complete, it makes it possible to prevent issues from |
398 | * wraparound between time of issue and time of use by checking the return | |
399 | * value of this function before calling hardware-specific wait instructions. | |
2c269b09 DV |
400 | * |
401 | * See also dma_fence_is_signaled_locked(). | |
e941759c ML |
402 | */ |
403 | static inline bool | |
f54d1867 | 404 | dma_fence_is_signaled(struct dma_fence *fence) |
e941759c | 405 | { |
f54d1867 | 406 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
407 | return true; |
408 | ||
409 | if (fence->ops->signaled && fence->ops->signaled(fence)) { | |
f54d1867 | 410 | dma_fence_signal(fence); |
e941759c ML |
411 | return true; |
412 | } | |
413 | ||
414 | return false; | |
415 | } | |
416 | ||
81114776 CW |
417 | /** |
418 | * __dma_fence_is_later - return if f1 is chronologically later than f2 | |
2c269b09 DV |
419 | * @f1: the first fence's seqno |
420 | * @f2: the second fence's seqno from the same context | |
5e498abf | 421 | * @ops: dma_fence_ops associated with the seqno |
81114776 CW |
422 | * |
423 | * Returns true if f1 is chronologically later than f2. Both fences must be | |
424 | * from the same context, since a seqno is not common across contexts. | |
425 | */ | |
5e498abf CK |
426 | static inline bool __dma_fence_is_later(u64 f1, u64 f2, |
427 | const struct dma_fence_ops *ops) | |
81114776 | 428 | { |
b312d8ca | 429 | /* This is for backward compatibility with drivers which can only handle |
5e498abf CK |
430 | * 32bit sequence numbers. Use a 64bit compare when the driver says to |
431 | * do so. | |
b312d8ca | 432 | */ |
5e498abf | 433 | if (ops->use_64bit_seqno) |
b312d8ca CK |
434 | return f1 > f2; |
435 | ||
436 | return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; | |
81114776 CW |
437 | } |
438 | ||
6c455ac1 | 439 | /** |
f54d1867 | 440 | * dma_fence_is_later - return if f1 is chronologically later than f2 |
2c269b09 DV |
441 | * @f1: the first fence from the same context |
442 | * @f2: the second fence from the same context | |
6c455ac1 CK |
443 | * |
444 | * Returns true if f1 is chronologically later than f2. Both fences must be | |
445 | * from the same context, since a seqno is not re-used across contexts. | |
446 | */ | |
f54d1867 CW |
447 | static inline bool dma_fence_is_later(struct dma_fence *f1, |
448 | struct dma_fence *f2) | |
6c455ac1 CK |
449 | { |
450 | if (WARN_ON(f1->context != f2->context)) | |
451 | return false; | |
452 | ||
5e498abf | 453 | return __dma_fence_is_later(f1->seqno, f2->seqno, f1->ops); |
6c455ac1 CK |
454 | } |
455 | ||
e941759c | 456 | /** |
f54d1867 | 457 | * dma_fence_later - return the chronologically later fence |
2c269b09 DV |
458 | * @f1: the first fence from the same context |
459 | * @f2: the second fence from the same context | |
e941759c ML |
460 | * |
461 | * Returns NULL if both fences are signaled, otherwise the fence that would be | |
462 | * signaled last. Both fences must be from the same context, since a seqno is | |
463 | * not re-used across contexts. | |
464 | */ | |
f54d1867 CW |
465 | static inline struct dma_fence *dma_fence_later(struct dma_fence *f1, |
466 | struct dma_fence *f2) | |
e941759c ML |
467 | { |
468 | if (WARN_ON(f1->context != f2->context)) | |
469 | return NULL; | |
470 | ||
471 | /* | |
f54d1867 CW |
472 | * Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never |
473 | * have been set if enable_signaling wasn't called, and enabling that | |
474 | * here is overkill. | |
e941759c | 475 | */ |
f54d1867 CW |
476 | if (dma_fence_is_later(f1, f2)) |
477 | return dma_fence_is_signaled(f1) ? NULL : f1; | |
6c455ac1 | 478 | else |
f54d1867 | 479 | return dma_fence_is_signaled(f2) ? NULL : f2; |
e941759c ML |
480 | } |
481 | ||
d6c99f4b CW |
482 | /** |
483 | * dma_fence_get_status_locked - returns the status upon completion | |
2c269b09 | 484 | * @fence: the dma_fence to query |
d6c99f4b CW |
485 | * |
486 | * Drivers can supply an optional error status condition before they signal | |
487 | * the fence (to indicate whether the fence was completed due to an error | |
488 | * rather than success). The value of the status condition is only valid | |
489 | * if the fence has been signaled, dma_fence_get_status_locked() first checks | |
490 | * the signal state before reporting the error status. | |
491 | * | |
492 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has | |
493 | * been signaled without an error condition, or a negative error code | |
494 | * if the fence has been completed in err. | |
495 | */ | |
496 | static inline int dma_fence_get_status_locked(struct dma_fence *fence) | |
497 | { | |
498 | if (dma_fence_is_signaled_locked(fence)) | |
a009e975 | 499 | return fence->error ?: 1; |
d6c99f4b CW |
500 | else |
501 | return 0; | |
502 | } | |
503 | ||
504 | int dma_fence_get_status(struct dma_fence *fence); | |
505 | ||
a009e975 CW |
506 | /** |
507 | * dma_fence_set_error - flag an error condition on the fence | |
2c269b09 DV |
508 | * @fence: the dma_fence |
509 | * @error: the error to store | |
a009e975 CW |
510 | * |
511 | * Drivers can supply an optional error status condition before they signal | |
512 | * the fence, to indicate that the fence was completed due to an error | |
513 | * rather than success. This must be set before signaling (so that the value | |
514 | * is visible before any waiters on the signal callback are woken). This | |
515 | * helper exists to help catching erroneous setting of #dma_fence.error. | |
516 | */ | |
517 | static inline void dma_fence_set_error(struct dma_fence *fence, | |
518 | int error) | |
519 | { | |
6ce31263 DV |
520 | WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)); |
521 | WARN_ON(error >= 0 || error < -MAX_ERRNO); | |
a009e975 CW |
522 | |
523 | fence->error = error; | |
524 | } | |
525 | ||
f54d1867 | 526 | signed long dma_fence_wait_timeout(struct dma_fence *, |
a519435a | 527 | bool intr, signed long timeout); |
f54d1867 CW |
528 | signed long dma_fence_wait_any_timeout(struct dma_fence **fences, |
529 | uint32_t count, | |
7392b4bb | 530 | bool intr, signed long timeout, |
531 | uint32_t *idx); | |
e941759c ML |
532 | |
533 | /** | |
f54d1867 | 534 | * dma_fence_wait - sleep until the fence gets signaled |
2c269b09 DV |
535 | * @fence: the fence to wait on |
536 | * @intr: if true, do an interruptible wait | |
e941759c ML |
537 | * |
538 | * This function will return -ERESTARTSYS if interrupted by a signal, | |
539 | * or 0 if the fence was signaled. Other error values may be | |
540 | * returned on custom implementations. | |
541 | * | |
542 | * Performs a synchronous wait on this fence. It is assumed the caller | |
543 | * directly or indirectly holds a reference to the fence, otherwise the | |
544 | * fence might be freed before return, resulting in undefined behavior. | |
2c269b09 DV |
545 | * |
546 | * See also dma_fence_wait_timeout() and dma_fence_wait_any_timeout(). | |
e941759c | 547 | */ |
f54d1867 | 548 | static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) |
e941759c ML |
549 | { |
550 | signed long ret; | |
551 | ||
f54d1867 | 552 | /* Since dma_fence_wait_timeout cannot timeout with |
e941759c ML |
553 | * MAX_SCHEDULE_TIMEOUT, only valid return values are |
554 | * -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT. | |
555 | */ | |
f54d1867 | 556 | ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); |
e941759c ML |
557 | |
558 | return ret < 0 ? ret : 0; | |
559 | } | |
560 | ||
078dec33 | 561 | struct dma_fence *dma_fence_get_stub(void); |
f54d1867 | 562 | u64 dma_fence_context_alloc(unsigned num); |
e941759c | 563 | |
f54d1867 | 564 | #define DMA_FENCE_TRACE(f, fmt, args...) \ |
e941759c | 565 | do { \ |
f54d1867 CW |
566 | struct dma_fence *__ff = (f); \ |
567 | if (IS_ENABLED(CONFIG_DMA_FENCE_TRACE)) \ | |
b312d8ca | 568 | pr_info("f %llu#%llu: " fmt, \ |
e941759c ML |
569 | __ff->context, __ff->seqno, ##args); \ |
570 | } while (0) | |
571 | ||
f54d1867 | 572 | #define DMA_FENCE_WARN(f, fmt, args...) \ |
e941759c | 573 | do { \ |
f54d1867 | 574 | struct dma_fence *__ff = (f); \ |
b312d8ca | 575 | pr_warn("f %llu#%llu: " fmt, __ff->context, __ff->seqno,\ |
e941759c ML |
576 | ##args); \ |
577 | } while (0) | |
578 | ||
f54d1867 | 579 | #define DMA_FENCE_ERR(f, fmt, args...) \ |
e941759c | 580 | do { \ |
f54d1867 | 581 | struct dma_fence *__ff = (f); \ |
b312d8ca | 582 | pr_err("f %llu#%llu: " fmt, __ff->context, __ff->seqno, \ |
e941759c ML |
583 | ##args); \ |
584 | } while (0) | |
585 | ||
f54d1867 | 586 | #endif /* __LINUX_DMA_FENCE_H */ |