Commit | Line | Data |
---|---|---|
e941759c ML |
1 | /* |
2 | * Fence mechanism for dma-buf to allow for asynchronous dma access | |
3 | * | |
4 | * Copyright (C) 2012 Canonical Ltd | |
5 | * Copyright (C) 2012 Texas Instruments | |
6 | * | |
7 | * Authors: | |
8 | * Rob Clark <robdclark@gmail.com> | |
9 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License version 2 as published by | |
13 | * the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
18 | * more details. | |
19 | */ | |
20 | ||
f54d1867 CW |
21 | #ifndef __LINUX_DMA_FENCE_H |
22 | #define __LINUX_DMA_FENCE_H | |
e941759c ML |
23 | |
24 | #include <linux/err.h> | |
25 | #include <linux/wait.h> | |
26 | #include <linux/list.h> | |
27 | #include <linux/bitops.h> | |
28 | #include <linux/kref.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/printk.h> | |
3c3b177a | 31 | #include <linux/rcupdate.h> |
e941759c | 32 | |
f54d1867 CW |
33 | struct dma_fence; |
34 | struct dma_fence_ops; | |
35 | struct dma_fence_cb; | |
e941759c ML |
36 | |
37 | /** | |
f54d1867 | 38 | * struct dma_fence - software synchronization primitive |
e941759c | 39 | * @refcount: refcount for this fence |
f54d1867 | 40 | * @ops: dma_fence_ops associated with this fence |
3c3b177a | 41 | * @rcu: used for releasing fence with kfree_rcu |
e941759c ML |
42 | * @cb_list: list of all callbacks to call |
43 | * @lock: spin_lock_irqsave used for locking | |
44 | * @context: execution context this fence belongs to, returned by | |
f54d1867 | 45 | * dma_fence_context_alloc() |
e941759c ML |
46 | * @seqno: the sequence number of this fence inside the execution context, |
47 | * can be compared to decide which fence would be signaled later. | |
f54d1867 | 48 | * @flags: A mask of DMA_FENCE_FLAG_* defined below |
e941759c | 49 | * @timestamp: Timestamp when the fence was signaled. |
a009e975 | 50 | * @error: Optional, only valid if < 0, must be set before calling |
f54d1867 | 51 | * dma_fence_signal, indicates that the fence has completed with an error. |
e941759c ML |
52 | * |
53 | * the flags member must be manipulated and read using the appropriate | |
54 | * atomic ops (bit_*), so taking the spinlock will not be needed most | |
55 | * of the time. | |
56 | * | |
f54d1867 | 57 | * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled |
76250f2b | 58 | * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling |
f54d1867 CW |
59 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called |
60 | * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the | |
e941759c ML |
61 | * implementer of the fence for its own purposes. Can be used in different |
62 | * ways by different fence implementers, so do not rely on this. | |
63 | * | |
3590d50e | 64 | * Since atomic bitops are used, this is not guaranteed to be the case. |
f54d1867 | 65 | * Particularly, if the bit was set, but dma_fence_signal was called right |
e941759c | 66 | * before this bit was set, it would have been able to set the |
f54d1867 CW |
67 | * DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called. |
68 | * Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting | |
69 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that | |
70 | * after dma_fence_signal was called, any enable_signaling call will have either | |
e941759c ML |
71 | * been completed, or never called at all. |
72 | */ | |
f54d1867 | 73 | struct dma_fence { |
e941759c | 74 | struct kref refcount; |
f54d1867 | 75 | const struct dma_fence_ops *ops; |
3c3b177a | 76 | struct rcu_head rcu; |
e941759c ML |
77 | struct list_head cb_list; |
78 | spinlock_t *lock; | |
76bf0db5 CK |
79 | u64 context; |
80 | unsigned seqno; | |
e941759c ML |
81 | unsigned long flags; |
82 | ktime_t timestamp; | |
a009e975 | 83 | int error; |
e941759c ML |
84 | }; |
85 | ||
f54d1867 CW |
86 | enum dma_fence_flag_bits { |
87 | DMA_FENCE_FLAG_SIGNALED_BIT, | |
76250f2b | 88 | DMA_FENCE_FLAG_TIMESTAMP_BIT, |
f54d1867 CW |
89 | DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
90 | DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ | |
e941759c ML |
91 | }; |
92 | ||
f54d1867 CW |
93 | typedef void (*dma_fence_func_t)(struct dma_fence *fence, |
94 | struct dma_fence_cb *cb); | |
e941759c ML |
95 | |
96 | /** | |
f54d1867 CW |
97 | * struct dma_fence_cb - callback for dma_fence_add_callback |
98 | * @node: used by dma_fence_add_callback to append this struct to fence::cb_list | |
99 | * @func: dma_fence_func_t to call | |
e941759c | 100 | * |
f54d1867 CW |
101 | * This struct will be initialized by dma_fence_add_callback, additional |
102 | * data can be passed along by embedding dma_fence_cb in another struct. | |
e941759c | 103 | */ |
f54d1867 | 104 | struct dma_fence_cb { |
e941759c | 105 | struct list_head node; |
f54d1867 | 106 | dma_fence_func_t func; |
e941759c ML |
107 | }; |
108 | ||
109 | /** | |
f54d1867 | 110 | * struct dma_fence_ops - operations implemented for fence |
e941759c ML |
111 | * @get_driver_name: returns the driver name. |
112 | * @get_timeline_name: return the name of the context this fence belongs to. | |
113 | * @enable_signaling: enable software signaling of fence. | |
114 | * @signaled: [optional] peek whether the fence is signaled, can be null. | |
f54d1867 | 115 | * @wait: custom wait implementation, or dma_fence_default_wait. |
e941759c ML |
116 | * @release: [optional] called on destruction of fence, can be null |
117 | * @fill_driver_data: [optional] callback to fill in free-form debug info | |
118 | * Returns amount of bytes filled, or -errno. | |
119 | * @fence_value_str: [optional] fills in the value of the fence as a string | |
120 | * @timeline_value_str: [optional] fills in the current value of the timeline | |
121 | * as a string | |
122 | * | |
123 | * Notes on enable_signaling: | |
124 | * For fence implementations that have the capability for hw->hw | |
125 | * signaling, they can implement this op to enable the necessary | |
126 | * irqs, or insert commands into cmdstream, etc. This is called | |
127 | * in the first wait() or add_callback() path to let the fence | |
128 | * implementation know that there is another driver waiting on | |
129 | * the signal (ie. hw->sw case). | |
130 | * | |
448956d6 | 131 | * This function can be called from atomic context, but not |
e941759c ML |
132 | * from irq context, so normal spinlocks can be used. |
133 | * | |
134 | * A return value of false indicates the fence already passed, | |
f353d71f MI |
135 | * or some failure occurred that made it impossible to enable |
136 | * signaling. True indicates successful enabling. | |
e941759c | 137 | * |
a009e975 | 138 | * fence->error may be set in enable_signaling, but only when false is |
e941759c ML |
139 | * returned. |
140 | * | |
f54d1867 | 141 | * Calling dma_fence_signal before enable_signaling is called allows |
e941759c | 142 | * for a tiny race window in which enable_signaling is called during, |
f54d1867 | 143 | * before, or after dma_fence_signal. To fight this, it is recommended |
e941759c ML |
144 | * that before enable_signaling returns true an extra reference is |
145 | * taken on the fence, to be released when the fence is signaled. | |
f54d1867 | 146 | * This will mean dma_fence_signal will still be called twice, but |
e941759c ML |
147 | * the second time will be a noop since it was already signaled. |
148 | * | |
149 | * Notes on signaled: | |
a009e975 | 150 | * May set fence->error if returning true. |
e941759c ML |
151 | * |
152 | * Notes on wait: | |
f54d1867 CW |
153 | * Must not be NULL, set to dma_fence_default_wait for default implementation. |
154 | * the dma_fence_default_wait implementation should work for any fence, as long | |
e941759c ML |
155 | * as enable_signaling works correctly. |
156 | * | |
157 | * Must return -ERESTARTSYS if the wait is intr = true and the wait was | |
158 | * interrupted, and remaining jiffies if fence has signaled, or 0 if wait | |
159 | * timed out. Can also return other error values on custom implementations, | |
160 | * which should be treated as if the fence is signaled. For example a hardware | |
161 | * lockup could be reported like that. | |
162 | * | |
163 | * Notes on release: | |
164 | * Can be NULL, this function allows additional commands to run on | |
165 | * destruction of the fence. Can be called from irq context. | |
166 | * If pointer is set to NULL, kfree will get called instead. | |
167 | */ | |
168 | ||
f54d1867 CW |
169 | struct dma_fence_ops { |
170 | const char * (*get_driver_name)(struct dma_fence *fence); | |
171 | const char * (*get_timeline_name)(struct dma_fence *fence); | |
172 | bool (*enable_signaling)(struct dma_fence *fence); | |
173 | bool (*signaled)(struct dma_fence *fence); | |
174 | signed long (*wait)(struct dma_fence *fence, | |
175 | bool intr, signed long timeout); | |
176 | void (*release)(struct dma_fence *fence); | |
177 | ||
178 | int (*fill_driver_data)(struct dma_fence *fence, void *data, int size); | |
179 | void (*fence_value_str)(struct dma_fence *fence, char *str, int size); | |
180 | void (*timeline_value_str)(struct dma_fence *fence, | |
181 | char *str, int size); | |
e941759c ML |
182 | }; |
183 | ||
f54d1867 CW |
184 | void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, |
185 | spinlock_t *lock, u64 context, unsigned seqno); | |
e941759c | 186 | |
f54d1867 CW |
187 | void dma_fence_release(struct kref *kref); |
188 | void dma_fence_free(struct dma_fence *fence); | |
e941759c | 189 | |
4be05420 | 190 | /** |
f54d1867 | 191 | * dma_fence_put - decreases refcount of the fence |
4be05420 CW |
192 | * @fence: [in] fence to reduce refcount of |
193 | */ | |
f54d1867 | 194 | static inline void dma_fence_put(struct dma_fence *fence) |
4be05420 CW |
195 | { |
196 | if (fence) | |
f54d1867 | 197 | kref_put(&fence->refcount, dma_fence_release); |
4be05420 CW |
198 | } |
199 | ||
e941759c | 200 | /** |
f54d1867 | 201 | * dma_fence_get - increases refcount of the fence |
e941759c ML |
202 | * @fence: [in] fence to increase refcount of |
203 | * | |
204 | * Returns the same fence, with refcount increased by 1. | |
205 | */ | |
f54d1867 | 206 | static inline struct dma_fence *dma_fence_get(struct dma_fence *fence) |
e941759c ML |
207 | { |
208 | if (fence) | |
209 | kref_get(&fence->refcount); | |
210 | return fence; | |
211 | } | |
212 | ||
3c3b177a | 213 | /** |
f54d1867 CW |
214 | * dma_fence_get_rcu - get a fence from a reservation_object_list with |
215 | * rcu read lock | |
3c3b177a ML |
216 | * @fence: [in] fence to increase refcount of |
217 | * | |
218 | * Function returns NULL if no refcount could be obtained, or the fence. | |
219 | */ | |
f54d1867 | 220 | static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence) |
3c3b177a ML |
221 | { |
222 | if (kref_get_unless_zero(&fence->refcount)) | |
223 | return fence; | |
224 | else | |
225 | return NULL; | |
226 | } | |
227 | ||
e941759c | 228 | /** |
f54d1867 | 229 | * dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence |
8a5846bf | 230 | * @fencep: [in] pointer to fence to increase refcount of |
4be05420 CW |
231 | * |
232 | * Function returns NULL if no refcount could be obtained, or the fence. | |
233 | * This function handles acquiring a reference to a fence that may be | |
5f0d5a3a | 234 | * reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU), |
4be05420 CW |
235 | * so long as the caller is using RCU on the pointer to the fence. |
236 | * | |
237 | * An alternative mechanism is to employ a seqlock to protect a bunch of | |
238 | * fences, such as used by struct reservation_object. When using a seqlock, | |
239 | * the seqlock must be taken before and checked after a reference to the | |
240 | * fence is acquired (as shown here). | |
241 | * | |
242 | * The caller is required to hold the RCU read lock. | |
e941759c | 243 | */ |
f54d1867 | 244 | static inline struct dma_fence * |
5f72db59 | 245 | dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep) |
e941759c | 246 | { |
4be05420 | 247 | do { |
f54d1867 | 248 | struct dma_fence *fence; |
4be05420 CW |
249 | |
250 | fence = rcu_dereference(*fencep); | |
f8e0731d | 251 | if (!fence) |
4be05420 CW |
252 | return NULL; |
253 | ||
f8e0731d CK |
254 | if (!dma_fence_get_rcu(fence)) |
255 | continue; | |
256 | ||
f54d1867 | 257 | /* The atomic_inc_not_zero() inside dma_fence_get_rcu() |
4be05420 CW |
258 | * provides a full memory barrier upon success (such as now). |
259 | * This is paired with the write barrier from assigning | |
260 | * to the __rcu protected fence pointer so that if that | |
261 | * pointer still matches the current fence, we know we | |
262 | * have successfully acquire a reference to it. If it no | |
263 | * longer matches, we are holding a reference to some other | |
264 | * reallocated pointer. This is possible if the allocator | |
5f0d5a3a | 265 | * is using a freelist like SLAB_TYPESAFE_BY_RCU where the |
4be05420 CW |
266 | * fence remains valid for the RCU grace period, but it |
267 | * may be reallocated. When using such allocators, we are | |
268 | * responsible for ensuring the reference we get is to | |
269 | * the right fence, as below. | |
270 | */ | |
271 | if (fence == rcu_access_pointer(*fencep)) | |
272 | return rcu_pointer_handoff(fence); | |
273 | ||
f54d1867 | 274 | dma_fence_put(fence); |
4be05420 | 275 | } while (1); |
e941759c ML |
276 | } |
277 | ||
f54d1867 CW |
278 | int dma_fence_signal(struct dma_fence *fence); |
279 | int dma_fence_signal_locked(struct dma_fence *fence); | |
280 | signed long dma_fence_default_wait(struct dma_fence *fence, | |
281 | bool intr, signed long timeout); | |
282 | int dma_fence_add_callback(struct dma_fence *fence, | |
283 | struct dma_fence_cb *cb, | |
284 | dma_fence_func_t func); | |
285 | bool dma_fence_remove_callback(struct dma_fence *fence, | |
286 | struct dma_fence_cb *cb); | |
287 | void dma_fence_enable_sw_signaling(struct dma_fence *fence); | |
e941759c ML |
288 | |
289 | /** | |
f54d1867 CW |
290 | * dma_fence_is_signaled_locked - Return an indication if the fence |
291 | * is signaled yet. | |
e941759c ML |
292 | * @fence: [in] the fence to check |
293 | * | |
294 | * Returns true if the fence was already signaled, false if not. Since this | |
295 | * function doesn't enable signaling, it is not guaranteed to ever return | |
f54d1867 CW |
296 | * true if dma_fence_add_callback, dma_fence_wait or |
297 | * dma_fence_enable_sw_signaling haven't been called before. | |
e941759c ML |
298 | * |
299 | * This function requires fence->lock to be held. | |
300 | */ | |
301 | static inline bool | |
f54d1867 | 302 | dma_fence_is_signaled_locked(struct dma_fence *fence) |
e941759c | 303 | { |
f54d1867 | 304 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
305 | return true; |
306 | ||
307 | if (fence->ops->signaled && fence->ops->signaled(fence)) { | |
f54d1867 | 308 | dma_fence_signal_locked(fence); |
e941759c ML |
309 | return true; |
310 | } | |
311 | ||
312 | return false; | |
313 | } | |
314 | ||
315 | /** | |
f54d1867 | 316 | * dma_fence_is_signaled - Return an indication if the fence is signaled yet. |
e941759c ML |
317 | * @fence: [in] the fence to check |
318 | * | |
319 | * Returns true if the fence was already signaled, false if not. Since this | |
320 | * function doesn't enable signaling, it is not guaranteed to ever return | |
f54d1867 CW |
321 | * true if dma_fence_add_callback, dma_fence_wait or |
322 | * dma_fence_enable_sw_signaling haven't been called before. | |
e941759c | 323 | * |
f54d1867 | 324 | * It's recommended for seqno fences to call dma_fence_signal when the |
e941759c ML |
325 | * operation is complete, it makes it possible to prevent issues from |
326 | * wraparound between time of issue and time of use by checking the return | |
327 | * value of this function before calling hardware-specific wait instructions. | |
328 | */ | |
329 | static inline bool | |
f54d1867 | 330 | dma_fence_is_signaled(struct dma_fence *fence) |
e941759c | 331 | { |
f54d1867 | 332 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
333 | return true; |
334 | ||
335 | if (fence->ops->signaled && fence->ops->signaled(fence)) { | |
f54d1867 | 336 | dma_fence_signal(fence); |
e941759c ML |
337 | return true; |
338 | } | |
339 | ||
340 | return false; | |
341 | } | |
342 | ||
81114776 CW |
343 | /** |
344 | * __dma_fence_is_later - return if f1 is chronologically later than f2 | |
345 | * @f1: [in] the first fence's seqno | |
346 | * @f2: [in] the second fence's seqno from the same context | |
347 | * | |
348 | * Returns true if f1 is chronologically later than f2. Both fences must be | |
349 | * from the same context, since a seqno is not common across contexts. | |
350 | */ | |
351 | static inline bool __dma_fence_is_later(u32 f1, u32 f2) | |
352 | { | |
353 | return (int)(f1 - f2) > 0; | |
354 | } | |
355 | ||
6c455ac1 | 356 | /** |
f54d1867 | 357 | * dma_fence_is_later - return if f1 is chronologically later than f2 |
6c455ac1 CK |
358 | * @f1: [in] the first fence from the same context |
359 | * @f2: [in] the second fence from the same context | |
360 | * | |
361 | * Returns true if f1 is chronologically later than f2. Both fences must be | |
362 | * from the same context, since a seqno is not re-used across contexts. | |
363 | */ | |
f54d1867 CW |
364 | static inline bool dma_fence_is_later(struct dma_fence *f1, |
365 | struct dma_fence *f2) | |
6c455ac1 CK |
366 | { |
367 | if (WARN_ON(f1->context != f2->context)) | |
368 | return false; | |
369 | ||
81114776 | 370 | return __dma_fence_is_later(f1->seqno, f2->seqno); |
6c455ac1 CK |
371 | } |
372 | ||
e941759c | 373 | /** |
f54d1867 | 374 | * dma_fence_later - return the chronologically later fence |
e941759c ML |
375 | * @f1: [in] the first fence from the same context |
376 | * @f2: [in] the second fence from the same context | |
377 | * | |
378 | * Returns NULL if both fences are signaled, otherwise the fence that would be | |
379 | * signaled last. Both fences must be from the same context, since a seqno is | |
380 | * not re-used across contexts. | |
381 | */ | |
f54d1867 CW |
382 | static inline struct dma_fence *dma_fence_later(struct dma_fence *f1, |
383 | struct dma_fence *f2) | |
e941759c ML |
384 | { |
385 | if (WARN_ON(f1->context != f2->context)) | |
386 | return NULL; | |
387 | ||
388 | /* | |
f54d1867 CW |
389 | * Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never |
390 | * have been set if enable_signaling wasn't called, and enabling that | |
391 | * here is overkill. | |
e941759c | 392 | */ |
f54d1867 CW |
393 | if (dma_fence_is_later(f1, f2)) |
394 | return dma_fence_is_signaled(f1) ? NULL : f1; | |
6c455ac1 | 395 | else |
f54d1867 | 396 | return dma_fence_is_signaled(f2) ? NULL : f2; |
e941759c ML |
397 | } |
398 | ||
d6c99f4b CW |
399 | /** |
400 | * dma_fence_get_status_locked - returns the status upon completion | |
401 | * @fence: [in] the dma_fence to query | |
402 | * | |
403 | * Drivers can supply an optional error status condition before they signal | |
404 | * the fence (to indicate whether the fence was completed due to an error | |
405 | * rather than success). The value of the status condition is only valid | |
406 | * if the fence has been signaled, dma_fence_get_status_locked() first checks | |
407 | * the signal state before reporting the error status. | |
408 | * | |
409 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has | |
410 | * been signaled without an error condition, or a negative error code | |
411 | * if the fence has been completed in err. | |
412 | */ | |
413 | static inline int dma_fence_get_status_locked(struct dma_fence *fence) | |
414 | { | |
415 | if (dma_fence_is_signaled_locked(fence)) | |
a009e975 | 416 | return fence->error ?: 1; |
d6c99f4b CW |
417 | else |
418 | return 0; | |
419 | } | |
420 | ||
421 | int dma_fence_get_status(struct dma_fence *fence); | |
422 | ||
a009e975 CW |
423 | /** |
424 | * dma_fence_set_error - flag an error condition on the fence | |
425 | * @fence: [in] the dma_fence | |
426 | * @error: [in] the error to store | |
427 | * | |
428 | * Drivers can supply an optional error status condition before they signal | |
429 | * the fence, to indicate that the fence was completed due to an error | |
430 | * rather than success. This must be set before signaling (so that the value | |
431 | * is visible before any waiters on the signal callback are woken). This | |
432 | * helper exists to help catching erroneous setting of #dma_fence.error. | |
433 | */ | |
434 | static inline void dma_fence_set_error(struct dma_fence *fence, | |
435 | int error) | |
436 | { | |
6ce31263 DV |
437 | WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)); |
438 | WARN_ON(error >= 0 || error < -MAX_ERRNO); | |
a009e975 CW |
439 | |
440 | fence->error = error; | |
441 | } | |
442 | ||
f54d1867 | 443 | signed long dma_fence_wait_timeout(struct dma_fence *, |
a519435a | 444 | bool intr, signed long timeout); |
f54d1867 CW |
445 | signed long dma_fence_wait_any_timeout(struct dma_fence **fences, |
446 | uint32_t count, | |
7392b4bb | 447 | bool intr, signed long timeout, |
448 | uint32_t *idx); | |
e941759c ML |
449 | |
450 | /** | |
f54d1867 | 451 | * dma_fence_wait - sleep until the fence gets signaled |
e941759c ML |
452 | * @fence: [in] the fence to wait on |
453 | * @intr: [in] if true, do an interruptible wait | |
454 | * | |
455 | * This function will return -ERESTARTSYS if interrupted by a signal, | |
456 | * or 0 if the fence was signaled. Other error values may be | |
457 | * returned on custom implementations. | |
458 | * | |
459 | * Performs a synchronous wait on this fence. It is assumed the caller | |
460 | * directly or indirectly holds a reference to the fence, otherwise the | |
461 | * fence might be freed before return, resulting in undefined behavior. | |
462 | */ | |
f54d1867 | 463 | static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) |
e941759c ML |
464 | { |
465 | signed long ret; | |
466 | ||
f54d1867 | 467 | /* Since dma_fence_wait_timeout cannot timeout with |
e941759c ML |
468 | * MAX_SCHEDULE_TIMEOUT, only valid return values are |
469 | * -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT. | |
470 | */ | |
f54d1867 | 471 | ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); |
e941759c ML |
472 | |
473 | return ret < 0 ? ret : 0; | |
474 | } | |
475 | ||
f54d1867 | 476 | u64 dma_fence_context_alloc(unsigned num); |
e941759c | 477 | |
f54d1867 | 478 | #define DMA_FENCE_TRACE(f, fmt, args...) \ |
e941759c | 479 | do { \ |
f54d1867 CW |
480 | struct dma_fence *__ff = (f); \ |
481 | if (IS_ENABLED(CONFIG_DMA_FENCE_TRACE)) \ | |
76bf0db5 | 482 | pr_info("f %llu#%u: " fmt, \ |
e941759c ML |
483 | __ff->context, __ff->seqno, ##args); \ |
484 | } while (0) | |
485 | ||
f54d1867 | 486 | #define DMA_FENCE_WARN(f, fmt, args...) \ |
e941759c | 487 | do { \ |
f54d1867 | 488 | struct dma_fence *__ff = (f); \ |
76bf0db5 | 489 | pr_warn("f %llu#%u: " fmt, __ff->context, __ff->seqno, \ |
e941759c ML |
490 | ##args); \ |
491 | } while (0) | |
492 | ||
f54d1867 | 493 | #define DMA_FENCE_ERR(f, fmt, args...) \ |
e941759c | 494 | do { \ |
f54d1867 | 495 | struct dma_fence *__ff = (f); \ |
76bf0db5 | 496 | pr_err("f %llu#%u: " fmt, __ff->context, __ff->seqno, \ |
e941759c ML |
497 | ##args); \ |
498 | } while (0) | |
499 | ||
f54d1867 | 500 | #endif /* __LINUX_DMA_FENCE_H */ |