Commit | Line | Data |
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ea8c64ac | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
b4174173 CH |
2 | /* |
3 | * Internals of the DMA direct mapping implementation. Only for use by the | |
4 | * DMA mapping code and IOMMU drivers. | |
5 | */ | |
ea8c64ac CH |
6 | #ifndef _LINUX_DMA_DIRECT_H |
7 | #define _LINUX_DMA_DIRECT_H 1 | |
8 | ||
9 | #include <linux/dma-mapping.h> | |
9f4df96b | 10 | #include <linux/dma-map-ops.h> |
b12d6627 | 11 | #include <linux/memblock.h> /* for min_low_pfn */ |
b6e05477 | 12 | #include <linux/mem_encrypt.h> |
b4174173 | 13 | #include <linux/swiotlb.h> |
ea8c64ac | 14 | |
8b5369ea NSJ |
15 | extern unsigned int zone_dma_bits; |
16 | ||
e0d07278 JQ |
17 | /* |
18 | * Record the mapping of CPU physical to DMA addresses for a given region. | |
19 | */ | |
20 | struct bus_dma_region { | |
21 | phys_addr_t cpu_start; | |
22 | dma_addr_t dma_start; | |
23 | u64 size; | |
24 | u64 offset; | |
25 | }; | |
26 | ||
27 | static inline dma_addr_t translate_phys_to_dma(struct device *dev, | |
28 | phys_addr_t paddr) | |
29 | { | |
30 | const struct bus_dma_region *m; | |
31 | ||
32 | for (m = dev->dma_range_map; m->size; m++) | |
33 | if (paddr >= m->cpu_start && paddr - m->cpu_start < m->size) | |
34 | return (dma_addr_t)paddr - m->offset; | |
35 | ||
36 | /* make sure dma_capable fails when no translation is available */ | |
37 | return DMA_MAPPING_ERROR; | |
38 | } | |
39 | ||
40 | static inline phys_addr_t translate_dma_to_phys(struct device *dev, | |
41 | dma_addr_t dma_addr) | |
42 | { | |
43 | const struct bus_dma_region *m; | |
44 | ||
45 | for (m = dev->dma_range_map; m->size; m++) | |
46 | if (dma_addr >= m->dma_start && dma_addr - m->dma_start < m->size) | |
47 | return (phys_addr_t)dma_addr + m->offset; | |
48 | ||
49 | return (phys_addr_t)-1; | |
50 | } | |
51 | ||
ea8c64ac CH |
52 | #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA |
53 | #include <asm/dma-direct.h> | |
5ceda740 CH |
54 | #ifndef phys_to_dma_unencrypted |
55 | #define phys_to_dma_unencrypted phys_to_dma | |
56 | #endif | |
ea8c64ac | 57 | #else |
5ceda740 CH |
58 | static inline dma_addr_t phys_to_dma_unencrypted(struct device *dev, |
59 | phys_addr_t paddr) | |
ea8c64ac | 60 | { |
e0d07278 JQ |
61 | if (dev->dma_range_map) |
62 | return translate_phys_to_dma(dev, paddr); | |
63 | return paddr; | |
ea8c64ac CH |
64 | } |
65 | ||
5ceda740 CH |
66 | /* |
67 | * If memory encryption is supported, phys_to_dma will set the memory encryption | |
68 | * bit in the DMA address, and dma_to_phys will clear it. | |
69 | * phys_to_dma_unencrypted is for use on special unencrypted memory like swiotlb | |
70 | * buffers. | |
71 | */ | |
72 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) | |
73 | { | |
74 | return __sme_set(phys_to_dma_unencrypted(dev, paddr)); | |
75 | } | |
76 | ||
e0d07278 | 77 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr) |
ea8c64ac | 78 | { |
e0d07278 JQ |
79 | phys_addr_t paddr; |
80 | ||
81 | if (dev->dma_range_map) | |
82 | paddr = translate_dma_to_phys(dev, dma_addr); | |
83 | else | |
84 | paddr = dma_addr; | |
ea8c64ac | 85 | |
7bc5c428 | 86 | return __sme_clr(paddr); |
ea8c64ac | 87 | } |
130c1ccb | 88 | #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ |
ea8c64ac | 89 | |
9087c375 TL |
90 | #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED |
91 | bool force_dma_unencrypted(struct device *dev); | |
92 | #else | |
93 | static inline bool force_dma_unencrypted(struct device *dev) | |
94 | { | |
95 | return false; | |
96 | } | |
97 | #endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */ | |
98 | ||
68a33b17 CH |
99 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size, |
100 | bool is_ram) | |
c7345159 CH |
101 | { |
102 | dma_addr_t end = addr + size - 1; | |
103 | ||
e0d07278 JQ |
104 | if (addr == DMA_MAPPING_ERROR) |
105 | return false; | |
68a33b17 | 106 | if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && |
c7345159 CH |
107 | min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) |
108 | return false; | |
109 | ||
a7ba70f1 | 110 | return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit); |
c7345159 CH |
111 | } |
112 | ||
a20bb058 | 113 | u64 dma_direct_get_required_mask(struct device *dev); |
19dca8c0 CH |
114 | void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, |
115 | gfp_t gfp, unsigned long attrs); | |
116 | void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, | |
117 | dma_addr_t dma_addr, unsigned long attrs); | |
efa70f2f CH |
118 | struct page *dma_direct_alloc_pages(struct device *dev, size_t size, |
119 | dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); | |
120 | void dma_direct_free_pages(struct device *dev, size_t size, | |
121 | struct page *page, dma_addr_t dma_addr, | |
122 | enum dma_data_direction dir); | |
1a9777a8 | 123 | int dma_direct_supported(struct device *dev, u64 mask); |
d3fa60d7 CH |
124 | dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr, |
125 | size_t size, enum dma_data_direction dir, unsigned long attrs); | |
126 | ||
ea8c64ac | 127 | #endif /* _LINUX_DMA_DIRECT_H */ |