Commit | Line | Data |
---|---|---|
4f86d3a8 LB |
1 | /* |
2 | * cpuidle.h - a generic framework for CPU idle power management | |
3 | * | |
4 | * (C) 2007 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | |
5 | * Shaohua Li <shaohua.li@intel.com> | |
6 | * Adam Belay <abelay@novell.com> | |
7 | * | |
8 | * This code is licenced under the GPL. | |
9 | */ | |
10 | ||
11 | #ifndef _LINUX_CPUIDLE_H | |
12 | #define _LINUX_CPUIDLE_H | |
13 | ||
14 | #include <linux/percpu.h> | |
15 | #include <linux/list.h> | |
e1689795 | 16 | #include <linux/hrtimer.h> |
a01353cf | 17 | #include <linux/context_tracking.h> |
4f86d3a8 | 18 | |
86239ceb | 19 | #define CPUIDLE_STATE_MAX 10 |
4f86d3a8 | 20 | #define CPUIDLE_NAME_LEN 16 |
4fcb2fcd | 21 | #define CPUIDLE_DESC_LEN 32 |
4f86d3a8 | 22 | |
de477254 PG |
23 | struct module; |
24 | ||
4f86d3a8 | 25 | struct cpuidle_device; |
46bcfad7 | 26 | struct cpuidle_driver; |
4f86d3a8 LB |
27 | |
28 | ||
29 | /**************************** | |
30 | * CPUIDLE DEVICE INTERFACE * | |
31 | ****************************/ | |
32 | ||
99e98d3f RW |
33 | #define CPUIDLE_STATE_DISABLED_BY_USER BIT(0) |
34 | #define CPUIDLE_STATE_DISABLED_BY_DRIVER BIT(1) | |
35 | ||
4202735e | 36 | struct cpuidle_state_usage { |
dc7fd275 | 37 | unsigned long long disable; |
4202735e | 38 | unsigned long long usage; |
c1d51f68 | 39 | u64 time_ns; |
04dab58a RW |
40 | unsigned long long above; /* Number of times it's been too deep */ |
41 | unsigned long long below; /* Number of times it's been too shallow */ | |
f49735f4 | 42 | unsigned long long rejected; /* Number of times idle entry was rejected */ |
64bdff69 RW |
43 | #ifdef CONFIG_SUSPEND |
44 | unsigned long long s2idle_usage; | |
45 | unsigned long long s2idle_time; /* in US */ | |
46 | #endif | |
4202735e DD |
47 | }; |
48 | ||
4f86d3a8 LB |
49 | struct cpuidle_state { |
50 | char name[CPUIDLE_NAME_LEN]; | |
4fcb2fcd | 51 | char desc[CPUIDLE_DESC_LEN]; |
4f86d3a8 | 52 | |
2ab80d46 RW |
53 | s64 exit_latency_ns; |
54 | s64 target_residency_ns; | |
4f86d3a8 LB |
55 | unsigned int flags; |
56 | unsigned int exit_latency; /* in US */ | |
02401c06 | 57 | int power_usage; /* in mW */ |
4f86d3a8 LB |
58 | unsigned int target_residency; /* in US */ |
59 | ||
4f86d3a8 | 60 | int (*enter) (struct cpuidle_device *dev, |
46bcfad7 | 61 | struct cpuidle_driver *drv, |
e978aa7d | 62 | int index); |
1a022e3f BO |
63 | |
64 | int (*enter_dead) (struct cpuidle_device *dev, int index); | |
124cf911 RW |
65 | |
66 | /* | |
28ba086e | 67 | * CPUs execute ->enter_s2idle with the local tick or entire timekeeping |
124cf911 RW |
68 | * suspended, so it must not re-enable interrupts at any point (even |
69 | * temporarily) or attempt to change states of clock event devices. | |
efe97112 NL |
70 | * |
71 | * This callback may point to the same function as ->enter if all of | |
72 | * the above requirements are met by it. | |
124cf911 | 73 | */ |
efe97112 NL |
74 | int (*enter_s2idle)(struct cpuidle_device *dev, |
75 | struct cpuidle_driver *drv, | |
76 | int index); | |
4f86d3a8 LB |
77 | }; |
78 | ||
79 | /* Idle State Flags */ | |
bf9282dc PZ |
80 | #define CPUIDLE_FLAG_NONE (0x00) |
81 | #define CPUIDLE_FLAG_POLLING BIT(0) /* polling state */ | |
82 | #define CPUIDLE_FLAG_COUPLED BIT(1) /* state applies to multiple cpus */ | |
83 | #define CPUIDLE_FLAG_TIMER_STOP BIT(2) /* timer is stopped on this state */ | |
84 | #define CPUIDLE_FLAG_UNUSABLE BIT(3) /* avoid using this state */ | |
85 | #define CPUIDLE_FLAG_OFF BIT(4) /* disable this state by default */ | |
86 | #define CPUIDLE_FLAG_TLB_FLUSHED BIT(5) /* idle-state flushes TLBs */ | |
8747f202 | 87 | #define CPUIDLE_FLAG_RCU_IDLE BIT(6) /* idle-state takes care of RCU */ |
4f86d3a8 | 88 | |
728ce22b | 89 | struct cpuidle_device_kobj; |
1a706438 DL |
90 | struct cpuidle_state_kobj; |
91 | struct cpuidle_driver_kobj; | |
728ce22b | 92 | |
4f86d3a8 | 93 | struct cpuidle_device { |
dcb84f33 | 94 | unsigned int registered:1; |
b5556a67 | 95 | unsigned int enabled:1; |
5f26bdce | 96 | unsigned int poll_time_limit:1; |
4f86d3a8 | 97 | unsigned int cpu; |
6f9b83ac | 98 | ktime_t next_hrtimer; |
4f86d3a8 | 99 | |
7d4daeed | 100 | int last_state_idx; |
c1d51f68 | 101 | u64 last_residency_ns; |
259231a0 | 102 | u64 poll_limit_ns; |
c55b51a0 | 103 | u64 forced_idle_latency_limit_ns; |
4202735e | 104 | struct cpuidle_state_usage states_usage[CPUIDLE_STATE_MAX]; |
4f86d3a8 | 105 | struct cpuidle_state_kobj *kobjs[CPUIDLE_STATE_MAX]; |
bf4d1b5d | 106 | struct cpuidle_driver_kobj *kobj_driver; |
728ce22b | 107 | struct cpuidle_device_kobj *kobj_dev; |
4f86d3a8 | 108 | struct list_head device_list; |
4126c019 CC |
109 | |
110 | #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED | |
4126c019 CC |
111 | cpumask_t coupled_cpus; |
112 | struct cpuidle_coupled *coupled; | |
113 | #endif | |
4f86d3a8 LB |
114 | }; |
115 | ||
116 | DECLARE_PER_CPU(struct cpuidle_device *, cpuidle_devices); | |
f08dbf8a | 117 | DECLARE_PER_CPU(struct cpuidle_device, cpuidle_dev); |
4f86d3a8 | 118 | |
a01353cf PZ |
119 | static __always_inline void ct_cpuidle_enter(void) |
120 | { | |
121 | lockdep_assert_irqs_disabled(); | |
122 | /* | |
123 | * Idle is allowed to (temporary) enable IRQs. It | |
124 | * will return with IRQs disabled. | |
125 | * | |
126 | * Trace IRQs enable here, then switch off RCU, and have | |
127 | * arch_cpu_idle() use raw_local_irq_enable(). Note that | |
128 | * ct_idle_enter() relies on lockdep IRQ state, so switch that | |
129 | * last -- this is very similar to the entry code. | |
130 | */ | |
131 | trace_hardirqs_on_prepare(); | |
132 | lockdep_hardirqs_on_prepare(); | |
133 | instrumentation_end(); | |
134 | ct_idle_enter(); | |
135 | lockdep_hardirqs_on(_RET_IP_); | |
136 | } | |
137 | ||
138 | static __always_inline void ct_cpuidle_exit(void) | |
139 | { | |
140 | /* | |
141 | * Carefully undo the above. | |
142 | */ | |
143 | lockdep_hardirqs_off(_RET_IP_); | |
144 | ct_idle_exit(); | |
145 | instrumentation_begin(); | |
146 | } | |
147 | ||
4f86d3a8 LB |
148 | /**************************** |
149 | * CPUIDLE DRIVER INTERFACE * | |
150 | ****************************/ | |
151 | ||
152 | struct cpuidle_driver { | |
db70b044 | 153 | const char *name; |
4f86d3a8 | 154 | struct module *owner; |
46bcfad7 | 155 | |
a06df062 DL |
156 | /* used by the cpuidle framework to setup the broadcast timer */ |
157 | unsigned int bctimer:1; | |
8aef33a7 | 158 | /* states array must be ordered in decreasing power consumption */ |
46bcfad7 DD |
159 | struct cpuidle_state states[CPUIDLE_STATE_MAX]; |
160 | int state_count; | |
161 | int safe_state_index; | |
82467a5a DL |
162 | |
163 | /* the driver handles the cpus in cpumask */ | |
6587fca2 | 164 | struct cpumask *cpumask; |
cb5d8c45 JM |
165 | |
166 | /* preferred governor to switch at register time */ | |
167 | const char *governor; | |
4f86d3a8 LB |
168 | }; |
169 | ||
170 | #ifdef CONFIG_CPU_IDLE | |
d91ee586 | 171 | extern void disable_cpuidle(void); |
ef2b22ac RW |
172 | extern bool cpuidle_not_available(struct cpuidle_driver *drv, |
173 | struct cpuidle_device *dev); | |
907e30f1 | 174 | |
907e30f1 | 175 | extern int cpuidle_select(struct cpuidle_driver *drv, |
45f1ff59 RW |
176 | struct cpuidle_device *dev, |
177 | bool *stop_tick); | |
907e30f1 DL |
178 | extern int cpuidle_enter(struct cpuidle_driver *drv, |
179 | struct cpuidle_device *dev, int index); | |
180 | extern void cpuidle_reflect(struct cpuidle_device *dev, int index); | |
259231a0 MT |
181 | extern u64 cpuidle_poll_time(struct cpuidle_driver *drv, |
182 | struct cpuidle_device *dev); | |
907e30f1 | 183 | |
4f86d3a8 | 184 | extern int cpuidle_register_driver(struct cpuidle_driver *drv); |
6e797a07 | 185 | extern struct cpuidle_driver *cpuidle_get_driver(void); |
cbda56d5 RW |
186 | extern void cpuidle_driver_state_disabled(struct cpuidle_driver *drv, int idx, |
187 | bool disable); | |
4f86d3a8 LB |
188 | extern void cpuidle_unregister_driver(struct cpuidle_driver *drv); |
189 | extern int cpuidle_register_device(struct cpuidle_device *dev); | |
190 | extern void cpuidle_unregister_device(struct cpuidle_device *dev); | |
4c637b21 DL |
191 | extern int cpuidle_register(struct cpuidle_driver *drv, |
192 | const struct cpumask *const coupled_cpus); | |
193 | extern void cpuidle_unregister(struct cpuidle_driver *drv); | |
4f86d3a8 LB |
194 | extern void cpuidle_pause_and_lock(void); |
195 | extern void cpuidle_resume_and_unlock(void); | |
8651f97b PM |
196 | extern void cpuidle_pause(void); |
197 | extern void cpuidle_resume(void); | |
4f86d3a8 LB |
198 | extern int cpuidle_enable_device(struct cpuidle_device *dev); |
199 | extern void cpuidle_disable_device(struct cpuidle_device *dev); | |
1a022e3f BO |
200 | extern int cpuidle_play_dead(void); |
201 | ||
bf4d1b5d | 202 | extern struct cpuidle_driver *cpuidle_get_cpu_driver(struct cpuidle_device *dev); |
9bd616e3 CM |
203 | static inline struct cpuidle_device *cpuidle_get_device(void) |
204 | {return __this_cpu_read(cpuidle_devices); } | |
4f86d3a8 | 205 | #else |
d91ee586 | 206 | static inline void disable_cpuidle(void) { } |
ef2b22ac RW |
207 | static inline bool cpuidle_not_available(struct cpuidle_driver *drv, |
208 | struct cpuidle_device *dev) | |
209 | {return true; } | |
907e30f1 | 210 | static inline int cpuidle_select(struct cpuidle_driver *drv, |
45f1ff59 | 211 | struct cpuidle_device *dev, bool *stop_tick) |
907e30f1 DL |
212 | {return -ENODEV; } |
213 | static inline int cpuidle_enter(struct cpuidle_driver *drv, | |
214 | struct cpuidle_device *dev, int index) | |
215 | {return -ENODEV; } | |
216 | static inline void cpuidle_reflect(struct cpuidle_device *dev, int index) { } | |
7dcddef6 | 217 | static inline u64 cpuidle_poll_time(struct cpuidle_driver *drv, |
259231a0 MT |
218 | struct cpuidle_device *dev) |
219 | {return 0; } | |
4f86d3a8 | 220 | static inline int cpuidle_register_driver(struct cpuidle_driver *drv) |
6b2c676b | 221 | {return -ENODEV; } |
752138df | 222 | static inline struct cpuidle_driver *cpuidle_get_driver(void) {return NULL; } |
cbda56d5 RW |
223 | static inline void cpuidle_driver_state_disabled(struct cpuidle_driver *drv, |
224 | int idx, bool disable) { } | |
4f86d3a8 LB |
225 | static inline void cpuidle_unregister_driver(struct cpuidle_driver *drv) { } |
226 | static inline int cpuidle_register_device(struct cpuidle_device *dev) | |
6b2c676b | 227 | {return -ENODEV; } |
4f86d3a8 | 228 | static inline void cpuidle_unregister_device(struct cpuidle_device *dev) { } |
4c637b21 DL |
229 | static inline int cpuidle_register(struct cpuidle_driver *drv, |
230 | const struct cpumask *const coupled_cpus) | |
231 | {return -ENODEV; } | |
232 | static inline void cpuidle_unregister(struct cpuidle_driver *drv) { } | |
4f86d3a8 LB |
233 | static inline void cpuidle_pause_and_lock(void) { } |
234 | static inline void cpuidle_resume_and_unlock(void) { } | |
8651f97b PM |
235 | static inline void cpuidle_pause(void) { } |
236 | static inline void cpuidle_resume(void) { } | |
4f86d3a8 | 237 | static inline int cpuidle_enable_device(struct cpuidle_device *dev) |
6b2c676b | 238 | {return -ENODEV; } |
4f86d3a8 | 239 | static inline void cpuidle_disable_device(struct cpuidle_device *dev) { } |
1a022e3f | 240 | static inline int cpuidle_play_dead(void) {return -ENODEV; } |
87e9b9f1 RW |
241 | static inline struct cpuidle_driver *cpuidle_get_cpu_driver( |
242 | struct cpuidle_device *dev) {return NULL; } | |
9bd616e3 | 243 | static inline struct cpuidle_device *cpuidle_get_device(void) {return NULL; } |
87e9b9f1 RW |
244 | #endif |
245 | ||
bb8313b6 | 246 | #ifdef CONFIG_CPU_IDLE |
87e9b9f1 | 247 | extern int cpuidle_find_deepest_state(struct cpuidle_driver *drv, |
5aa9ba63 DL |
248 | struct cpuidle_device *dev, |
249 | u64 latency_limit_ns); | |
28ba086e | 250 | extern int cpuidle_enter_s2idle(struct cpuidle_driver *drv, |
87e9b9f1 | 251 | struct cpuidle_device *dev); |
c55b51a0 | 252 | extern void cpuidle_use_deepest_state(u64 latency_limit_ns); |
87e9b9f1 | 253 | #else |
ef2b22ac | 254 | static inline int cpuidle_find_deepest_state(struct cpuidle_driver *drv, |
5aa9ba63 DL |
255 | struct cpuidle_device *dev, |
256 | u64 latency_limit_ns) | |
ef2b22ac | 257 | {return -ENODEV; } |
28ba086e | 258 | static inline int cpuidle_enter_s2idle(struct cpuidle_driver *drv, |
ef2b22ac RW |
259 | struct cpuidle_device *dev) |
260 | {return -ENODEV; } | |
c55b51a0 | 261 | static inline void cpuidle_use_deepest_state(u64 latency_limit_ns) |
bb8313b6 JP |
262 | { |
263 | } | |
4f86d3a8 LB |
264 | #endif |
265 | ||
faad3849 RW |
266 | /* kernel/sched/idle.c */ |
267 | extern void sched_idle_set_state(struct cpuidle_state *idle_state); | |
827a5aef | 268 | extern void default_idle_call(void); |
faad3849 | 269 | |
20ff51a3 CC |
270 | #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED |
271 | void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a); | |
c7a9b09b AB |
272 | #else |
273 | static inline void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a) | |
274 | { | |
275 | } | |
20ff51a3 CC |
276 | #endif |
277 | ||
d7212cfb | 278 | #if defined(CONFIG_CPU_IDLE) && defined(CONFIG_ARCH_HAS_CPU_RELAX) |
1b39e3f8 | 279 | void cpuidle_poll_state_init(struct cpuidle_driver *drv); |
34c2f65b | 280 | #else |
1b39e3f8 | 281 | static inline void cpuidle_poll_state_init(struct cpuidle_driver *drv) {} |
34c2f65b RW |
282 | #endif |
283 | ||
4f86d3a8 LB |
284 | /****************************** |
285 | * CPUIDLE GOVERNOR INTERFACE * | |
286 | ******************************/ | |
287 | ||
288 | struct cpuidle_governor { | |
289 | char name[CPUIDLE_NAME_LEN]; | |
290 | struct list_head governor_list; | |
291 | unsigned int rating; | |
292 | ||
46bcfad7 DD |
293 | int (*enable) (struct cpuidle_driver *drv, |
294 | struct cpuidle_device *dev); | |
295 | void (*disable) (struct cpuidle_driver *drv, | |
296 | struct cpuidle_device *dev); | |
4f86d3a8 | 297 | |
46bcfad7 | 298 | int (*select) (struct cpuidle_driver *drv, |
45f1ff59 RW |
299 | struct cpuidle_device *dev, |
300 | bool *stop_tick); | |
e978aa7d | 301 | void (*reflect) (struct cpuidle_device *dev, int index); |
4f86d3a8 LB |
302 | }; |
303 | ||
4f86d3a8 | 304 | extern int cpuidle_register_governor(struct cpuidle_governor *gov); |
c1d51f68 | 305 | extern s64 cpuidle_governor_latency_req(unsigned int cpu); |
4f86d3a8 | 306 | |
9ffeb6d0 LP |
307 | #define __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, \ |
308 | idx, \ | |
309 | state, \ | |
19235e47 | 310 | is_retention, is_rcu) \ |
db50a74d PP |
311 | ({ \ |
312 | int __ret = 0; \ | |
313 | \ | |
314 | if (!idx) { \ | |
315 | cpu_do_idle(); \ | |
316 | return idx; \ | |
317 | } \ | |
318 | \ | |
319 | if (!is_retention) \ | |
320 | __ret = cpu_pm_enter(); \ | |
321 | if (!__ret) { \ | |
19235e47 PZ |
322 | if (!is_rcu) \ |
323 | ct_cpuidle_enter(); \ | |
9ffeb6d0 | 324 | __ret = low_level_idle_enter(state); \ |
19235e47 PZ |
325 | if (!is_rcu) \ |
326 | ct_cpuidle_exit(); \ | |
db50a74d PP |
327 | if (!is_retention) \ |
328 | cpu_pm_exit(); \ | |
329 | } \ | |
330 | \ | |
331 | __ret ? -1 : idx; \ | |
220276e0 SH |
332 | }) |
333 | ||
db50a74d | 334 | #define CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx) \ |
19235e47 | 335 | __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx, idx, 0, 0) |
db50a74d PP |
336 | |
337 | #define CPU_PM_CPU_IDLE_ENTER_RETENTION(low_level_idle_enter, idx) \ | |
19235e47 | 338 | __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx, idx, 1, 0) |
9ffeb6d0 LP |
339 | |
340 | #define CPU_PM_CPU_IDLE_ENTER_PARAM(low_level_idle_enter, idx, state) \ | |
19235e47 PZ |
341 | __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx, state, 0, 0) |
342 | ||
343 | #define CPU_PM_CPU_IDLE_ENTER_PARAM_RCU(low_level_idle_enter, idx, state) \ | |
344 | __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx, state, 0, 1) | |
9ffeb6d0 LP |
345 | |
346 | #define CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(low_level_idle_enter, idx, state) \ | |
19235e47 PZ |
347 | __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx, state, 1, 0) |
348 | ||
349 | #define CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM_RCU(low_level_idle_enter, idx, state) \ | |
350 | __CPU_PM_CPU_IDLE_ENTER(low_level_idle_enter, idx, state, 1, 1) | |
db50a74d | 351 | |
4f86d3a8 | 352 | #endif /* _LINUX_CPUIDLE_H */ |