Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* |
3 | * include/linux/cpu.h - generic cpu definition | |
4 | * | |
5 | * This is mainly for topological representation. We define the | |
6 | * basic 'struct cpu' here, which can be embedded in per-arch | |
7 | * definitions of processors. | |
8 | * | |
9 | * Basic handling of the devices is done in drivers/base/cpu.c | |
1da177e4 | 10 | * |
611a75e1 | 11 | * CPUs are exported via sysfs in the devices/system/cpu |
1da177e4 | 12 | * directory. |
1da177e4 LT |
13 | */ |
14 | #ifndef _LINUX_CPU_H_ | |
15 | #define _LINUX_CPU_H_ | |
16 | ||
1da177e4 LT |
17 | #include <linux/node.h> |
18 | #include <linux/compiler.h> | |
19 | #include <linux/cpumask.h> | |
cff7d378 | 20 | #include <linux/cpuhotplug.h> |
1da177e4 | 21 | |
313162d0 | 22 | struct device; |
d1cb9d1a | 23 | struct device_node; |
3d52943b | 24 | struct attribute_group; |
313162d0 | 25 | |
1da177e4 LT |
26 | struct cpu { |
27 | int node_id; /* The node which contains the CPU */ | |
72486f1f | 28 | int hotpluggable; /* creates sysfs control file if hotpluggable */ |
8a25a2fd | 29 | struct device dev; |
1da177e4 LT |
30 | }; |
31 | ||
cff7d378 | 32 | extern void boot_cpu_init(void); |
b5b1404d | 33 | extern void boot_cpu_hotplug_init(void); |
1777e463 IM |
34 | extern void cpu_init(void); |
35 | extern void trap_init(void); | |
cff7d378 | 36 | |
76b67ed9 | 37 | extern int register_cpu(struct cpu *cpu, int num); |
8a25a2fd | 38 | extern struct device *get_cpu_device(unsigned cpu); |
2987557f | 39 | extern bool cpu_is_hotpluggable(unsigned cpu); |
183912d3 | 40 | extern bool arch_match_cpu_phys_id(int cpu, u64 phys_id); |
d1cb9d1a DM |
41 | extern bool arch_find_n_match_cpu_physical_id(struct device_node *cpun, |
42 | int cpu, unsigned int *thread); | |
0344c6c5 | 43 | |
8a25a2fd KS |
44 | extern int cpu_add_dev_attr(struct device_attribute *attr); |
45 | extern void cpu_remove_dev_attr(struct device_attribute *attr); | |
0344c6c5 | 46 | |
8a25a2fd KS |
47 | extern int cpu_add_dev_attr_group(struct attribute_group *attrs); |
48 | extern void cpu_remove_dev_attr_group(struct attribute_group *attrs); | |
0344c6c5 | 49 | |
87590ce6 TG |
50 | extern ssize_t cpu_show_meltdown(struct device *dev, |
51 | struct device_attribute *attr, char *buf); | |
52 | extern ssize_t cpu_show_spectre_v1(struct device *dev, | |
53 | struct device_attribute *attr, char *buf); | |
54 | extern ssize_t cpu_show_spectre_v2(struct device *dev, | |
55 | struct device_attribute *attr, char *buf); | |
c456442c KRW |
56 | extern ssize_t cpu_show_spec_store_bypass(struct device *dev, |
57 | struct device_attribute *attr, char *buf); | |
17dbca11 AK |
58 | extern ssize_t cpu_show_l1tf(struct device *dev, |
59 | struct device_attribute *attr, char *buf); | |
8a4b06d3 TG |
60 | extern ssize_t cpu_show_mds(struct device *dev, |
61 | struct device_attribute *attr, char *buf); | |
6608b45a PG |
62 | extern ssize_t cpu_show_tsx_async_abort(struct device *dev, |
63 | struct device_attribute *attr, | |
64 | char *buf); | |
db4d30fb VT |
65 | extern ssize_t cpu_show_itlb_multihit(struct device *dev, |
66 | struct device_attribute *attr, char *buf); | |
2accfa69 | 67 | extern ssize_t cpu_show_srbds(struct device *dev, struct device_attribute *attr, char *buf); |
8d50cdf8 PG |
68 | extern ssize_t cpu_show_mmio_stale_data(struct device *dev, |
69 | struct device_attribute *attr, | |
70 | char *buf); | |
6b80b59b AC |
71 | extern ssize_t cpu_show_retbleed(struct device *dev, |
72 | struct device_attribute *attr, char *buf); | |
87590ce6 | 73 | |
8db14860 NI |
74 | extern __printf(4, 5) |
75 | struct device *cpu_device_create(struct device *parent, void *drvdata, | |
76 | const struct attribute_group **groups, | |
77 | const char *fmt, ...); | |
1da177e4 | 78 | #ifdef CONFIG_HOTPLUG_CPU |
76b67ed9 | 79 | extern void unregister_cpu(struct cpu *cpu); |
12633e80 NF |
80 | extern ssize_t arch_cpu_probe(const char *, size_t); |
81 | extern ssize_t arch_cpu_release(const char *, size_t); | |
1da177e4 | 82 | #endif |
1da177e4 | 83 | |
f4c09f87 TG |
84 | /* |
85 | * These states are not related to the core CPU hotplug mechanism. They are | |
86 | * used by various (sub)architectures to track internal state | |
80f1ff97 | 87 | */ |
f4c09f87 TG |
88 | #define CPU_ONLINE 0x0002 /* CPU is up */ |
89 | #define CPU_UP_PREPARE 0x0003 /* CPU coming up */ | |
90 | #define CPU_DEAD 0x0007 /* CPU dead */ | |
91 | #define CPU_DEAD_FROZEN 0x0008 /* CPU timed out on unplug */ | |
92 | #define CPU_POST_DEAD 0x0009 /* CPU successfully unplugged */ | |
93 | #define CPU_BROKEN 0x000B /* CPU did not die properly */ | |
80f1ff97 | 94 | |
1da177e4 | 95 | #ifdef CONFIG_SMP |
090e77c3 | 96 | extern bool cpuhp_tasks_frozen; |
93ef1429 | 97 | int add_cpu(unsigned int cpu); |
33c3736e | 98 | int cpu_device_up(struct device *dev); |
e545a614 | 99 | void notify_cpu_starting(unsigned int cpu); |
3da1c84c ON |
100 | extern void cpu_maps_update_begin(void); |
101 | extern void cpu_maps_update_done(void); | |
d720f986 | 102 | int bringup_hibernate_cpu(unsigned int sleep_cpu); |
b99a2659 | 103 | void bringup_nonboot_cpus(unsigned int setup_max_cpus); |
d0d23b54 | 104 | |
3da1c84c | 105 | #else /* CONFIG_SMP */ |
090e77c3 | 106 | #define cpuhp_tasks_frozen 0 |
1da177e4 | 107 | |
3da1c84c ON |
108 | static inline void cpu_maps_update_begin(void) |
109 | { | |
110 | } | |
111 | ||
112 | static inline void cpu_maps_update_done(void) | |
113 | { | |
114 | } | |
115 | ||
51f24030 SL |
116 | static inline int add_cpu(unsigned int cpu) { return 0;} |
117 | ||
1da177e4 | 118 | #endif /* CONFIG_SMP */ |
8a25a2fd | 119 | extern struct bus_type cpu_subsys; |
1da177e4 | 120 | |
43759fe5 FW |
121 | extern int lockdep_is_cpus_held(void); |
122 | ||
1da177e4 | 123 | #ifdef CONFIG_HOTPLUG_CPU |
8f553c49 TG |
124 | extern void cpus_write_lock(void); |
125 | extern void cpus_write_unlock(void); | |
126 | extern void cpus_read_lock(void); | |
127 | extern void cpus_read_unlock(void); | |
6f4ceee9 | 128 | extern int cpus_read_trylock(void); |
fc8dffd3 | 129 | extern void lockdep_assert_cpus_held(void); |
16e53dbf SB |
130 | extern void cpu_hotplug_disable(void); |
131 | extern void cpu_hotplug_enable(void); | |
cb79295e | 132 | void clear_tasks_mm_cpumask(int cpu); |
93ef1429 | 133 | int remove_cpu(unsigned int cpu); |
33c3736e | 134 | int cpu_device_down(struct device *dev); |
0441a559 | 135 | extern void smp_shutdown_nonboot_cpus(unsigned int primary_cpu); |
f7dff2b1 | 136 | |
8f553c49 TG |
137 | #else /* CONFIG_HOTPLUG_CPU */ |
138 | ||
139 | static inline void cpus_write_lock(void) { } | |
140 | static inline void cpus_write_unlock(void) { } | |
141 | static inline void cpus_read_lock(void) { } | |
142 | static inline void cpus_read_unlock(void) { } | |
6f4ceee9 | 143 | static inline int cpus_read_trylock(void) { return true; } |
ade3f680 | 144 | static inline void lockdep_assert_cpus_held(void) { } |
8f553c49 TG |
145 | static inline void cpu_hotplug_disable(void) { } |
146 | static inline void cpu_hotplug_enable(void) { } | |
51f24030 | 147 | static inline int remove_cpu(unsigned int cpu) { return -EPERM; } |
0441a559 | 148 | static inline void smp_shutdown_nonboot_cpus(unsigned int primary_cpu) { } |
8f553c49 TG |
149 | #endif /* !CONFIG_HOTPLUG_CPU */ |
150 | ||
f3de4be9 | 151 | #ifdef CONFIG_PM_SLEEP_SMP |
fb7fb84a | 152 | extern int freeze_secondary_cpus(int primary); |
56555855 | 153 | extern void thaw_secondary_cpus(void); |
2f1a6fbb NP |
154 | |
155 | static inline int suspend_disable_secondary_cpus(void) | |
156 | { | |
9ca12ac0 NP |
157 | int cpu = 0; |
158 | ||
159 | if (IS_ENABLED(CONFIG_PM_SLEEP_SMP_NONZERO_CPU)) | |
160 | cpu = -1; | |
161 | ||
162 | return freeze_secondary_cpus(cpu); | |
2f1a6fbb NP |
163 | } |
164 | static inline void suspend_enable_secondary_cpus(void) | |
165 | { | |
56555855 | 166 | return thaw_secondary_cpus(); |
2f1a6fbb NP |
167 | } |
168 | ||
f3de4be9 | 169 | #else /* !CONFIG_PM_SLEEP_SMP */ |
56555855 | 170 | static inline void thaw_secondary_cpus(void) {} |
2f1a6fbb NP |
171 | static inline int suspend_disable_secondary_cpus(void) { return 0; } |
172 | static inline void suspend_enable_secondary_cpus(void) { } | |
f3de4be9 | 173 | #endif /* !CONFIG_PM_SLEEP_SMP */ |
e3920fb4 | 174 | |
d4e5268a | 175 | void __noreturn cpu_startup_entry(enum cpuhp_state state); |
a1a04ec3 | 176 | |
d1669912 TG |
177 | void cpu_idle_poll_ctrl(bool enable); |
178 | ||
6727ad9e CM |
179 | bool cpu_in_idle(unsigned long pc); |
180 | ||
d1669912 TG |
181 | void arch_cpu_idle(void); |
182 | void arch_cpu_idle_prepare(void); | |
183 | void arch_cpu_idle_enter(void); | |
184 | void arch_cpu_idle_exit(void); | |
071c44e4 | 185 | void __noreturn arch_cpu_idle_dead(void); |
d1669912 | 186 | |
8038dad7 PM |
187 | int cpu_report_state(int cpu); |
188 | int cpu_check_up_prepare(int cpu); | |
189 | void cpu_set_state_online(int cpu); | |
c55b51a0 DL |
190 | void play_idle_precise(u64 duration_ns, u64 latency_ns); |
191 | ||
192 | static inline void play_idle(unsigned long duration_us) | |
193 | { | |
194 | play_idle_precise(duration_us * NSEC_PER_USEC, U64_MAX); | |
195 | } | |
c1de45ca | 196 | |
8038dad7 PM |
197 | #ifdef CONFIG_HOTPLUG_CPU |
198 | bool cpu_wait_death(unsigned int cpu, int seconds); | |
199 | bool cpu_report_death(void); | |
e69aab13 TG |
200 | void cpuhp_report_idle_dead(void); |
201 | #else | |
202 | static inline void cpuhp_report_idle_dead(void) { } | |
8038dad7 PM |
203 | #endif /* #ifdef CONFIG_HOTPLUG_CPU */ |
204 | ||
05736e4a TG |
205 | enum cpuhp_smt_control { |
206 | CPU_SMT_ENABLED, | |
207 | CPU_SMT_DISABLED, | |
208 | CPU_SMT_FORCE_DISABLED, | |
209 | CPU_SMT_NOT_SUPPORTED, | |
de7b77e5 | 210 | CPU_SMT_NOT_IMPLEMENTED, |
05736e4a TG |
211 | }; |
212 | ||
213 | #if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT) | |
214 | extern enum cpuhp_smt_control cpu_smt_control; | |
8e1b706b | 215 | extern void cpu_smt_disable(bool force); |
fee0aede | 216 | extern void cpu_smt_check_topology(void); |
e1572f1d | 217 | extern bool cpu_smt_possible(void); |
ec527c31 JK |
218 | extern int cpuhp_smt_enable(void); |
219 | extern int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval); | |
05736e4a | 220 | #else |
de7b77e5 | 221 | # define cpu_smt_control (CPU_SMT_NOT_IMPLEMENTED) |
8e1b706b | 222 | static inline void cpu_smt_disable(bool force) { } |
fee0aede | 223 | static inline void cpu_smt_check_topology(void) { } |
e1572f1d | 224 | static inline bool cpu_smt_possible(void) { return false; } |
ec527c31 JK |
225 | static inline int cpuhp_smt_enable(void) { return 0; } |
226 | static inline int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval) { return 0; } | |
05736e4a TG |
227 | #endif |
228 | ||
731dc9df TH |
229 | extern bool cpu_mitigations_off(void); |
230 | extern bool cpu_mitigations_auto_nosmt(void); | |
98af8452 | 231 | |
1da177e4 | 232 | #endif /* _LINUX_CPU_H_ */ |