mm: Don't pin ZERO_PAGE in pin_user_pages()
[linux-block.git] / include / linux / counter.h
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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Counter interface
4 * Copyright (C) 2018 William Breathitt Gray
5 */
6#ifndef _COUNTER_H_
7#define _COUNTER_H_
8
b6c50aff 9#include <linux/cdev.h>
0040a390 10#include <linux/device.h>
aaec1a0f 11#include <linux/kernel.h>
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12#include <linux/kfifo.h>
13#include <linux/mutex.h>
14#include <linux/spinlock_types.h>
0040a390 15#include <linux/types.h>
b6c50aff 16#include <linux/wait.h>
e65c26f4 17#include <uapi/linux/counter.h>
0040a390 18
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19struct counter_device;
20struct counter_count;
21struct counter_synapse;
22struct counter_signal;
23
24enum counter_comp_type {
25 COUNTER_COMP_U8,
26 COUNTER_COMP_U64,
27 COUNTER_COMP_BOOL,
28 COUNTER_COMP_SIGNAL_LEVEL,
29 COUNTER_COMP_FUNCTION,
30 COUNTER_COMP_SYNAPSE_ACTION,
31 COUNTER_COMP_ENUM,
32 COUNTER_COMP_COUNT_DIRECTION,
33 COUNTER_COMP_COUNT_MODE,
650ae67b 34 COUNTER_COMP_SIGNAL_POLARITY,
d2011be1 35 COUNTER_COMP_ARRAY,
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36};
37
0040a390 38/**
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39 * struct counter_comp - Counter component node
40 * @type: Counter component data type
41 * @name: device-specific component name
42 * @priv: component-relevant data
cca1fd41 43 * @action_read: Synapse action mode read callback. The read value of the
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44 * respective Synapse action mode should be passed back via
45 * the action parameter.
cca1fd41 46 * @device_u8_read: Device u8 component read callback. The read value of the
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47 * respective Device u8 component should be passed back via
48 * the val parameter.
cca1fd41 49 * @count_u8_read: Count u8 component read callback. The read value of the
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50 * respective Count u8 component should be passed back via
51 * the val parameter.
cca1fd41 52 * @signal_u8_read: Signal u8 component read callback. The read value of the
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53 * respective Signal u8 component should be passed back via
54 * the val parameter.
cca1fd41 55 * @device_u32_read: Device u32 component read callback. The read value of
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56 * the respective Device u32 component should be passed
57 * back via the val parameter.
cca1fd41 58 * @count_u32_read: Count u32 component read callback. The read value of the
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59 * respective Count u32 component should be passed back via
60 * the val parameter.
cca1fd41 61 * @signal_u32_read: Signal u32 component read callback. The read value of
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62 * the respective Signal u32 component should be passed
63 * back via the val parameter.
cca1fd41 64 * @device_u64_read: Device u64 component read callback. The read value of
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65 * the respective Device u64 component should be passed
66 * back via the val parameter.
cca1fd41 67 * @count_u64_read: Count u64 component read callback. The read value of the
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68 * respective Count u64 component should be passed back via
69 * the val parameter.
cca1fd41 70 * @signal_u64_read: Signal u64 component read callback. The read value of
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71 * the respective Signal u64 component should be passed
72 * back via the val parameter.
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73 * @signal_array_u32_read: Signal u32 array component read callback. The
74 * index of the respective Count u32 array
75 * component element is passed via the idx
76 * parameter. The read value of the respective
77 * Count u32 array component element should be
78 * passed back via the val parameter.
79 * @device_array_u64_read: Device u64 array component read callback. The
80 * index of the respective Device u64 array
81 * component element is passed via the idx
82 * parameter. The read value of the respective
83 * Device u64 array component element should be
84 * passed back via the val parameter.
85 * @count_array_u64_read: Count u64 array component read callback. The
86 * index of the respective Count u64 array
87 * component element is passed via the idx
88 * parameter. The read value of the respective
89 * Count u64 array component element should be
90 * passed back via the val parameter.
91 * @signal_array_u64_read: Signal u64 array component read callback. The
92 * index of the respective Count u64 array
93 * component element is passed via the idx
94 * parameter. The read value of the respective
95 * Count u64 array component element should be
96 * passed back via the val parameter.
cca1fd41 97 * @action_write: Synapse action mode write callback. The write value of
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98 * the respective Synapse action mode is passed via the
99 * action parameter.
cca1fd41 100 * @device_u8_write: Device u8 component write callback. The write value of
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101 * the respective Device u8 component is passed via the val
102 * parameter.
cca1fd41 103 * @count_u8_write: Count u8 component write callback. The write value of
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104 * the respective Count u8 component is passed via the val
105 * parameter.
cca1fd41 106 * @signal_u8_write: Signal u8 component write callback. The write value of
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107 * the respective Signal u8 component is passed via the val
108 * parameter.
cca1fd41 109 * @device_u32_write: Device u32 component write callback. The write value of
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110 * the respective Device u32 component is passed via the
111 * val parameter.
cca1fd41 112 * @count_u32_write: Count u32 component write callback. The write value of
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113 * the respective Count u32 component is passed via the val
114 * parameter.
cca1fd41 115 * @signal_u32_write: Signal u32 component write callback. The write value of
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116 * the respective Signal u32 component is passed via the
117 * val parameter.
cca1fd41 118 * @device_u64_write: Device u64 component write callback. The write value of
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119 * the respective Device u64 component is passed via the
120 * val parameter.
cca1fd41 121 * @count_u64_write: Count u64 component write callback. The write value of
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122 * the respective Count u64 component is passed via the val
123 * parameter.
cca1fd41 124 * @signal_u64_write: Signal u64 component write callback. The write value of
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125 * the respective Signal u64 component is passed via the
126 * val parameter.
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127 * @signal_array_u32_write: Signal u32 array component write callback. The
128 * index of the respective Signal u32 array
129 * component element is passed via the idx
130 * parameter. The write value of the respective
131 * Signal u32 array component element is passed via
132 * the val parameter.
133 * @device_array_u64_write: Device u64 array component write callback. The
134 * index of the respective Device u64 array
135 * component element is passed via the idx
136 * parameter. The write value of the respective
137 * Device u64 array component element is passed via
138 * the val parameter.
139 * @count_array_u64_write: Count u64 array component write callback. The
140 * index of the respective Count u64 array
141 * component element is passed via the idx
142 * parameter. The write value of the respective
143 * Count u64 array component element is passed via
144 * the val parameter.
145 * @signal_array_u64_write: Signal u64 array component write callback. The
146 * index of the respective Signal u64 array
147 * component element is passed via the idx
148 * parameter. The write value of the respective
149 * Signal u64 array component element is passed via
150 * the val parameter.
0040a390 151 */
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152struct counter_comp {
153 enum counter_comp_type type;
0040a390 154 const char *name;
0040a390 155 void *priv;
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156 union {
157 int (*action_read)(struct counter_device *counter,
158 struct counter_count *count,
159 struct counter_synapse *synapse,
160 enum counter_synapse_action *action);
161 int (*device_u8_read)(struct counter_device *counter, u8 *val);
162 int (*count_u8_read)(struct counter_device *counter,
163 struct counter_count *count, u8 *val);
164 int (*signal_u8_read)(struct counter_device *counter,
165 struct counter_signal *signal, u8 *val);
166 int (*device_u32_read)(struct counter_device *counter,
167 u32 *val);
168 int (*count_u32_read)(struct counter_device *counter,
169 struct counter_count *count, u32 *val);
170 int (*signal_u32_read)(struct counter_device *counter,
171 struct counter_signal *signal, u32 *val);
172 int (*device_u64_read)(struct counter_device *counter,
173 u64 *val);
174 int (*count_u64_read)(struct counter_device *counter,
175 struct counter_count *count, u64 *val);
176 int (*signal_u64_read)(struct counter_device *counter,
177 struct counter_signal *signal, u64 *val);
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178 int (*signal_array_u32_read)(struct counter_device *counter,
179 struct counter_signal *signal,
180 size_t idx, u32 *val);
181 int (*device_array_u64_read)(struct counter_device *counter,
182 size_t idx, u64 *val);
183 int (*count_array_u64_read)(struct counter_device *counter,
184 struct counter_count *count,
185 size_t idx, u64 *val);
186 int (*signal_array_u64_read)(struct counter_device *counter,
187 struct counter_signal *signal,
188 size_t idx, u64 *val);
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189 };
190 union {
191 int (*action_write)(struct counter_device *counter,
192 struct counter_count *count,
193 struct counter_synapse *synapse,
194 enum counter_synapse_action action);
195 int (*device_u8_write)(struct counter_device *counter, u8 val);
196 int (*count_u8_write)(struct counter_device *counter,
197 struct counter_count *count, u8 val);
198 int (*signal_u8_write)(struct counter_device *counter,
199 struct counter_signal *signal, u8 val);
200 int (*device_u32_write)(struct counter_device *counter,
201 u32 val);
202 int (*count_u32_write)(struct counter_device *counter,
203 struct counter_count *count, u32 val);
204 int (*signal_u32_write)(struct counter_device *counter,
205 struct counter_signal *signal, u32 val);
206 int (*device_u64_write)(struct counter_device *counter,
207 u64 val);
208 int (*count_u64_write)(struct counter_device *counter,
209 struct counter_count *count, u64 val);
210 int (*signal_u64_write)(struct counter_device *counter,
211 struct counter_signal *signal, u64 val);
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212 int (*signal_array_u32_write)(struct counter_device *counter,
213 struct counter_signal *signal,
214 size_t idx, u32 val);
215 int (*device_array_u64_write)(struct counter_device *counter,
216 size_t idx, u64 val);
217 int (*count_array_u64_write)(struct counter_device *counter,
218 struct counter_count *count,
219 size_t idx, u64 val);
220 int (*signal_array_u64_write)(struct counter_device *counter,
221 struct counter_signal *signal,
222 size_t idx, u64 val);
aaec1a0f 223 };
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224};
225
226/**
227 * struct counter_signal - Counter Signal node
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228 * @id: unique ID used to identify the Signal
229 * @name: device-specific Signal name
230 * @ext: optional array of Signal extensions
231 * @num_ext: number of Signal extensions specified in @ext
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232 */
233struct counter_signal {
234 int id;
235 const char *name;
236
aaec1a0f 237 struct counter_comp *ext;
0040a390 238 size_t num_ext;
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239};
240
241/**
242 * struct counter_synapse - Counter Synapse node
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243 * @actions_list: array of available action modes
244 * @num_actions: number of action modes specified in @actions_list
712392f5 245 * @signal: pointer to the associated Signal
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246 */
247struct counter_synapse {
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248 const enum counter_synapse_action *actions_list;
249 size_t num_actions;
250
251 struct counter_signal *signal;
252};
253
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254/**
255 * struct counter_count - Counter Count node
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256 * @id: unique ID used to identify the Count
257 * @name: device-specific Count name
258 * @functions_list: array of available function modes
0040a390 259 * @num_functions: number of function modes specified in @functions_list
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260 * @synapses: array of Synapses for initialization
261 * @num_synapses: number of Synapses specified in @synapses
262 * @ext: optional array of Count extensions
263 * @num_ext: number of Count extensions specified in @ext
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264 */
265struct counter_count {
266 int id;
267 const char *name;
268
394a0150 269 const enum counter_function *functions_list;
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270 size_t num_functions;
271
272 struct counter_synapse *synapses;
273 size_t num_synapses;
274
aaec1a0f 275 struct counter_comp *ext;
0040a390 276 size_t num_ext;
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277};
278
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279/**
280 * struct counter_event_node - Counter Event node
281 * @l: list of current watching Counter events
282 * @event: event that triggers
283 * @channel: event channel
284 * @comp_list: list of components to watch when event triggers
285 */
286struct counter_event_node {
287 struct list_head l;
288 u8 event;
289 u8 channel;
290 struct list_head comp_list;
291};
292
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293/**
294 * struct counter_ops - Callbacks from driver
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295 * @signal_read: optional read callback for Signals. The read level of
296 * the respective Signal should be passed back via the
297 * level parameter.
298 * @count_read: read callback for Counts. The read value of the
299 * respective Count should be passed back via the value
300 * parameter.
301 * @count_write: optional write callback for Counts. The write value for
302 * the respective Count is passed in via the value
d49e6ee2 303 * parameter.
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304 * @function_read: read callback the Count function modes. The read
305 * function mode of the respective Count should be passed
306 * back via the function parameter.
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307 * @function_write: optional write callback for Count function modes. The
308 * function mode to write for the respective Count is
309 * passed in via the function parameter.
310 * @action_read: optional read callback the Synapse action modes. The
311 * read action mode of the respective Synapse should be
312 * passed back via the action parameter.
313 * @action_write: optional write callback for Synapse action modes. The
314 * action mode to write for the respective Synapse is
315 * passed in via the action parameter.
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316 * @events_configure: optional write callback to configure events. The list of
317 * struct counter_event_node may be accessed via the
318 * events_list member of the counter parameter.
319 * @watch_validate: optional callback to validate a watch. The Counter
320 * component watch configuration is passed in via the watch
321 * parameter. A return value of 0 indicates a valid Counter
322 * component watch configuration.
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323 */
324struct counter_ops {
325 int (*signal_read)(struct counter_device *counter,
326 struct counter_signal *signal,
493b938a 327 enum counter_signal_level *level);
0040a390 328 int (*count_read)(struct counter_device *counter,
aaec1a0f 329 struct counter_count *count, u64 *value);
0040a390 330 int (*count_write)(struct counter_device *counter,
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331 struct counter_count *count, u64 value);
332 int (*function_read)(struct counter_device *counter,
333 struct counter_count *count,
334 enum counter_function *function);
335 int (*function_write)(struct counter_device *counter,
336 struct counter_count *count,
337 enum counter_function function);
338 int (*action_read)(struct counter_device *counter,
339 struct counter_count *count,
340 struct counter_synapse *synapse,
341 enum counter_synapse_action *action);
342 int (*action_write)(struct counter_device *counter,
343 struct counter_count *count,
344 struct counter_synapse *synapse,
345 enum counter_synapse_action action);
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346 int (*events_configure)(struct counter_device *counter);
347 int (*watch_validate)(struct counter_device *counter,
348 const struct counter_watch *watch);
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349};
350
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351/**
352 * struct counter_device - Counter data structure
712392f5 353 * @name: name of the device
0040a390 354 * @parent: optional parent device providing the counters
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355 * @ops: callbacks from driver
356 * @signals: array of Signals
357 * @num_signals: number of Signals specified in @signals
358 * @counts: array of Counts
359 * @num_counts: number of Counts specified in @counts
360 * @ext: optional array of Counter device extensions
361 * @num_ext: number of Counter device extensions specified in @ext
362 * @priv: optional private data supplied by driver
aaec1a0f 363 * @dev: internal device structure
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364 * @chrdev: internal character device structure
365 * @events_list: list of current watching Counter events
366 * @events_list_lock: lock to protect Counter events list operations
367 * @next_events_list: list of next watching Counter events
368 * @n_events_list_lock: lock to protect Counter next events list operations
369 * @events: queue of detected Counter events
370 * @events_wait: wait queue to allow blocking reads of Counter events
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371 * @events_in_lock: lock to protect Counter events queue in operations
372 * @events_out_lock: lock to protect Counter events queue out operations
b6c50aff 373 * @ops_exist_lock: lock to prevent use during removal
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374 */
375struct counter_device {
376 const char *name;
377 struct device *parent;
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378
379 const struct counter_ops *ops;
380
381 struct counter_signal *signals;
382 size_t num_signals;
383 struct counter_count *counts;
384 size_t num_counts;
385
aaec1a0f 386 struct counter_comp *ext;
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387 size_t num_ext;
388
aaec1a0f 389 struct device dev;
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390 struct cdev chrdev;
391 struct list_head events_list;
392 spinlock_t events_list_lock;
393 struct list_head next_events_list;
394 struct mutex n_events_list_lock;
395 DECLARE_KFIFO_PTR(events, struct counter_event);
396 wait_queue_head_t events_wait;
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397 spinlock_t events_in_lock;
398 struct mutex events_out_lock;
b6c50aff 399 struct mutex ops_exist_lock;
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400};
401
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402void *counter_priv(const struct counter_device *const counter);
403
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404struct counter_device *counter_alloc(size_t sizeof_priv);
405void counter_put(struct counter_device *const counter);
406int counter_add(struct counter_device *const counter);
407
0040a390 408void counter_unregister(struct counter_device *const counter);
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409struct counter_device *devm_counter_alloc(struct device *dev,
410 size_t sizeof_priv);
411int devm_counter_add(struct device *dev,
412 struct counter_device *const counter);
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413void counter_push_event(struct counter_device *const counter, const u8 event,
414 const u8 channel);
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415
416#define COUNTER_COMP_DEVICE_U8(_name, _read, _write) \
417{ \
418 .type = COUNTER_COMP_U8, \
419 .name = (_name), \
420 .device_u8_read = (_read), \
421 .device_u8_write = (_write), \
422}
423#define COUNTER_COMP_COUNT_U8(_name, _read, _write) \
424{ \
425 .type = COUNTER_COMP_U8, \
426 .name = (_name), \
427 .count_u8_read = (_read), \
428 .count_u8_write = (_write), \
429}
430#define COUNTER_COMP_SIGNAL_U8(_name, _read, _write) \
431{ \
432 .type = COUNTER_COMP_U8, \
433 .name = (_name), \
434 .signal_u8_read = (_read), \
435 .signal_u8_write = (_write), \
436}
437
438#define COUNTER_COMP_DEVICE_U64(_name, _read, _write) \
439{ \
440 .type = COUNTER_COMP_U64, \
441 .name = (_name), \
442 .device_u64_read = (_read), \
443 .device_u64_write = (_write), \
444}
445#define COUNTER_COMP_COUNT_U64(_name, _read, _write) \
446{ \
447 .type = COUNTER_COMP_U64, \
448 .name = (_name), \
449 .count_u64_read = (_read), \
450 .count_u64_write = (_write), \
451}
452#define COUNTER_COMP_SIGNAL_U64(_name, _read, _write) \
453{ \
454 .type = COUNTER_COMP_U64, \
455 .name = (_name), \
456 .signal_u64_read = (_read), \
457 .signal_u64_write = (_write), \
458}
459
460#define COUNTER_COMP_DEVICE_BOOL(_name, _read, _write) \
461{ \
462 .type = COUNTER_COMP_BOOL, \
463 .name = (_name), \
464 .device_u8_read = (_read), \
465 .device_u8_write = (_write), \
466}
467#define COUNTER_COMP_COUNT_BOOL(_name, _read, _write) \
468{ \
469 .type = COUNTER_COMP_BOOL, \
470 .name = (_name), \
471 .count_u8_read = (_read), \
472 .count_u8_write = (_write), \
473}
474#define COUNTER_COMP_SIGNAL_BOOL(_name, _read, _write) \
475{ \
476 .type = COUNTER_COMP_BOOL, \
477 .name = (_name), \
478 .signal_u8_read = (_read), \
479 .signal_u8_write = (_write), \
480}
481
482struct counter_available {
483 union {
484 const u32 *enums;
485 const char *const *strs;
486 };
487 size_t num_items;
488};
489
490#define DEFINE_COUNTER_AVAILABLE(_name, _enums) \
491 struct counter_available _name = { \
492 .enums = (_enums), \
493 .num_items = ARRAY_SIZE(_enums), \
494 }
495
496#define DEFINE_COUNTER_ENUM(_name, _strs) \
497 struct counter_available _name = { \
498 .strs = (_strs), \
499 .num_items = ARRAY_SIZE(_strs), \
500 }
501
502#define COUNTER_COMP_DEVICE_ENUM(_name, _get, _set, _available) \
503{ \
504 .type = COUNTER_COMP_ENUM, \
505 .name = (_name), \
506 .device_u32_read = (_get), \
507 .device_u32_write = (_set), \
508 .priv = &(_available), \
509}
510#define COUNTER_COMP_COUNT_ENUM(_name, _get, _set, _available) \
511{ \
512 .type = COUNTER_COMP_ENUM, \
513 .name = (_name), \
514 .count_u32_read = (_get), \
515 .count_u32_write = (_set), \
516 .priv = &(_available), \
517}
518#define COUNTER_COMP_SIGNAL_ENUM(_name, _get, _set, _available) \
519{ \
520 .type = COUNTER_COMP_ENUM, \
521 .name = (_name), \
522 .signal_u32_read = (_get), \
523 .signal_u32_write = (_set), \
524 .priv = &(_available), \
525}
526
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527struct counter_array {
528 enum counter_comp_type type;
529 const struct counter_available *avail;
530 union {
531 size_t length;
532 size_t idx;
533 };
534};
535
536#define DEFINE_COUNTER_ARRAY_U64(_name, _length) \
537 struct counter_array _name = { \
538 .type = COUNTER_COMP_U64, \
539 .length = (_length), \
540 }
541
542#define DEFINE_COUNTER_ARRAY_CAPTURE(_name, _length) \
543 DEFINE_COUNTER_ARRAY_U64(_name, _length)
544
472a1482 545#define DEFINE_COUNTER_ARRAY_POLARITY(_name, _available, _length) \
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546 struct counter_array _name = { \
547 .type = COUNTER_COMP_SIGNAL_POLARITY, \
472a1482 548 .avail = &(_available), \
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549 .length = (_length), \
550 }
551
552#define COUNTER_COMP_DEVICE_ARRAY_U64(_name, _read, _write, _array) \
553{ \
554 .type = COUNTER_COMP_ARRAY, \
555 .name = (_name), \
556 .device_array_u64_read = (_read), \
557 .device_array_u64_write = (_write), \
558 .priv = &(_array), \
559}
560#define COUNTER_COMP_COUNT_ARRAY_U64(_name, _read, _write, _array) \
561{ \
562 .type = COUNTER_COMP_ARRAY, \
563 .name = (_name), \
564 .count_array_u64_read = (_read), \
565 .count_array_u64_write = (_write), \
566 .priv = &(_array), \
567}
568#define COUNTER_COMP_SIGNAL_ARRAY_U64(_name, _read, _write, _array) \
569{ \
570 .type = COUNTER_COMP_ARRAY, \
571 .name = (_name), \
572 .signal_array_u64_read = (_read), \
573 .signal_array_u64_write = (_write), \
574 .priv = &(_array), \
575}
576
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577#define COUNTER_COMP_CAPTURE(_read, _write) \
578 COUNTER_COMP_COUNT_U64("capture", _read, _write)
579
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580#define COUNTER_COMP_CEILING(_read, _write) \
581 COUNTER_COMP_COUNT_U64("ceiling", _read, _write)
582
583#define COUNTER_COMP_COUNT_MODE(_read, _write, _available) \
584{ \
585 .type = COUNTER_COMP_COUNT_MODE, \
586 .name = "count_mode", \
587 .count_u32_read = (_read), \
588 .count_u32_write = (_write), \
589 .priv = &(_available), \
590}
591
592#define COUNTER_COMP_DIRECTION(_read) \
593{ \
594 .type = COUNTER_COMP_COUNT_DIRECTION, \
595 .name = "direction", \
596 .count_u32_read = (_read), \
597}
598
599#define COUNTER_COMP_ENABLE(_read, _write) \
600 COUNTER_COMP_COUNT_BOOL("enable", _read, _write)
601
602#define COUNTER_COMP_FLOOR(_read, _write) \
603 COUNTER_COMP_COUNT_U64("floor", _read, _write)
604
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605#define COUNTER_COMP_POLARITY(_read, _write, _available) \
606{ \
607 .type = COUNTER_COMP_SIGNAL_POLARITY, \
608 .name = "polarity", \
609 .signal_u32_read = (_read), \
610 .signal_u32_write = (_write), \
611 .priv = &(_available), \
612}
613
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614#define COUNTER_COMP_PRESET(_read, _write) \
615 COUNTER_COMP_COUNT_U64("preset", _read, _write)
616
617#define COUNTER_COMP_PRESET_ENABLE(_read, _write) \
618 COUNTER_COMP_COUNT_BOOL("preset_enable", _read, _write)
0040a390 619
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620#define COUNTER_COMP_ARRAY_CAPTURE(_read, _write, _array) \
621 COUNTER_COMP_COUNT_ARRAY_U64("capture", _read, _write, _array)
622
623#define COUNTER_COMP_ARRAY_POLARITY(_read, _write, _array) \
624{ \
625 .type = COUNTER_COMP_ARRAY, \
626 .name = "polarity", \
627 .signal_array_u32_read = (_read), \
628 .signal_array_u32_write = (_write), \
629 .priv = &(_array), \
630}
631
0040a390 632#endif /* _COUNTER_H_ */