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1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* Copyright (c) 2020 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de> | |
289ea9e4 | 3 | * Copyright (c) 2021 Vincent Mailhol <mailhol.vincent@wanadoo.fr> |
5a9d5ecd MKB |
4 | */ |
5 | ||
6 | #ifndef _CAN_BITTIMING_H | |
7 | #define _CAN_BITTIMING_H | |
8 | ||
9 | #include <linux/netdevice.h> | |
10 | #include <linux/can/netlink.h> | |
11 | ||
12 | #define CAN_SYNC_SEG 1 | |
13 | ||
1d775076 | 14 | |
63dfe070 VM |
15 | #define CAN_CTRLMODE_TDC_MASK \ |
16 | (CAN_CTRLMODE_TDC_AUTO | CAN_CTRLMODE_TDC_MANUAL) | |
17 | ||
289ea9e4 VM |
18 | /* |
19 | * struct can_tdc - CAN FD Transmission Delay Compensation parameters | |
20 | * | |
21 | * At high bit rates, the propagation delay from the TX pin to the RX | |
22 | * pin of the transceiver causes measurement errors: the sample point | |
23 | * on the RX pin might occur on the previous bit. | |
24 | * | |
25 | * To solve this issue, ISO 11898-1 introduces in section 11.3.3 | |
26 | * "Transmitter delay compensation" a SSP (Secondary Sample Point) | |
39f66c9e VM |
27 | * equal to the distance from the start of the bit time on the TX pin |
28 | * to the actual measurement on the RX pin. | |
289ea9e4 VM |
29 | * |
30 | * This structure contains the parameters to calculate that SSP. | |
31 | * | |
63dfe070 VM |
32 | * -+----------- one bit ----------+-- TX pin |
33 | * |<--- Sample Point --->| | |
34 | * | |
35 | * --+----------- one bit ----------+-- RX pin | |
36 | * |<-------- TDCV -------->| | |
37 | * |<------- TDCO ------->| | |
38 | * |<----------- Secondary Sample Point ---------->| | |
39 | * | |
39f66c9e VM |
40 | * To increase precision, contrary to the other bittiming parameters |
41 | * which are measured in time quanta, the TDC parameters are measured | |
42 | * in clock periods (also referred as "minimum time quantum" in ISO | |
43 | * 11898-1). | |
44 | * | |
63dfe070 | 45 | * @tdcv: Transmitter Delay Compensation Value. The time needed for |
39f66c9e | 46 | * the signal to propagate, i.e. the distance, in clock periods, |
63dfe070 VM |
47 | * from the start of the bit on the TX pin to when it is received |
48 | * on the RX pin. @tdcv depends on the controller modes: | |
49 | * | |
50 | * CAN_CTRLMODE_TDC_AUTO is set: The transceiver dynamically | |
51 | * measures @tdcv for each transmitted CAN FD frame and the | |
52 | * value provided here should be ignored. | |
289ea9e4 | 53 | * |
63dfe070 VM |
54 | * CAN_CTRLMODE_TDC_MANUAL is set: use the fixed provided @tdcv |
55 | * value. | |
289ea9e4 | 56 | * |
63dfe070 VM |
57 | * N.B. CAN_CTRLMODE_TDC_AUTO and CAN_CTRLMODE_TDC_MANUAL are |
58 | * mutually exclusive. Only one can be set at a time. If both | |
59 | * CAN_TDC_CTRLMODE_AUTO and CAN_TDC_CTRLMODE_MANUAL are unset, | |
60 | * TDC is disabled and all the values of this structure should be | |
61 | * ignored. | |
289ea9e4 | 62 | * |
39f66c9e VM |
63 | * @tdco: Transmitter Delay Compensation Offset. Offset value, in |
64 | * clock periods, defining the distance between the start of the | |
65 | * bit reception on the RX pin of the transceiver and the SSP | |
8345a330 | 66 | * position such that SSP = @tdcv + @tdco. |
289ea9e4 | 67 | * |
289ea9e4 | 68 | * @tdcf: Transmitter Delay Compensation Filter window. Defines the |
39f66c9e VM |
69 | * minimum value for the SSP position in clock periods. If the |
70 | * SSP position is less than @tdcf, then no delay compensations | |
71 | * occur and the normal sampling point is used instead. The | |
72 | * feature is enabled if and only if @tdcv is set to zero | |
73 | * (automatic mode) and @tdcf is configured to a value greater | |
74 | * than @tdco. | |
289ea9e4 VM |
75 | */ |
76 | struct can_tdc { | |
77 | u32 tdcv; | |
78 | u32 tdco; | |
79 | u32 tdcf; | |
80 | }; | |
81 | ||
82 | /* | |
83 | * struct can_tdc_const - CAN hardware-dependent constant for | |
84 | * Transmission Delay Compensation | |
85 | * | |
63dfe070 VM |
86 | * @tdcv_min: Transmitter Delay Compensation Value minimum value. If |
87 | * the controller does not support manual mode for tdcv | |
88 | * (c.f. flag CAN_CTRLMODE_TDC_MANUAL) then this value is | |
89 | * ignored. | |
90 | * @tdcv_max: Transmitter Delay Compensation Value maximum value. If | |
91 | * the controller does not support manual mode for tdcv | |
92 | * (c.f. flag CAN_CTRLMODE_TDC_MANUAL) then this value is | |
93 | * ignored. | |
94 | * | |
95 | * @tdco_min: Transmitter Delay Compensation Offset minimum value. | |
289ea9e4 VM |
96 | * @tdco_max: Transmitter Delay Compensation Offset maximum value. |
97 | * Should not be zero. If the controller does not support TDC, | |
98 | * then the pointer to this structure should be NULL. | |
63dfe070 VM |
99 | * |
100 | * @tdcf_min: Transmitter Delay Compensation Filter window minimum | |
101 | * value. If @tdcf_max is zero, this value is ignored. | |
289ea9e4 VM |
102 | * @tdcf_max: Transmitter Delay Compensation Filter window maximum |
103 | * value. Should be set to zero if the controller does not | |
104 | * support this feature. | |
105 | */ | |
106 | struct can_tdc_const { | |
63dfe070 | 107 | u32 tdcv_min; |
289ea9e4 | 108 | u32 tdcv_max; |
63dfe070 | 109 | u32 tdco_min; |
289ea9e4 | 110 | u32 tdco_max; |
63dfe070 | 111 | u32 tdcf_min; |
289ea9e4 VM |
112 | u32 tdcf_max; |
113 | }; | |
114 | ||
5a9d5ecd | 115 | #ifdef CONFIG_CAN_CALC_BITTIMING |
5597f082 | 116 | int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt, |
5a9d5ecd | 117 | const struct can_bittiming_const *btc); |
c25cc799 | 118 | |
da45a1e4 VM |
119 | void can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const, |
120 | const struct can_bittiming *dbt, | |
121 | u32 *ctrlmode, u32 ctrlmode_supported); | |
5a9d5ecd MKB |
122 | #else /* !CONFIG_CAN_CALC_BITTIMING */ |
123 | static inline int | |
5597f082 | 124 | can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt, |
5a9d5ecd MKB |
125 | const struct can_bittiming_const *btc) |
126 | { | |
127 | netdev_err(dev, "bit-timing calculation not available\n"); | |
128 | return -EINVAL; | |
129 | } | |
c25cc799 | 130 | |
da45a1e4 VM |
131 | static inline void |
132 | can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const, | |
133 | const struct can_bittiming *dbt, | |
134 | u32 *ctrlmode, u32 ctrlmode_supported) | |
c25cc799 VM |
135 | { |
136 | } | |
5a9d5ecd MKB |
137 | #endif /* CONFIG_CAN_CALC_BITTIMING */ |
138 | ||
5597f082 | 139 | int can_get_bittiming(const struct net_device *dev, struct can_bittiming *bt, |
5a9d5ecd MKB |
140 | const struct can_bittiming_const *btc, |
141 | const u32 *bitrate_const, | |
142 | const unsigned int bitrate_const_cnt); | |
143 | ||
144 | /* | |
145 | * can_bit_time() - Duration of one bit | |
146 | * | |
147 | * Please refer to ISO 11898-1:2015, section 11.3.1.1 "Bit time" for | |
148 | * additional information. | |
149 | * | |
150 | * Return: the number of time quanta in one bit. | |
151 | */ | |
152 | static inline unsigned int can_bit_time(const struct can_bittiming *bt) | |
153 | { | |
154 | return CAN_SYNC_SEG + bt->prop_seg + bt->phase_seg1 + bt->phase_seg2; | |
155 | } | |
156 | ||
157 | #endif /* !_CAN_BITTIMING_H */ |