bcma: init serial console directly from ChipCommon code
[linux-2.6-block.git] / include / linux / bcma / bcma.h
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1#ifndef LINUX_BCMA_H_
2#define LINUX_BCMA_H_
3
4#include <linux/pci.h>
5#include <linux/mod_devicetable.h>
6
7#include <linux/bcma/bcma_driver_chipcommon.h>
8#include <linux/bcma/bcma_driver_pci.h>
f473832f 9#include <linux/bcma/bcma_driver_pcie2.h>
21e0534a 10#include <linux/bcma/bcma_driver_mips.h>
e1ac4b40 11#include <linux/bcma/bcma_driver_gmac_cmn.h>
27f18dc2 12#include <linux/ssb/ssb.h> /* SPROM sharing */
8369ae33 13
a1ce3928 14#include <linux/bcma/bcma_regs.h>
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15
16struct bcma_device;
17struct bcma_bus;
18
19enum bcma_hosttype {
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20 BCMA_HOSTTYPE_PCI,
21 BCMA_HOSTTYPE_SDIO,
ecd177c2 22 BCMA_HOSTTYPE_SOC,
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23};
24
25struct bcma_chipinfo {
26 u16 id;
27 u8 rev;
28 u8 pkg;
29};
30
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31struct bcma_boardinfo {
32 u16 vendor;
33 u16 type;
34};
35
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36enum bcma_clkmode {
37 BCMA_CLKMODE_FAST,
38 BCMA_CLKMODE_DYNAMIC,
39};
40
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41struct bcma_host_ops {
42 u8 (*read8)(struct bcma_device *core, u16 offset);
43 u16 (*read16)(struct bcma_device *core, u16 offset);
44 u32 (*read32)(struct bcma_device *core, u16 offset);
45 void (*write8)(struct bcma_device *core, u16 offset, u8 value);
46 void (*write16)(struct bcma_device *core, u16 offset, u16 value);
47 void (*write32)(struct bcma_device *core, u16 offset, u32 value);
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48#ifdef CONFIG_BCMA_BLOCKIO
49 void (*block_read)(struct bcma_device *core, void *buffer,
50 size_t count, u16 offset, u8 reg_width);
51 void (*block_write)(struct bcma_device *core, const void *buffer,
52 size_t count, u16 offset, u8 reg_width);
53#endif
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54 /* Agent ops */
55 u32 (*aread32)(struct bcma_device *core, u16 offset);
56 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
57};
58
59/* Core manufacturers */
60#define BCMA_MANUF_ARM 0x43B
61#define BCMA_MANUF_MIPS 0x4A7
62#define BCMA_MANUF_BCM 0x4BF
63
64/* Core class values. */
65#define BCMA_CL_SIM 0x0
66#define BCMA_CL_EROM 0x1
67#define BCMA_CL_CORESIGHT 0x9
68#define BCMA_CL_VERIF 0xB
69#define BCMA_CL_OPTIMO 0xD
70#define BCMA_CL_GEN 0xE
71#define BCMA_CL_PRIMECELL 0xF
72
73/* Core-ID values. */
74#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
d2bb2b9e 75#define BCMA_CORE_4706_CHIPCOMMON 0x500
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76#define BCMA_CORE_NS_PCIEG2 0x501
77#define BCMA_CORE_NS_DMA 0x502
78#define BCMA_CORE_NS_SDIO3 0x503
79#define BCMA_CORE_NS_USB20 0x504
80#define BCMA_CORE_NS_USB30 0x505
81#define BCMA_CORE_NS_A9JTAG 0x506
82#define BCMA_CORE_NS_DDR23 0x507
83#define BCMA_CORE_NS_ROM 0x508
84#define BCMA_CORE_NS_NAND 0x509
85#define BCMA_CORE_NS_QSPI 0x50A
86#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
d2bb2b9e 87#define BCMA_CORE_4706_SOC_RAM 0x50E
bb4997a1 88#define BCMA_CORE_ARMCA9 0x510
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89#define BCMA_CORE_4706_MAC_GBIT 0x52D
90#define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */
91#define BCMA_CORE_ALTA 0x534 /* I2S core */
92#define BCMA_CORE_4706_MAC_GBIT_COMMON 0x5DC
93#define BCMA_CORE_DDR23_PHY 0x5DD
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94#define BCMA_CORE_INVALID 0x700
95#define BCMA_CORE_CHIPCOMMON 0x800
96#define BCMA_CORE_ILINE20 0x801
97#define BCMA_CORE_SRAM 0x802
98#define BCMA_CORE_SDRAM 0x803
99#define BCMA_CORE_PCI 0x804
100#define BCMA_CORE_MIPS 0x805
101#define BCMA_CORE_ETHERNET 0x806
102#define BCMA_CORE_V90 0x807
103#define BCMA_CORE_USB11_HOSTDEV 0x808
104#define BCMA_CORE_ADSL 0x809
105#define BCMA_CORE_ILINE100 0x80A
106#define BCMA_CORE_IPSEC 0x80B
107#define BCMA_CORE_UTOPIA 0x80C
108#define BCMA_CORE_PCMCIA 0x80D
109#define BCMA_CORE_INTERNAL_MEM 0x80E
110#define BCMA_CORE_MEMC_SDRAM 0x80F
111#define BCMA_CORE_OFDM 0x810
112#define BCMA_CORE_EXTIF 0x811
113#define BCMA_CORE_80211 0x812
114#define BCMA_CORE_PHY_A 0x813
115#define BCMA_CORE_PHY_B 0x814
116#define BCMA_CORE_PHY_G 0x815
117#define BCMA_CORE_MIPS_3302 0x816
118#define BCMA_CORE_USB11_HOST 0x817
119#define BCMA_CORE_USB11_DEV 0x818
120#define BCMA_CORE_USB20_HOST 0x819
121#define BCMA_CORE_USB20_DEV 0x81A
122#define BCMA_CORE_SDIO_HOST 0x81B
123#define BCMA_CORE_ROBOSWITCH 0x81C
124#define BCMA_CORE_PARA_ATA 0x81D
125#define BCMA_CORE_SATA_XORDMA 0x81E
126#define BCMA_CORE_ETHERNET_GBIT 0x81F
127#define BCMA_CORE_PCIE 0x820
128#define BCMA_CORE_PHY_N 0x821
129#define BCMA_CORE_SRAM_CTL 0x822
130#define BCMA_CORE_MINI_MACPHY 0x823
131#define BCMA_CORE_ARM_1176 0x824
132#define BCMA_CORE_ARM_7TDMI 0x825
133#define BCMA_CORE_PHY_LP 0x826
134#define BCMA_CORE_PMU 0x827
135#define BCMA_CORE_PHY_SSN 0x828
136#define BCMA_CORE_SDIO_DEV 0x829
137#define BCMA_CORE_ARM_CM3 0x82A
138#define BCMA_CORE_PHY_HT 0x82B
139#define BCMA_CORE_MIPS_74K 0x82C
140#define BCMA_CORE_MAC_GBIT 0x82D
141#define BCMA_CORE_DDR12_MEM_CTL 0x82E
142#define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
143#define BCMA_CORE_OCP_OCP_BRIDGE 0x830
144#define BCMA_CORE_SHARED_COMMON 0x831
145#define BCMA_CORE_OCP_AHB_BRIDGE 0x832
146#define BCMA_CORE_SPI_HOST 0x833
147#define BCMA_CORE_I2S 0x834
148#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
149#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
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150#define BCMA_CORE_PHY_AC 0x83B
151#define BCMA_CORE_PCIE2 0x83C /* PCI Express Gen2 */
152#define BCMA_CORE_USB30_DEV 0x83D
153#define BCMA_CORE_ARM_CR4 0x83E
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154#define BCMA_CORE_GCI 0x840
155#define BCMA_CORE_CMEM 0x846 /* CNDS DDR2/3 memory controller */
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156#define BCMA_CORE_ARM_CA7 0x847
157#define BCMA_CORE_SYS_MEM 0x849
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158#define BCMA_CORE_DEFAULT 0xFFF
159
160#define BCMA_MAX_NR_CORES 16
161
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162/* Chip IDs of PCIe devices */
163#define BCMA_CHIP_ID_BCM4313 0x4313
88f9b65d 164#define BCMA_CHIP_ID_BCM43142 43142
a67d19d4 165#define BCMA_CHIP_ID_BCM43131 43131
d1d3799f 166#define BCMA_CHIP_ID_BCM43217 43217
c2cb2c4c 167#define BCMA_CHIP_ID_BCM43222 43222
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168#define BCMA_CHIP_ID_BCM43224 43224
169#define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8
170#define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa
171#define BCMA_CHIP_ID_BCM43225 43225
172#define BCMA_CHIP_ID_BCM43227 43227
173#define BCMA_CHIP_ID_BCM43228 43228
174#define BCMA_CHIP_ID_BCM43421 43421
175#define BCMA_CHIP_ID_BCM43428 43428
176#define BCMA_CHIP_ID_BCM43431 43431
177#define BCMA_CHIP_ID_BCM43460 43460
178#define BCMA_CHIP_ID_BCM4331 0x4331
179#define BCMA_CHIP_ID_BCM6362 0x6362
180#define BCMA_CHIP_ID_BCM4360 0x4360
181#define BCMA_CHIP_ID_BCM4352 0x4352
182
183/* Chip IDs of SoCs */
184#define BCMA_CHIP_ID_BCM4706 0x5300
0751f865 185#define BCMA_PKG_ID_BCM4706L 1
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186#define BCMA_CHIP_ID_BCM4716 0x4716
187#define BCMA_PKG_ID_BCM4716 8
188#define BCMA_PKG_ID_BCM4717 9
189#define BCMA_PKG_ID_BCM4718 10
190#define BCMA_CHIP_ID_BCM47162 47162
191#define BCMA_CHIP_ID_BCM4748 0x4748
192#define BCMA_CHIP_ID_BCM4749 0x4749
193#define BCMA_CHIP_ID_BCM5356 0x5356
194#define BCMA_CHIP_ID_BCM5357 0x5357
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195#define BCMA_PKG_ID_BCM5358 9
196#define BCMA_PKG_ID_BCM47186 10
197#define BCMA_PKG_ID_BCM5357 11
4b4f5be2 198#define BCMA_CHIP_ID_BCM53572 53572
0751f865 199#define BCMA_PKG_ID_BCM47188 9
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200#define BCMA_CHIP_ID_BCM4707 53010
201#define BCMA_PKG_ID_BCM4707 1
202#define BCMA_PKG_ID_BCM4708 2
203#define BCMA_PKG_ID_BCM4709 0
204#define BCMA_CHIP_ID_BCM53018 53018
4b4f5be2 205
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206/* Board types (on PCI usually equals to the subsystem dev id) */
207/* BCM4313 */
208#define BCMA_BOARD_TYPE_BCM94313BU 0X050F
209#define BCMA_BOARD_TYPE_BCM94313HM 0X0510
210#define BCMA_BOARD_TYPE_BCM94313EPA 0X0511
211#define BCMA_BOARD_TYPE_BCM94313HMG 0X051C
212/* BCM4716 */
213#define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD
214/* BCM43224 */
215#define BCMA_BOARD_TYPE_BCM943224X21 0X056E
216#define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1
217#define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9
218#define BCMA_BOARD_TYPE_BCM943224M93 0X008B
219#define BCMA_BOARD_TYPE_BCM943224M93A 0X0090
220#define BCMA_BOARD_TYPE_BCM943224X16 0X0093
221#define BCMA_BOARD_TYPE_BCM94322X9 0X008D
222#define BCMA_BOARD_TYPE_BCM94322M35E 0X008E
223/* BCM43228 */
224#define BCMA_BOARD_TYPE_BCM943228BU8 0X0540
225#define BCMA_BOARD_TYPE_BCM943228BU9 0X0541
226#define BCMA_BOARD_TYPE_BCM943228BU 0X0542
227#define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543
228#define BCMA_BOARD_TYPE_BCM943227HMB 0X0544
229#define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545
230#define BCMA_BOARD_TYPE_BCM943228SD 0X0573
231/* BCM4331 */
232#define BCMA_BOARD_TYPE_BCM94331X19 0X00D6
233#define BCMA_BOARD_TYPE_BCM94331X28 0X00E4
234#define BCMA_BOARD_TYPE_BCM94331X28B 0X010E
235#define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4
236#define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC
237#define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED
238#define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF
239#define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF
240#define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5
241#define BCMA_BOARD_TYPE_BCM94331X33 0X00F4
242#define BCMA_BOARD_TYPE_BCM94331BU 0X0523
243#define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524
244#define BCMA_BOARD_TYPE_BCM94331MC 0X0525
245#define BCMA_BOARD_TYPE_BCM94331MCI 0X0526
246#define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527
247#define BCMA_BOARD_TYPE_BCM94331HM 0X0574
248#define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B
249#define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9
250#define BCMA_BOARD_TYPE_BCM94331CS 0X05C6
251#define BCMA_BOARD_TYPE_BCM94331CD 0X05DA
252/* BCM53572 */
253#define BCMA_BOARD_TYPE_BCM953572BU 0X058D
254#define BCMA_BOARD_TYPE_BCM953572NR2 0X058E
255#define BCMA_BOARD_TYPE_BCM947188NR2 0X058F
256#define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590
257/* BCM43142 */
258#define BCMA_BOARD_TYPE_BCM943142HM 0X05E0
259
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260struct bcma_device {
261 struct bcma_bus *bus;
262 struct bcma_device_id id;
263
264 struct device dev;
1bdcd095 265 struct device *dma_dev;
21e0534a 266
1bdcd095 267 unsigned int irq;
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268 bool dev_registered;
269
270 u8 core_index;
5f2d6171 271 u8 core_unit;
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272
273 u32 addr;
23a2f39c 274 u32 addr_s[8];
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275 u32 wrap;
276
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277 void __iomem *io_addr;
278 void __iomem *io_wrap;
279
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280 void *drvdata;
281 struct list_head list;
282};
283
284static inline void *bcma_get_drvdata(struct bcma_device *core)
285{
286 return core->drvdata;
287}
288static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
289{
290 core->drvdata = drvdata;
291}
292
293struct bcma_driver {
294 const char *name;
295 const struct bcma_device_id *id_table;
296
297 int (*probe)(struct bcma_device *dev);
298 void (*remove)(struct bcma_device *dev);
7d5869e7 299 int (*suspend)(struct bcma_device *dev);
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300 int (*resume)(struct bcma_device *dev);
301 void (*shutdown)(struct bcma_device *dev);
302
303 struct device_driver drv;
304};
305extern
306int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
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307#define bcma_driver_register(drv) \
308 __bcma_driver_register(drv, THIS_MODULE)
309
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310extern void bcma_driver_unregister(struct bcma_driver *drv);
311
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312/* module_bcma_driver() - Helper macro for drivers that don't do
313 * anything special in module init/exit. This eliminates a lot of
314 * boilerplate. Each module may only use this macro once, and
315 * calling it replaces module_init() and module_exit()
316 */
317#define module_bcma_driver(__bcma_driver) \
318 module_driver(__bcma_driver, bcma_driver_register, \
319 bcma_driver_unregister)
320
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321/* Set a fallback SPROM.
322 * See kdoc at the function definition for complete documentation. */
323extern int bcma_arch_register_fallback_sprom(
324 int (*sprom_callback)(struct bcma_bus *bus,
325 struct ssb_sprom *out));
326
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327struct bcma_bus {
328 /* The MMIO area. */
329 void __iomem *mmio;
330
331 const struct bcma_host_ops *ops;
332
333 enum bcma_hosttype hosttype;
8be08a39 334 bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */
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335 union {
336 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
337 struct pci_dev *host_pci;
338 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
339 struct sdio_func *host_sdio;
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340 /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */
341 struct platform_device *host_pdev;
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342 };
343
344 struct bcma_chipinfo chipinfo;
345
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346 struct bcma_boardinfo boardinfo;
347
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348 struct bcma_device *mapped_core;
349 struct list_head cores;
350 u8 nr_cores;
8f9ada4f 351 u8 num;
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352
353 struct bcma_drv_cc drv_cc;
1716bcf3 354 struct bcma_drv_cc_b drv_cc_b;
dfae7143 355 struct bcma_drv_pci drv_pci[2];
f473832f 356 struct bcma_drv_pcie2 drv_pcie2;
21e0534a 357 struct bcma_drv_mips drv_mips;
e1ac4b40 358 struct bcma_drv_gmac_cmn drv_gmac_cmn;
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359
360 /* We decided to share SPROM struct with SSB as long as we do not need
361 * any hacks for BCMA. This simplifies drivers code. */
362 struct ssb_sprom sprom;
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363};
364
08445552 365static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
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366{
367 return core->bus->ops->read8(core, offset);
368}
08445552 369static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
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370{
371 return core->bus->ops->read16(core, offset);
372}
08445552 373static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
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374{
375 return core->bus->ops->read32(core, offset);
376}
08445552 377static inline
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378void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
379{
380 core->bus->ops->write8(core, offset, value);
381}
08445552 382static inline
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383void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
384{
385 core->bus->ops->write16(core, offset, value);
386}
08445552 387static inline
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388void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
389{
390 core->bus->ops->write32(core, offset, value);
391}
9d75ef0f 392#ifdef CONFIG_BCMA_BLOCKIO
08445552 393static inline void bcma_block_read(struct bcma_device *core, void *buffer,
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394 size_t count, u16 offset, u8 reg_width)
395{
396 core->bus->ops->block_read(core, buffer, count, offset, reg_width);
397}
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398static inline void bcma_block_write(struct bcma_device *core,
399 const void *buffer, size_t count,
400 u16 offset, u8 reg_width)
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401{
402 core->bus->ops->block_write(core, buffer, count, offset, reg_width);
403}
404#endif
08445552 405static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
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406{
407 return core->bus->ops->aread32(core, offset);
408}
08445552 409static inline
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410void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
411{
412 core->bus->ops->awrite32(core, offset, value);
413}
414
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415static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
416{
417 bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
418}
419static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
420{
421 bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
422}
423static inline void bcma_maskset32(struct bcma_device *cc,
424 u16 offset, u32 mask, u32 set)
425{
426 bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
427}
428static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
429{
430 bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
431}
432static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
433{
434 bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
435}
436static inline void bcma_maskset16(struct bcma_device *cc,
437 u16 offset, u16 mask, u16 set)
438{
439 bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
440}
3de1a774 441
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442extern struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
443 u8 unit);
444static inline struct bcma_device *bcma_find_core(struct bcma_bus *bus,
445 u16 coreid)
446{
447 return bcma_find_core_unit(bus, coreid, 0);
448}
449
c32ec2a1 450#ifdef CONFIG_BCMA_HOST_PCI
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451extern void bcma_host_pci_up(struct bcma_bus *bus);
452extern void bcma_host_pci_down(struct bcma_bus *bus);
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453extern int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
454 struct bcma_device *core, bool enable);
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455#else
456static inline void bcma_host_pci_up(struct bcma_bus *bus)
457{
458}
459static inline void bcma_host_pci_down(struct bcma_bus *bus)
460{
461}
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462static inline int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
463 struct bcma_device *core, bool enable)
464{
465 if (bus->hosttype == BCMA_HOSTTYPE_PCI)
466 return -ENOTSUPP;
467 return 0;
468}
c32ec2a1 469#endif
4186721d 470
8369ae33 471extern bool bcma_core_is_enabled(struct bcma_device *core);
e3ae0cac 472extern void bcma_core_disable(struct bcma_device *core, u32 flags);
8369ae33 473extern int bcma_core_enable(struct bcma_device *core, u32 flags);
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474extern void bcma_core_set_clockmode(struct bcma_device *core,
475 enum bcma_clkmode clkmode);
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476extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
477 bool on);
8d4b9e31 478extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
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479#define BCMA_DMA_TRANSLATION_MASK 0xC0000000
480#define BCMA_DMA_TRANSLATION_NONE 0x00000000
481#define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
482#define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
483extern u32 bcma_core_dma_translation(struct bcma_device *core);
3de1a774 484
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485extern unsigned int bcma_core_irq(struct bcma_device *core, int num);
486
8369ae33 487#endif /* LINUX_BCMA_H_ */