[linux-2.6-block.git] / include / linux / amd-iommu.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
 * Author: Joerg Roedel <joerg.roedel@amd.com>
 *         Leo Duran <leo.duran@amd.com>
 */

#ifndef _ASM_X86_AMD_IOMMU_H
#define _ASM_X86_AMD_IOMMU_H

#include <linux/types.h>

/*
 * This is mainly used to communicate information back-and-forth
 * between SVM and IOMMU for setting up and tearing down posted
 * interrupt
 */
struct amd_iommu_pi_data {
	u32 ga_tag;
	u32 prev_ga_tag;
	u64 base;
	bool is_guest_mode;
	struct vcpu_data *vcpu_data;
	void *ir_data;
};

#ifdef CONFIG_AMD_IOMMU

struct task_struct;
struct pci_dev;

extern int amd_iommu_detect(void);
extern int amd_iommu_init_hardware(void);

/**
 * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
 *				       in the IOMMUv2 driver
 * @pdev: The PCI device the workaround is necessary for
 * @erratum: The erratum workaround to enable
 *
 * The function needs to be called before amd_iommu_init_device().
 * Possible values for the erratum number are for now:
 * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
 *					is enabled
 * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
 *					 requests to one
 */
#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET		0
#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE		1

extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);

/**
 * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
 * @pdev: The PCI device to initialize
 * @pasids: Number of PASIDs to support for this device
 *
 * This function does all setup for the device pdev so that it can be
 * used with IOMMUv2.
 * Returns 0 on success or negative value on error.
 */
extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);

/**
 * amd_iommu_free_device() - Free all IOMMUv2 related device resources
 *			     and disable IOMMUv2 usage for this device
 * @pdev: The PCI device to disable IOMMUv2 usage for'
 */
extern void amd_iommu_free_device(struct pci_dev *pdev);

/**
 * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
 * @pdev: The PCI device to bind the task to
 * @pasid: The PASID on the device the task should be bound to
 * @task: the task to bind
 *
 * The function returns 0 on success or a negative value on error.
 */
extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
				struct task_struct *task);

/**
 * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
 *			      a device
 * @pdev: The device of the PASID
 * @pasid: The PASID to unbind
 *
 * When this function returns the device is no longer using the PASID
 * and the PASID is no longer bound to its task.
 */
extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);

/**
 * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
 *				    PRI requests
 * @pdev: The PCI device the call-back should be registered for
 * @cb: The call-back function
 *
 * The IOMMUv2 driver invokes this call-back when it is unable to
 * successfully handle a PRI request. The device driver can then decide
 * which PRI response the device should see. Possible return values for
 * the call-back are:
 *
 * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
 * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
 * - AMD_IOMMU_INV_PRI_RSP_FAIL    - Send Failure back to the device,
 *				     the device is required to disable
 *				     PRI when it receives this response
 *
 * The function returns 0 on success or negative value on error.
 */
#define AMD_IOMMU_INV_PRI_RSP_SUCCESS	0
#define AMD_IOMMU_INV_PRI_RSP_INVALID	1
#define AMD_IOMMU_INV_PRI_RSP_FAIL	2

typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
					int pasid,
					unsigned long address,
					u16);

extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
					amd_iommu_invalid_ppr_cb cb);

#define PPR_FAULT_EXEC	(1 << 1)
#define PPR_FAULT_READ  (1 << 2)
#define PPR_FAULT_WRITE (1 << 5)
#define PPR_FAULT_USER  (1 << 6)
#define PPR_FAULT_RSVD  (1 << 7)
#define PPR_FAULT_GN    (1 << 8)

/**
 * amd_iommu_device_info() - Get information about IOMMUv2 support of a
 *			     PCI device
 * @pdev: PCI device to query information from
 * @info: A pointer to an amd_iommu_device_info structure which will contain
 *	  the information about the PCI device
 *
 * Returns 0 on success, negative value on error
 */

#define AMD_IOMMU_DEVICE_FLAG_ATS_SUP     0x1    /* ATS feature supported */
#define AMD_IOMMU_DEVICE_FLAG_PRI_SUP     0x2    /* PRI feature supported */
#define AMD_IOMMU_DEVICE_FLAG_PASID_SUP   0x4    /* PASID context supported */
#define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP    0x8    /* Device may request execution
						    on memory pages */
#define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP   0x10    /* Device may request
						    super-user privileges */

struct amd_iommu_device_info {
	int max_pasids;
	u32 flags;
};

extern int amd_iommu_device_info(struct pci_dev *pdev,
				 struct amd_iommu_device_info *info);

/**
 * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
 *				       a pasid context. This call-back is
 *				       invoked when the IOMMUv2 driver needs to
 *				       invalidate a PASID context, for example
 *				       because the task that is bound to that
 *				       context is about to exit.
 *
 * @pdev: The PCI device the call-back should be registered for
 * @cb: The call-back function
 */

typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);

extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
					   amd_iommu_invalidate_ctx cb);
#else /* CONFIG_AMD_IOMMU */

static inline int amd_iommu_detect(void) { return -ENODEV; }

#endif /* CONFIG_AMD_IOMMU */

#if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP)

/* IOMMU AVIC Function */
extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));

extern int
amd_iommu_update_ga(int cpu, bool is_run, void *data);

#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */

static inline int
amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
{
	return 0;
}

static inline int
amd_iommu_update_ga(int cpu, bool is_run, void *data)
{
	return 0;
}

#endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */

#endif /* _ASM_X86_AMD_IOMMU_H */
Commit	Line	Data
45051539	1	/* SPDX-License-Identifier: GPL-2.0-only */
c6da992e	2	/*
5d0d7156	3	* Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
c6da992e JR	4	* Author: Joerg Roedel <joerg.roedel@amd.com>
c6da992e JR	5	* Leo Duran <leo.duran@amd.com>
c6da992e JR	6	*/
c6da992e JR	7
1965aae3 PA	8	#ifndef _ASM_X86_AMD_IOMMU_H
1965aae3 PA	9	#define _ASM_X86_AMD_IOMMU_H
c6da992e	10
ed96f228	11	#include <linux/types.h>
c6da992e	12
b9fc6b56 SS	13	/*
	14	* This is mainly used to communicate information back-and-forth
	15	* between SVM and IOMMU for setting up and tearing down posted
	16	* interrupt
	17	*/
	18	struct amd_iommu_pi_data {
	19	u32 ga_tag;
	20	u32 prev_ga_tag;
	21	u64 base;
	22	bool is_guest_mode;
	23	struct vcpu_data *vcpu_data;
	24	void *ir_data;
	25	};
	26
c6da992e	27	#ifdef CONFIG_AMD_IOMMU
6a9401a7	28
2d5503b6	29	struct task_struct;
ed96f228 JR	30	struct pci_dev;
ed96f228 JR	31
480125ba	32	extern int amd_iommu_detect(void);
8704a1ba	33	extern int amd_iommu_init_hardware(void);
6a113ddc JR	34
	35	/**
	36	* amd_iommu_enable_device_erratum() - Enable erratum workaround for device
	37	* in the IOMMUv2 driver
	38	* @pdev: The PCI device the workaround is necessary for
	39	* @erratum: The erratum workaround to enable
	40	*
ed96f228	41	* The function needs to be called before amd_iommu_init_device().
6a113ddc JR	42	* Possible values for the erratum number are for now:
	43	* - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
	44	* is enabled
	45	* - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
	46	* requests to one
	47	*/
	48	#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
	49	#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
	50
	51	extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
	52
ed96f228 JR	53	/**
	54	* amd_iommu_init_device() - Init device for use with IOMMUv2 driver
	55	* @pdev: The PCI device to initialize
	56	* @pasids: Number of PASIDs to support for this device
	57	*
	58	* This function does all setup for the device pdev so that it can be
	59	* used with IOMMUv2.
	60	* Returns 0 on success or negative value on error.
	61	*/
	62	extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
	63
	64	/**
	65	* amd_iommu_free_device() - Free all IOMMUv2 related device resources
	66	* and disable IOMMUv2 usage for this device
	67	* @pdev: The PCI device to disable IOMMUv2 usage for'
	68	*/
	69	extern void amd_iommu_free_device(struct pci_dev *pdev);
	70
2d5503b6 JR	71	/**
	72	* amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
	73	* @pdev: The PCI device to bind the task to
	74	* @pasid: The PASID on the device the task should be bound to
	75	* @task: the task to bind
	76	*
	77	* The function returns 0 on success or a negative value on error.
	78	*/
	79	extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
	80	struct task_struct *task);
	81
	82	/**
	83	* amd_iommu_unbind_pasid() - Unbind a PASID from its task on
	84	* a device
	85	* @pdev: The device of the PASID
	86	* @pasid: The PASID to unbind
	87	*
	88	* When this function returns the device is no longer using the PASID
	89	* and the PASID is no longer bound to its task.
	90	*/
	91	extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
	92
175d6146 JR	93	/**
	94	* amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
	95	* PRI requests
	96	* @pdev: The PCI device the call-back should be registered for
	97	* @cb: The call-back function
	98	*
	99	* The IOMMUv2 driver invokes this call-back when it is unable to
	100	* successfully handle a PRI request. The device driver can then decide
	101	* which PRI response the device should see. Possible return values for
	102	* the call-back are:
	103	*
	104	* - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
	105	* - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
	106	* - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
	107	* the device is required to disable
	108	* PRI when it receives this response
	109	*
	110	* The function returns 0 on success or negative value on error.
	111	*/
	112	#define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
	113	#define AMD_IOMMU_INV_PRI_RSP_INVALID 1
	114	#define AMD_IOMMU_INV_PRI_RSP_FAIL 2
	115
	116	typedef int (amd_iommu_invalid_ppr_cb)(struct pci_dev pdev,
	117	int pasid,
	118	unsigned long address,
	119	u16);
	120
	121	extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
	122	amd_iommu_invalid_ppr_cb cb);
	123
51499aa9 AS	124	#define PPR_FAULT_EXEC (1 << 1)
	125	#define PPR_FAULT_READ (1 << 2)
	126	#define PPR_FAULT_WRITE (1 << 5)
	127	#define PPR_FAULT_USER (1 << 6)
	128	#define PPR_FAULT_RSVD (1 << 7)
	129	#define PPR_FAULT_GN (1 << 8)
	130
52efdb89 JR	131	/**
	132	* amd_iommu_device_info() - Get information about IOMMUv2 support of a
	133	* PCI device
	134	* @pdev: PCI device to query information from
	135	* @info: A pointer to an amd_iommu_device_info structure which will contain
	136	* the information about the PCI device
	137	*
	138	* Returns 0 on success, negative value on error
	139	*/
	140
	141	#define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
	142	#define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
	143	#define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
	144	#define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
	145	on memory pages */
	146	#define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
	147	super-user privileges */
	148
	149	struct amd_iommu_device_info {
	150	int max_pasids;
	151	u32 flags;
	152	};
	153
	154	extern int amd_iommu_device_info(struct pci_dev *pdev,
	155	struct amd_iommu_device_info *info);
	156
bc21662f JR	157	/**
	158	* amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
	159	* a pasid context. This call-back is
	160	* invoked when the IOMMUv2 driver needs to
	161	* invalidate a PASID context, for example
	162	* because the task that is bound to that
	163	* context is about to exit.
	164	*
	165	* @pdev: The PCI device the call-back should be registered for
	166	* @cb: The call-back function
	167	*/
	168
	169	typedef void (amd_iommu_invalidate_ctx)(struct pci_dev pdev, int pasid);
	170
	171	extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
	172	amd_iommu_invalidate_ctx cb);
bd6fcefc	173	#else /* CONFIG_AMD_IOMMU */
6a9401a7	174
480125ba	175	static inline int amd_iommu_detect(void) { return -ENODEV; }
6a9401a7	176
bd6fcefc SS	177	#endif /* CONFIG_AMD_IOMMU */
	178
	179	#if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP)
	180
	181	/* IOMMU AVIC Function */
	182	extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
	183
8dbea3fd SS	184	extern int
	185	amd_iommu_update_ga(int cpu, bool is_run, void *data);
	186
bd6fcefc SS	187	#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
	188
	189	static inline int
	190	amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
	191	{
	192	return 0;
	193	}
	194
8dbea3fd SS	195	static inline int
	196	amd_iommu_update_ga(int cpu, bool is_run, void *data)
	197	{
	198	return 0;
	199	}
	200
bd6fcefc	201	#endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
c6da992e	202
1965aae3	203	#endif /* _ASM_X86_AMD_IOMMU_H */