projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 45051539 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| c6da992e | 2 | /* |
| 5d0d7156 | 3 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
| c6da992e JR |
4 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 5 | * Leo Duran <leo.duran@amd.com> | |
| c6da992e JR |
6 | */ |
| 7 | ||
| 1965aae3 PA |
8 | #ifndef _ASM_X86_AMD_IOMMU_H |
| 9 | #define _ASM_X86_AMD_IOMMU_H | |
| c6da992e | 10 | |
| ed96f228 | 11 | #include <linux/types.h> |
| c6da992e | 12 | |
| fc1b6620 CH |
13 | struct amd_iommu; |
| 14 | ||
| b9fc6b56 SS |
15 | /* |
| 16 | * This is mainly used to communicate information back-and-forth | |
| 17 | * between SVM and IOMMU for setting up and tearing down posted | |
| 18 | * interrupt | |
| 19 | */ | |
| 20 | struct amd_iommu_pi_data { | |
| 21 | u32 ga_tag; | |
| 22 | u32 prev_ga_tag; | |
| 23 | u64 base; | |
| 24 | bool is_guest_mode; | |
| 25 | struct vcpu_data *vcpu_data; | |
| 26 | void *ir_data; | |
| 27 | }; | |
| 28 | ||
| c6da992e | 29 | #ifdef CONFIG_AMD_IOMMU |
| 6a9401a7 | 30 | |
| 2d5503b6 | 31 | struct task_struct; |
| ed96f228 JR |
32 | struct pci_dev; |
| 33 | ||
| 480125ba | 34 | extern int amd_iommu_detect(void); |
| 6a113ddc | 35 | |
| bd6fcefc | 36 | #else /* CONFIG_AMD_IOMMU */ |
| 6a9401a7 | 37 | |
| 480125ba | 38 | static inline int amd_iommu_detect(void) { return -ENODEV; } |
| 6a9401a7 | 39 | |
| bd6fcefc SS |
40 | #endif /* CONFIG_AMD_IOMMU */ |
| 41 | ||
| 42 | #if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) | |
| 43 | ||
| 44 | /* IOMMU AVIC Function */ | |
| 45 | extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32)); | |
| 46 | ||
| 8dbea3fd SS |
47 | extern int |
| 48 | amd_iommu_update_ga(int cpu, bool is_run, void *data); | |
| 49 | ||
| b9c6ff94 SS |
50 | extern int amd_iommu_activate_guest_mode(void *data); |
| 51 | extern int amd_iommu_deactivate_guest_mode(void *data); | |
| 52 | ||
| bd6fcefc SS |
53 | #else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */ |
| 54 | ||
| 55 | static inline int | |
| 56 | amd_iommu_register_ga_log_notifier(int (*notifier)(u32)) | |
| 57 | { | |
| 58 | return 0; | |
| 59 | } | |
| 60 | ||
| 8dbea3fd SS |
61 | static inline int |
| 62 | amd_iommu_update_ga(int cpu, bool is_run, void *data) | |
| 63 | { | |
| 64 | return 0; | |
| 65 | } | |
| 66 | ||
| b9c6ff94 SS |
67 | static inline int amd_iommu_activate_guest_mode(void *data) |
| 68 | { | |
| 69 | return 0; | |
| 70 | } | |
| 71 | ||
| 72 | static inline int amd_iommu_deactivate_guest_mode(void *data) | |
| 73 | { | |
| 74 | return 0; | |
| 75 | } | |
| bd6fcefc | 76 | #endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */ |
| c6da992e | 77 | |
| fc1b6620 CH |
78 | int amd_iommu_get_num_iommus(void); |
| 79 | bool amd_iommu_pc_supported(void); | |
| 80 | u8 amd_iommu_pc_get_max_banks(unsigned int idx); | |
| 81 | u8 amd_iommu_pc_get_max_counters(unsigned int idx); | |
| 82 | int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, | |
| 83 | u64 *value); | |
| 84 | int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, | |
| 85 | u64 *value); | |
| 86 | struct amd_iommu *get_amd_iommu(unsigned int idx); | |
| 87 | ||
| f366a8da AK |
88 | #ifdef CONFIG_KVM_AMD_SEV |
| 89 | int amd_iommu_snp_disable(void); | |
| 90 | #else | |
| 91 | static inline int amd_iommu_snp_disable(void) { return 0; } | |
| 92 | #endif | |
| 93 | ||
| 1965aae3 | 94 | #endif /* _ASM_X86_AMD_IOMMU_H */ |