projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 3b20eb23 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 88ef16d8 TN |
2 | /* |
| 3 | * Copyright (C) 2016, Semihalf | |
| 4 | * Author: Tomasz Nowicki <tn@semihalf.com> | |
| 88ef16d8 TN |
5 | */ |
| 6 | ||
| 7 | #ifndef __ACPI_IORT_H__ | |
| 8 | #define __ACPI_IORT_H__ | |
| 9 | ||
| 10 | #include <linux/acpi.h> | |
| 4bf2efd2 TN |
11 | #include <linux/fwnode.h> |
| 12 | #include <linux/irqdomain.h> | |
| 88ef16d8 | 13 | |
| d6fcd3b1 LP |
14 | #define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL) |
| 15 | #define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL) | |
| 16 | ||
| 24e51604 NL |
17 | /* |
| 18 | * PMCG model identifiers for use in smmu pmu driver. Please note | |
| 19 | * that this is purely for the use of software and has nothing to | |
| 20 | * do with hardware or with IORT specification. | |
| 21 | */ | |
| 22 | #define IORT_SMMU_V3_PMCG_GENERIC 0x00000000 /* Generic SMMUv3 PMCG */ | |
| 24062fe8 | 23 | #define IORT_SMMU_V3_PMCG_HISI_HIP08 0x00000001 /* HiSilicon HIP08 PMCG */ |
| 0242737d | 24 | #define IORT_SMMU_V3_PMCG_HISI_HIP09 0x00000002 /* HiSilicon HIP09 PMCG */ |
| 24e51604 | 25 | |
| 8b4282e6 SK |
26 | int iort_register_domain_token(int trans_id, phys_addr_t base, |
| 27 | struct fwnode_handle *fw_node); | |
| 4bf2efd2 TN |
28 | void iort_deregister_domain_token(int trans_id); |
| 29 | struct fwnode_handle *iort_find_domain_token(int trans_id); | |
| 415e8429 AB |
30 | int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id); |
| 31 | ||
| 88ef16d8 | 32 | #ifdef CONFIG_ACPI_IORT |
| 39c3cf56 | 33 | u32 iort_msi_map_id(struct device *dev, u32 id); |
| d1718a1b LP |
34 | struct irq_domain *iort_get_device_domain(struct device *dev, u32 id, |
| 35 | enum irq_domain_bus_token bus_token); | |
| d4f54a18 | 36 | void acpi_configure_pmsi_domain(struct device *dev); |
| e302eea8 SK |
37 | void iort_get_rmr_sids(struct fwnode_handle *iommu_fwnode, |
| 38 | struct list_head *head); | |
| 39 | void iort_put_rmr_sids(struct fwnode_handle *iommu_fwnode, | |
| 40 | struct list_head *head); | |
| 643b8e4d | 41 | /* IOMMU interface */ |
| 91cfd679 | 42 | int iort_dma_get_ranges(struct device *dev, u64 *limit); |
| 11a8c5e3 | 43 | int iort_iommu_configure_id(struct device *dev, const u32 *id_in); |
| 55be25b8 | 44 | void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head); |
| 2b865293 | 45 | phys_addr_t acpi_iort_dma_get_max_cpu_address(void); |
| 88ef16d8 | 46 | #else |
| 39c3cf56 LP |
47 | static inline u32 iort_msi_map_id(struct device *dev, u32 id) |
| 48 | { return id; } | |
| d1718a1b LP |
49 | static inline struct irq_domain *iort_get_device_domain( |
| 50 | struct device *dev, u32 id, enum irq_domain_bus_token bus_token) | |
| 4bf2efd2 | 51 | { return NULL; } |
| d4f54a18 | 52 | static inline void acpi_configure_pmsi_domain(struct device *dev) { } |
| e302eea8 SK |
53 | static inline |
| 54 | void iort_get_rmr_sids(struct fwnode_handle *iommu_fwnode, struct list_head *head) { } | |
| 55 | static inline | |
| 56 | void iort_put_rmr_sids(struct fwnode_handle *iommu_fwnode, struct list_head *head) { } | |
| 643b8e4d | 57 | /* IOMMU interface */ |
| 91cfd679 | 58 | static inline int iort_dma_get_ranges(struct device *dev, u64 *limit) |
| db59e1b6 | 59 | { return -ENODEV; } |
| 11a8c5e3 JPB |
60 | static inline int iort_iommu_configure_id(struct device *dev, const u32 *id_in) |
| 61 | { return -ENODEV; } | |
| 8b4282e6 | 62 | static inline |
| 55be25b8 | 63 | void iort_iommu_get_resv_regions(struct device *dev, struct list_head *head) |
| 8778b1d4 | 64 | { } |
| 2b865293 AB |
65 | |
| 66 | static inline phys_addr_t acpi_iort_dma_get_max_cpu_address(void) | |
| 67 | { return PHYS_ADDR_MAX; } | |
| 88ef16d8 TN |
68 | #endif |
| 69 | ||
| 70 | #endif /* __ACPI_IORT_H__ */ |