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36c310f5 MC |
1 | /* |
2 | * Copyright (c) 2017 MediaTek Inc. | |
3 | * Author: Mars.C <mars.cheng@mediatek.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #ifndef _DT_BINDINGS_POWER_MT6797_POWER_H | |
15 | #define _DT_BINDINGS_POWER_MT6797_POWER_H | |
16 | ||
17 | #define MT6797_POWER_DOMAIN_VDEC 0 | |
18 | #define MT6797_POWER_DOMAIN_VENC 1 | |
19 | #define MT6797_POWER_DOMAIN_ISP 2 | |
20 | #define MT6797_POWER_DOMAIN_MM 3 | |
21 | #define MT6797_POWER_DOMAIN_AUDIO 4 | |
22 | #define MT6797_POWER_DOMAIN_MFG_ASYNC 5 | |
23 | #define MT6797_POWER_DOMAIN_MFG 6 | |
24 | #define MT6797_POWER_DOMAIN_MFG_CORE0 7 | |
25 | #define MT6797_POWER_DOMAIN_MFG_CORE1 8 | |
26 | #define MT6797_POWER_DOMAIN_MFG_CORE2 9 | |
27 | #define MT6797_POWER_DOMAIN_MFG_CORE3 10 | |
28 | #define MT6797_POWER_DOMAIN_MJC 11 | |
29 | ||
30 | #endif /* _DT_BINDINGS_POWER_MT6797_POWER_H */ |