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1b1f42d8 LS |
1 | /* |
2 | * Copyright 2015 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | ||
24 | #ifndef _DRM_GPU_SCHEDULER_H_ | |
25 | #define _DRM_GPU_SCHEDULER_H_ | |
26 | ||
27 | #include <drm/spsc_queue.h> | |
28 | #include <linux/dma-fence.h> | |
29 | ||
30 | struct drm_gpu_scheduler; | |
31 | struct drm_sched_rq; | |
32 | ||
33 | enum drm_sched_priority { | |
34 | DRM_SCHED_PRIORITY_MIN, | |
35 | DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN, | |
36 | DRM_SCHED_PRIORITY_NORMAL, | |
37 | DRM_SCHED_PRIORITY_HIGH_SW, | |
38 | DRM_SCHED_PRIORITY_HIGH_HW, | |
39 | DRM_SCHED_PRIORITY_KERNEL, | |
40 | DRM_SCHED_PRIORITY_MAX, | |
41 | DRM_SCHED_PRIORITY_INVALID = -1, | |
42 | DRM_SCHED_PRIORITY_UNSET = -2 | |
43 | }; | |
44 | ||
45 | /** | |
2d33948e ND |
46 | * struct drm_sched_entity - A wrapper around a job queue (typically |
47 | * attached to the DRM file_priv). | |
48 | * | |
49 | * @list: used to append this struct to the list of entities in the | |
50 | * runqueue. | |
51 | * @rq: runqueue to which this entity belongs. | |
52 | * @rq_lock: lock to modify the runqueue to which this entity belongs. | |
53 | * @sched: the scheduler instance to which this entity is enqueued. | |
54 | * @job_queue: the list of jobs of this entity. | |
55 | * @fence_seq: a linearly increasing seqno incremented with each | |
56 | * new &drm_sched_fence which is part of the entity. | |
57 | * @fence_context: a unique context for all the fences which belong | |
58 | * to this entity. | |
59 | * The &drm_sched_fence.scheduled uses the | |
60 | * fence_context but &drm_sched_fence.finished uses | |
61 | * fence_context + 1. | |
62 | * @dependency: the dependency fence of the job which is on the top | |
63 | * of the job queue. | |
64 | * @cb: callback for the dependency fence above. | |
65 | * @guilty: points to ctx's guilty. | |
66 | * @fini_status: contains the exit status in case the process was signalled. | |
67 | * @last_scheduled: points to the finished fence of the last scheduled job. | |
1a61ee07 EA |
68 | * |
69 | * Entities will emit jobs in order to their corresponding hardware | |
70 | * ring, and the scheduler will alternate between entities based on | |
71 | * scheduling policy. | |
2d33948e | 72 | */ |
1b1f42d8 LS |
73 | struct drm_sched_entity { |
74 | struct list_head list; | |
75 | struct drm_sched_rq *rq; | |
76 | spinlock_t rq_lock; | |
77 | struct drm_gpu_scheduler *sched; | |
78 | ||
1b1f42d8 LS |
79 | struct spsc_queue job_queue; |
80 | ||
81 | atomic_t fence_seq; | |
82 | uint64_t fence_context; | |
83 | ||
84 | struct dma_fence *dependency; | |
85 | struct dma_fence_cb cb; | |
2d33948e ND |
86 | atomic_t *guilty; |
87 | int fini_status; | |
88 | struct dma_fence *last_scheduled; | |
1b1f42d8 LS |
89 | }; |
90 | ||
91 | /** | |
2d33948e ND |
92 | * struct drm_sched_rq - queue of entities to be scheduled. |
93 | * | |
94 | * @lock: to modify the entities list. | |
95 | * @entities: list of the entities to be scheduled. | |
96 | * @current_entity: the entity which is to be scheduled. | |
97 | * | |
1b1f42d8 LS |
98 | * Run queue is a set of entities scheduling command submissions for |
99 | * one specific ring. It implements the scheduling policy that selects | |
100 | * the next entity to emit commands from. | |
2d33948e | 101 | */ |
1b1f42d8 LS |
102 | struct drm_sched_rq { |
103 | spinlock_t lock; | |
104 | struct list_head entities; | |
105 | struct drm_sched_entity *current_entity; | |
106 | }; | |
107 | ||
2d33948e ND |
108 | /** |
109 | * struct drm_sched_fence - fences corresponding to the scheduling of a job. | |
110 | */ | |
1b1f42d8 | 111 | struct drm_sched_fence { |
2d33948e ND |
112 | /** |
113 | * @scheduled: this fence is what will be signaled by the scheduler | |
114 | * when the job is scheduled. | |
115 | */ | |
1b1f42d8 | 116 | struct dma_fence scheduled; |
1a61ee07 | 117 | |
2d33948e ND |
118 | /** |
119 | * @finished: this fence is what will be signaled by the scheduler | |
120 | * when the job is completed. | |
121 | * | |
122 | * When setting up an out fence for the job, you should use | |
123 | * this, since it's available immediately upon | |
124 | * drm_sched_job_init(), and the fence returned by the driver | |
125 | * from run_job() won't be created until the dependencies have | |
126 | * resolved. | |
127 | */ | |
1b1f42d8 | 128 | struct dma_fence finished; |
1a61ee07 | 129 | |
2d33948e ND |
130 | /** |
131 | * @cb: the callback for the parent fence below. | |
132 | */ | |
1b1f42d8 | 133 | struct dma_fence_cb cb; |
2d33948e ND |
134 | /** |
135 | * @parent: the fence returned by &drm_sched_backend_ops.run_job | |
136 | * when scheduling the job on hardware. We signal the | |
137 | * &drm_sched_fence.finished fence once parent is signalled. | |
138 | */ | |
1b1f42d8 | 139 | struct dma_fence *parent; |
2d33948e ND |
140 | /** |
141 | * @sched: the scheduler instance to which the job having this struct | |
142 | * belongs to. | |
143 | */ | |
1b1f42d8 | 144 | struct drm_gpu_scheduler *sched; |
2d33948e ND |
145 | /** |
146 | * @lock: the lock used by the scheduled and the finished fences. | |
147 | */ | |
1b1f42d8 | 148 | spinlock_t lock; |
2d33948e ND |
149 | /** |
150 | * @owner: job owner for debugging | |
151 | */ | |
1b1f42d8 LS |
152 | void *owner; |
153 | }; | |
154 | ||
155 | struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); | |
156 | ||
1a61ee07 | 157 | /** |
2d33948e ND |
158 | * struct drm_sched_job - A job to be run by an entity. |
159 | * | |
160 | * @queue_node: used to append this struct to the queue of jobs in an entity. | |
161 | * @sched: the scheduler instance on which this job is scheduled. | |
162 | * @s_fence: contains the fences for the scheduling of job. | |
163 | * @finish_cb: the callback for the finished fence. | |
164 | * @finish_work: schedules the function @drm_sched_job_finish once the job has | |
165 | * finished to remove the job from the | |
166 | * @drm_gpu_scheduler.ring_mirror_list. | |
167 | * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list. | |
168 | * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the timeout | |
169 | * interval is over. | |
170 | * @id: a unique id assigned to each job scheduled on the scheduler. | |
171 | * @karma: increment on every hang caused by this job. If this exceeds the hang | |
172 | * limit of the scheduler then the job is marked guilty and will not | |
173 | * be scheduled further. | |
174 | * @s_priority: the priority of the job. | |
175 | * @entity: the entity to which this job belongs. | |
1a61ee07 EA |
176 | * |
177 | * A job is created by the driver using drm_sched_job_init(), and | |
178 | * should call drm_sched_entity_push_job() once it wants the scheduler | |
179 | * to schedule the job. | |
180 | */ | |
1b1f42d8 LS |
181 | struct drm_sched_job { |
182 | struct spsc_node queue_node; | |
183 | struct drm_gpu_scheduler *sched; | |
184 | struct drm_sched_fence *s_fence; | |
185 | struct dma_fence_cb finish_cb; | |
186 | struct work_struct finish_work; | |
187 | struct list_head node; | |
188 | struct delayed_work work_tdr; | |
189 | uint64_t id; | |
190 | atomic_t karma; | |
191 | enum drm_sched_priority s_priority; | |
8ee3a52e | 192 | struct drm_sched_entity *entity; |
1b1f42d8 LS |
193 | }; |
194 | ||
195 | static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, | |
196 | int threshold) | |
197 | { | |
198 | return (s_job && atomic_inc_return(&s_job->karma) > threshold); | |
199 | } | |
200 | ||
201 | /** | |
2d33948e ND |
202 | * struct drm_sched_backend_ops |
203 | * | |
1b1f42d8 | 204 | * Define the backend operations called by the scheduler, |
2d33948e ND |
205 | * these functions should be implemented in driver side. |
206 | */ | |
1b1f42d8 | 207 | struct drm_sched_backend_ops { |
2d33948e ND |
208 | /** |
209 | * @dependency: Called when the scheduler is considering scheduling | |
210 | * this job next, to get another struct dma_fence for this job to | |
1a61ee07 EA |
211 | * block on. Once it returns NULL, run_job() may be called. |
212 | */ | |
1b1f42d8 LS |
213 | struct dma_fence *(*dependency)(struct drm_sched_job *sched_job, |
214 | struct drm_sched_entity *s_entity); | |
1a61ee07 | 215 | |
2d33948e ND |
216 | /** |
217 | * @run_job: Called to execute the job once all of the dependencies | |
218 | * have been resolved. This may be called multiple times, if | |
1a61ee07 EA |
219 | * timedout_job() has happened and drm_sched_job_recovery() |
220 | * decides to try it again. | |
221 | */ | |
1b1f42d8 | 222 | struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); |
1a61ee07 | 223 | |
2d33948e ND |
224 | /** |
225 | * @timedout_job: Called when a job has taken too long to execute, | |
226 | * to trigger GPU recovery. | |
1a61ee07 | 227 | */ |
1b1f42d8 | 228 | void (*timedout_job)(struct drm_sched_job *sched_job); |
1a61ee07 | 229 | |
2d33948e ND |
230 | /** |
231 | * @free_job: Called once the job's finished fence has been signaled | |
232 | * and it's time to clean it up. | |
1a61ee07 | 233 | */ |
1b1f42d8 LS |
234 | void (*free_job)(struct drm_sched_job *sched_job); |
235 | }; | |
236 | ||
237 | /** | |
2d33948e ND |
238 | * struct drm_gpu_scheduler |
239 | * | |
240 | * @ops: backend operations provided by the driver. | |
241 | * @hw_submission_limit: the max size of the hardware queue. | |
242 | * @timeout: the time after which a job is removed from the scheduler. | |
243 | * @name: name of the ring for which this scheduler is being used. | |
244 | * @sched_rq: priority wise array of run queues. | |
245 | * @wake_up_worker: the wait queue on which the scheduler sleeps until a job | |
246 | * is ready to be scheduled. | |
247 | * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler | |
248 | * waits on this wait queue until all the scheduled jobs are | |
249 | * finished. | |
250 | * @hw_rq_count: the number of jobs currently in the hardware queue. | |
251 | * @job_id_count: used to assign unique id to the each job. | |
252 | * @thread: the kthread on which the scheduler which run. | |
253 | * @ring_mirror_list: the list of jobs which are currently in the job queue. | |
254 | * @job_list_lock: lock to protect the ring_mirror_list. | |
255 | * @hang_limit: once the hangs by a job crosses this limit then it is marked | |
256 | * guilty and it will be considered for scheduling further. | |
257 | * | |
258 | * One scheduler is implemented for each hardware ring. | |
259 | */ | |
1b1f42d8 LS |
260 | struct drm_gpu_scheduler { |
261 | const struct drm_sched_backend_ops *ops; | |
262 | uint32_t hw_submission_limit; | |
263 | long timeout; | |
264 | const char *name; | |
265 | struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX]; | |
266 | wait_queue_head_t wake_up_worker; | |
267 | wait_queue_head_t job_scheduled; | |
268 | atomic_t hw_rq_count; | |
269 | atomic64_t job_id_count; | |
270 | struct task_struct *thread; | |
271 | struct list_head ring_mirror_list; | |
272 | spinlock_t job_list_lock; | |
273 | int hang_limit; | |
274 | }; | |
275 | ||
276 | int drm_sched_init(struct drm_gpu_scheduler *sched, | |
277 | const struct drm_sched_backend_ops *ops, | |
278 | uint32_t hw_submission, unsigned hang_limit, long timeout, | |
279 | const char *name); | |
280 | void drm_sched_fini(struct drm_gpu_scheduler *sched); | |
281 | ||
282 | int drm_sched_entity_init(struct drm_gpu_scheduler *sched, | |
283 | struct drm_sched_entity *entity, | |
284 | struct drm_sched_rq *rq, | |
8344c53f | 285 | atomic_t *guilty); |
8ee3a52e ED |
286 | void drm_sched_entity_do_release(struct drm_gpu_scheduler *sched, |
287 | struct drm_sched_entity *entity); | |
288 | void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched, | |
289 | struct drm_sched_entity *entity); | |
1b1f42d8 LS |
290 | void drm_sched_entity_fini(struct drm_gpu_scheduler *sched, |
291 | struct drm_sched_entity *entity); | |
292 | void drm_sched_entity_push_job(struct drm_sched_job *sched_job, | |
293 | struct drm_sched_entity *entity); | |
294 | void drm_sched_entity_set_rq(struct drm_sched_entity *entity, | |
295 | struct drm_sched_rq *rq); | |
296 | ||
1b1f42d8 LS |
297 | struct drm_sched_fence *drm_sched_fence_create( |
298 | struct drm_sched_entity *s_entity, void *owner); | |
299 | void drm_sched_fence_scheduled(struct drm_sched_fence *fence); | |
300 | void drm_sched_fence_finished(struct drm_sched_fence *fence); | |
301 | int drm_sched_job_init(struct drm_sched_job *job, | |
302 | struct drm_gpu_scheduler *sched, | |
303 | struct drm_sched_entity *entity, | |
304 | void *owner); | |
305 | void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, | |
306 | struct drm_sched_job *job); | |
307 | void drm_sched_job_recovery(struct drm_gpu_scheduler *sched); | |
308 | bool drm_sched_dependency_optimized(struct dma_fence* fence, | |
309 | struct drm_sched_entity *entity); | |
310 | void drm_sched_job_kickout(struct drm_sched_job *s_job); | |
311 | ||
312 | #endif |