[linux-2.6-block.git] / include / drm / gpu_scheduler.h

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef _DRM_GPU_SCHEDULER_H_
#define _DRM_GPU_SCHEDULER_H_

#include <drm/spsc_queue.h>
#include <linux/dma-fence.h>

#define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)

struct drm_gpu_scheduler;
struct drm_sched_rq;

enum drm_sched_priority {
	DRM_SCHED_PRIORITY_MIN,
	DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN,
	DRM_SCHED_PRIORITY_NORMAL,
	DRM_SCHED_PRIORITY_HIGH_SW,
	DRM_SCHED_PRIORITY_HIGH_HW,
	DRM_SCHED_PRIORITY_KERNEL,
	DRM_SCHED_PRIORITY_MAX,
	DRM_SCHED_PRIORITY_INVALID = -1,
	DRM_SCHED_PRIORITY_UNSET = -2
};

/**
 * struct drm_sched_entity - A wrapper around a job queue (typically
 * attached to the DRM file_priv).
 *
 * @list: used to append this struct to the list of entities in the
 *        runqueue.
 * @rq: runqueue on which this entity is currently scheduled.
 * @rq_list: a list of run queues on which jobs from this entity can
 *           be scheduled
 * @num_rq_list: number of run queues in the rq_list
 * @rq_lock: lock to modify the runqueue to which this entity belongs.
 * @job_queue: the list of jobs of this entity.
 * @fence_seq: a linearly increasing seqno incremented with each
 *             new &drm_sched_fence which is part of the entity.
 * @fence_context: a unique context for all the fences which belong
 *                 to this entity.
 *                 The &drm_sched_fence.scheduled uses the
 *                 fence_context but &drm_sched_fence.finished uses
 *                 fence_context + 1.
 * @dependency: the dependency fence of the job which is on the top
 *              of the job queue.
 * @cb: callback for the dependency fence above.
 * @guilty: points to ctx's guilty.
 * @fini_status: contains the exit status in case the process was signalled.
 * @last_scheduled: points to the finished fence of the last scheduled job.
 * @last_user: last group leader pushing a job into the entity.
 * @stopped: Marks the enity as removed from rq and destined for termination.
 *
 * Entities will emit jobs in order to their corresponding hardware
 * ring, and the scheduler will alternate between entities based on
 * scheduling policy.
 */
struct drm_sched_entity {
	struct list_head		list;
	struct drm_sched_rq		*rq;
	struct drm_sched_rq		**rq_list;
	unsigned int                    num_rq_list;
	spinlock_t			rq_lock;

	struct spsc_queue		job_queue;

	atomic_t			fence_seq;
	uint64_t			fence_context;

	struct dma_fence		*dependency;
	struct dma_fence_cb		cb;
	atomic_t			*guilty;
	struct dma_fence                *last_scheduled;
	struct task_struct		*last_user;
	bool 				stopped;
};

/**
 * struct drm_sched_rq - queue of entities to be scheduled.
 *
 * @lock: to modify the entities list.
 * @sched: the scheduler to which this rq belongs to.
 * @entities: list of the entities to be scheduled.
 * @current_entity: the entity which is to be scheduled.
 *
 * Run queue is a set of entities scheduling command submissions for
 * one specific ring. It implements the scheduling policy that selects
 * the next entity to emit commands from.
 */
struct drm_sched_rq {
	spinlock_t			lock;
	struct drm_gpu_scheduler	*sched;
	struct list_head		entities;
	struct drm_sched_entity		*current_entity;
};

/**
 * struct drm_sched_fence - fences corresponding to the scheduling of a job.
 */
struct drm_sched_fence {
        /**
         * @scheduled: this fence is what will be signaled by the scheduler
         * when the job is scheduled.
         */
	struct dma_fence		scheduled;

        /**
         * @finished: this fence is what will be signaled by the scheduler
         * when the job is completed.
         *
         * When setting up an out fence for the job, you should use
         * this, since it's available immediately upon
         * drm_sched_job_init(), and the fence returned by the driver
         * from run_job() won't be created until the dependencies have
         * resolved.
         */
	struct dma_fence		finished;

        /**
         * @parent: the fence returned by &drm_sched_backend_ops.run_job
         * when scheduling the job on hardware. We signal the
         * &drm_sched_fence.finished fence once parent is signalled.
         */
	struct dma_fence		*parent;
        /**
         * @sched: the scheduler instance to which the job having this struct
         * belongs to.
         */
	struct drm_gpu_scheduler	*sched;
        /**
         * @lock: the lock used by the scheduled and the finished fences.
         */
	spinlock_t			lock;
        /**
         * @owner: job owner for debugging
         */
	void				*owner;
};

struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f);

/**
 * struct drm_sched_job - A job to be run by an entity.
 *
 * @queue_node: used to append this struct to the queue of jobs in an entity.
 * @sched: the scheduler instance on which this job is scheduled.
 * @s_fence: contains the fences for the scheduling of job.
 * @finish_cb: the callback for the finished fence.
 * @finish_work: schedules the function @drm_sched_job_finish once the job has
 *               finished to remove the job from the
 *               @drm_gpu_scheduler.ring_mirror_list.
 * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list.
 * @id: a unique id assigned to each job scheduled on the scheduler.
 * @karma: increment on every hang caused by this job. If this exceeds the hang
 *         limit of the scheduler then the job is marked guilty and will not
 *         be scheduled further.
 * @s_priority: the priority of the job.
 * @entity: the entity to which this job belongs.
 * @cb: the callback for the parent fence in s_fence.
 *
 * A job is created by the driver using drm_sched_job_init(), and
 * should call drm_sched_entity_push_job() once it wants the scheduler
 * to schedule the job.
 */
struct drm_sched_job {
	struct spsc_node		queue_node;
	struct drm_gpu_scheduler	*sched;
	struct drm_sched_fence		*s_fence;
	struct dma_fence_cb		finish_cb;
	struct work_struct		finish_work;
	struct list_head		node;
	uint64_t			id;
	atomic_t			karma;
	enum drm_sched_priority		s_priority;
	struct drm_sched_entity  *entity;
	struct dma_fence_cb		cb;
};

static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
					    int threshold)
{
	return (s_job && atomic_inc_return(&s_job->karma) > threshold);
}

/**
 * struct drm_sched_backend_ops
 *
 * Define the backend operations called by the scheduler,
 * these functions should be implemented in driver side.
 */
struct drm_sched_backend_ops {
	/**
         * @dependency: Called when the scheduler is considering scheduling
         * this job next, to get another struct dma_fence for this job to
	 * block on.  Once it returns NULL, run_job() may be called.
	 */
	struct dma_fence *(*dependency)(struct drm_sched_job *sched_job,
					struct drm_sched_entity *s_entity);

	/**
         * @run_job: Called to execute the job once all of the dependencies
         * have been resolved.  This may be called multiple times, if
	 * timedout_job() has happened and drm_sched_job_recovery()
	 * decides to try it again.
	 */
	struct dma_fence *(*run_job)(struct drm_sched_job *sched_job);

	/**
         * @timedout_job: Called when a job has taken too long to execute,
         * to trigger GPU recovery.
	 */
	void (*timedout_job)(struct drm_sched_job *sched_job);

	/**
         * @free_job: Called once the job's finished fence has been signaled
         * and it's time to clean it up.
	 */
	void (*free_job)(struct drm_sched_job *sched_job);
};

/**
 * struct drm_gpu_scheduler
 *
 * @ops: backend operations provided by the driver.
 * @hw_submission_limit: the max size of the hardware queue.
 * @timeout: the time after which a job is removed from the scheduler.
 * @name: name of the ring for which this scheduler is being used.
 * @sched_rq: priority wise array of run queues.
 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job
 *                  is ready to be scheduled.
 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
 *                 waits on this wait queue until all the scheduled jobs are
 *                 finished.
 * @hw_rq_count: the number of jobs currently in the hardware queue.
 * @job_id_count: used to assign unique id to the each job.
 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
 *            timeout interval is over.
 * @thread: the kthread on which the scheduler which run.
 * @ring_mirror_list: the list of jobs which are currently in the job queue.
 * @job_list_lock: lock to protect the ring_mirror_list.
 * @hang_limit: once the hangs by a job crosses this limit then it is marked
 *              guilty and it will be considered for scheduling further.
 * @num_jobs: the number of jobs in queue in the scheduler
 * @ready: marks if the underlying HW is ready to work
 *
 * One scheduler is implemented for each hardware ring.
 */
struct drm_gpu_scheduler {
	const struct drm_sched_backend_ops	*ops;
	uint32_t			hw_submission_limit;
	long				timeout;
	const char			*name;
	struct drm_sched_rq		sched_rq[DRM_SCHED_PRIORITY_MAX];
	wait_queue_head_t		wake_up_worker;
	wait_queue_head_t		job_scheduled;
	atomic_t			hw_rq_count;
	atomic64_t			job_id_count;
	struct delayed_work		work_tdr;
	struct task_struct		*thread;
	struct list_head		ring_mirror_list;
	spinlock_t			job_list_lock;
	int				hang_limit;
	atomic_t                        num_jobs;
	bool			ready;
};

int drm_sched_init(struct drm_gpu_scheduler *sched,
		   const struct drm_sched_backend_ops *ops,
		   uint32_t hw_submission, unsigned hang_limit, long timeout,
		   const char *name);

void drm_sched_fini(struct drm_gpu_scheduler *sched);
int drm_sched_job_init(struct drm_sched_job *job,
		       struct drm_sched_entity *entity,
		       void *owner);
void drm_sched_job_cleanup(struct drm_sched_job *job);
void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
void drm_sched_stop(struct drm_gpu_scheduler *sched);
void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
void drm_sched_increase_karma(struct drm_sched_job *bad);
bool drm_sched_dependency_optimized(struct dma_fence* fence,
				    struct drm_sched_entity *entity);
void drm_sched_fault(struct drm_gpu_scheduler *sched);
void drm_sched_job_kickout(struct drm_sched_job *s_job);

void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
			     struct drm_sched_entity *entity);
void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
				struct drm_sched_entity *entity);

int drm_sched_entity_init(struct drm_sched_entity *entity,
			  struct drm_sched_rq **rq_list,
			  unsigned int num_rq_list,
			  atomic_t *guilty);
long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
void drm_sched_entity_fini(struct drm_sched_entity *entity);
void drm_sched_entity_destroy(struct drm_sched_entity *entity);
void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity);
void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
			       struct drm_sched_entity *entity);
void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
				   enum drm_sched_priority priority);
bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);

struct drm_sched_fence *drm_sched_fence_create(
	struct drm_sched_entity *s_entity, void *owner);
void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
void drm_sched_fence_finished(struct drm_sched_fence *fence);

unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
		                unsigned long remaining);

#endif
Commit	Line	Data
1b1f42d8 LS	1	/*
	2	* Copyright 2015 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	*/
	23
	24	#ifndef _DRM_GPU_SCHEDULER_H_
	25	#define _DRM_GPU_SCHEDULER_H_
	26
	27	#include <drm/spsc_queue.h>
	28	#include <linux/dma-fence.h>
	29
741f01e6 AG	30	#define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000)
741f01e6 AG	31
1b1f42d8 LS	32	struct drm_gpu_scheduler;
	33	struct drm_sched_rq;
	34
	35	enum drm_sched_priority {
	36	DRM_SCHED_PRIORITY_MIN,
	37	DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN,
	38	DRM_SCHED_PRIORITY_NORMAL,
	39	DRM_SCHED_PRIORITY_HIGH_SW,
	40	DRM_SCHED_PRIORITY_HIGH_HW,
	41	DRM_SCHED_PRIORITY_KERNEL,
	42	DRM_SCHED_PRIORITY_MAX,
	43	DRM_SCHED_PRIORITY_INVALID = -1,
	44	DRM_SCHED_PRIORITY_UNSET = -2
	45	};
	46
	47	/**
2d33948e ND	48	* struct drm_sched_entity - A wrapper around a job queue (typically
	49	* attached to the DRM file_priv).
	50	*
	51	* @list: used to append this struct to the list of entities in the
	52	* runqueue.
ac0a6cf1 ND	53	* @rq: runqueue on which this entity is currently scheduled.
	54	* @rq_list: a list of run queues on which jobs from this entity can
	55	* be scheduled
	56	* @num_rq_list: number of run queues in the rq_list
2d33948e	57	* @rq_lock: lock to modify the runqueue to which this entity belongs.
2d33948e ND	58	* @job_queue: the list of jobs of this entity.
	59	* @fence_seq: a linearly increasing seqno incremented with each
	60	* new &drm_sched_fence which is part of the entity.
	61	* @fence_context: a unique context for all the fences which belong
	62	* to this entity.
	63	* The &drm_sched_fence.scheduled uses the
	64	* fence_context but &drm_sched_fence.finished uses
	65	* fence_context + 1.
	66	* @dependency: the dependency fence of the job which is on the top
	67	* of the job queue.
	68	* @cb: callback for the dependency fence above.
	69	* @guilty: points to ctx's guilty.
	70	* @fini_status: contains the exit status in case the process was signalled.
	71	* @last_scheduled: points to the finished fence of the last scheduled job.
43bce41c	72	* @last_user: last group leader pushing a job into the entity.
62347a33	73	* @stopped: Marks the enity as removed from rq and destined for termination.
1a61ee07 EA	74	*
	75	* Entities will emit jobs in order to their corresponding hardware
	76	* ring, and the scheduler will alternate between entities based on
	77	* scheduling policy.
2d33948e	78	*/
1b1f42d8 LS	79	struct drm_sched_entity {
	80	struct list_head list;
	81	struct drm_sched_rq *rq;
ac0a6cf1 ND	82	struct drm_sched_rq **rq_list;
ac0a6cf1 ND	83	unsigned int num_rq_list;
1b1f42d8	84	spinlock_t rq_lock;
1b1f42d8	85
1b1f42d8 LS	86	struct spsc_queue job_queue;
	87
	88	atomic_t fence_seq;
	89	uint64_t fence_context;
	90
	91	struct dma_fence *dependency;
	92	struct dma_fence_cb cb;
2d33948e	93	atomic_t *guilty;
2d33948e	94	struct dma_fence *last_scheduled;
43bce41c	95	struct task_struct *last_user;
62347a33	96	bool stopped;
1b1f42d8 LS	97	};
	98
	99	/**
2d33948e ND	100	* struct drm_sched_rq - queue of entities to be scheduled.
	101	*
	102	* @lock: to modify the entities list.
8dc9fbbf	103	* @sched: the scheduler to which this rq belongs to.
2d33948e ND	104	* @entities: list of the entities to be scheduled.
	105	* @current_entity: the entity which is to be scheduled.
	106	*
1b1f42d8 LS	107	* Run queue is a set of entities scheduling command submissions for
	108	* one specific ring. It implements the scheduling policy that selects
	109	* the next entity to emit commands from.
2d33948e	110	*/
1b1f42d8 LS	111	struct drm_sched_rq {
1b1f42d8 LS	112	spinlock_t lock;
8dc9fbbf	113	struct drm_gpu_scheduler *sched;
1b1f42d8 LS	114	struct list_head entities;
	115	struct drm_sched_entity *current_entity;
	116	};
	117
2d33948e ND	118	/**
	119	* struct drm_sched_fence - fences corresponding to the scheduling of a job.
	120	*/
1b1f42d8	121	struct drm_sched_fence {
2d33948e ND	122	/**
	123	* @scheduled: this fence is what will be signaled by the scheduler
	124	* when the job is scheduled.
	125	*/
1b1f42d8	126	struct dma_fence scheduled;
1a61ee07	127
2d33948e ND	128	/**
	129	* @finished: this fence is what will be signaled by the scheduler
	130	* when the job is completed.
	131	*
	132	* When setting up an out fence for the job, you should use
	133	* this, since it's available immediately upon
	134	* drm_sched_job_init(), and the fence returned by the driver
	135	* from run_job() won't be created until the dependencies have
	136	* resolved.
	137	*/
1b1f42d8	138	struct dma_fence finished;
1a61ee07	139
2d33948e ND	140	/**
	141	* @parent: the fence returned by &drm_sched_backend_ops.run_job
	142	* when scheduling the job on hardware. We signal the
	143	* &drm_sched_fence.finished fence once parent is signalled.
	144	*/
1b1f42d8	145	struct dma_fence *parent;
2d33948e ND	146	/**
	147	* @sched: the scheduler instance to which the job having this struct
	148	* belongs to.
	149	*/
1b1f42d8	150	struct drm_gpu_scheduler *sched;
2d33948e ND	151	/**
	152	* @lock: the lock used by the scheduled and the finished fences.
	153	*/
1b1f42d8	154	spinlock_t lock;
2d33948e ND	155	/**
	156	* @owner: job owner for debugging
	157	*/
1b1f42d8 LS	158	void *owner;
	159	};
	160
	161	struct drm_sched_fence to_drm_sched_fence(struct dma_fence f);
	162
1a61ee07	163	/**
2d33948e ND	164	* struct drm_sched_job - A job to be run by an entity.
	165	*
	166	* @queue_node: used to append this struct to the queue of jobs in an entity.
	167	* @sched: the scheduler instance on which this job is scheduled.
	168	* @s_fence: contains the fences for the scheduling of job.
	169	* @finish_cb: the callback for the finished fence.
	170	* @finish_work: schedules the function @drm_sched_job_finish once the job has
	171	* finished to remove the job from the
	172	* @drm_gpu_scheduler.ring_mirror_list.
	173	* @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list.
2d33948e ND	174	* @id: a unique id assigned to each job scheduled on the scheduler.
	175	* @karma: increment on every hang caused by this job. If this exceeds the hang
	176	* limit of the scheduler then the job is marked guilty and will not
	177	* be scheduled further.
	178	* @s_priority: the priority of the job.
	179	* @entity: the entity to which this job belongs.
3741540e	180	* @cb: the callback for the parent fence in s_fence.
1a61ee07 EA	181	*
	182	* A job is created by the driver using drm_sched_job_init(), and
	183	* should call drm_sched_entity_push_job() once it wants the scheduler
	184	* to schedule the job.
	185	*/
1b1f42d8 LS	186	struct drm_sched_job {
	187	struct spsc_node queue_node;
	188	struct drm_gpu_scheduler *sched;
	189	struct drm_sched_fence *s_fence;
	190	struct dma_fence_cb finish_cb;
	191	struct work_struct finish_work;
	192	struct list_head node;
1b1f42d8 LS	193	uint64_t id;
	194	atomic_t karma;
	195	enum drm_sched_priority s_priority;
8ee3a52e	196	struct drm_sched_entity *entity;
3741540e	197	struct dma_fence_cb cb;
1b1f42d8 LS	198	};
	199
	200	static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job,
	201	int threshold)
	202	{
	203	return (s_job && atomic_inc_return(&s_job->karma) > threshold);
	204	}
	205
	206	/**
2d33948e ND	207	* struct drm_sched_backend_ops
2d33948e ND	208	*
1b1f42d8	209	* Define the backend operations called by the scheduler,
2d33948e ND	210	* these functions should be implemented in driver side.
2d33948e ND	211	*/
1b1f42d8	212	struct drm_sched_backend_ops {
2d33948e ND	213	/**
	214	* @dependency: Called when the scheduler is considering scheduling
	215	* this job next, to get another struct dma_fence for this job to
1a61ee07 EA	216	* block on. Once it returns NULL, run_job() may be called.
1a61ee07 EA	217	*/
1b1f42d8 LS	218	struct dma_fence (dependency)(struct drm_sched_job *sched_job,
1b1f42d8 LS	219	struct drm_sched_entity *s_entity);
1a61ee07	220
2d33948e ND	221	/**
	222	* @run_job: Called to execute the job once all of the dependencies
	223	* have been resolved. This may be called multiple times, if
1a61ee07 EA	224	* timedout_job() has happened and drm_sched_job_recovery()
	225	* decides to try it again.
	226	*/
1b1f42d8	227	struct dma_fence (run_job)(struct drm_sched_job *sched_job);
1a61ee07	228
2d33948e ND	229	/**
	230	* @timedout_job: Called when a job has taken too long to execute,
	231	* to trigger GPU recovery.
1a61ee07	232	*/
1b1f42d8	233	void (timedout_job)(struct drm_sched_job sched_job);
1a61ee07	234
2d33948e ND	235	/**
	236	* @free_job: Called once the job's finished fence has been signaled
	237	* and it's time to clean it up.
1a61ee07	238	*/
1b1f42d8 LS	239	void (free_job)(struct drm_sched_job sched_job);
	240	};
	241
	242	/**
2d33948e ND	243	* struct drm_gpu_scheduler
	244	*
	245	* @ops: backend operations provided by the driver.
	246	* @hw_submission_limit: the max size of the hardware queue.
	247	* @timeout: the time after which a job is removed from the scheduler.
	248	* @name: name of the ring for which this scheduler is being used.
	249	* @sched_rq: priority wise array of run queues.
	250	* @wake_up_worker: the wait queue on which the scheduler sleeps until a job
	251	* is ready to be scheduled.
	252	* @job_scheduled: once @drm_sched_entity_do_release is called the scheduler
	253	* waits on this wait queue until all the scheduled jobs are
	254	* finished.
	255	* @hw_rq_count: the number of jobs currently in the hardware queue.
	256	* @job_id_count: used to assign unique id to the each job.
6a962430 ND	257	* @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the
6a962430 ND	258	* timeout interval is over.
2d33948e ND	259	* @thread: the kthread on which the scheduler which run.
	260	* @ring_mirror_list: the list of jobs which are currently in the job queue.
	261	* @job_list_lock: lock to protect the ring_mirror_list.
	262	* @hang_limit: once the hangs by a job crosses this limit then it is marked
	263	* guilty and it will be considered for scheduling further.
249a07c0	264	* @num_jobs: the number of jobs in queue in the scheduler
faf6e1a8	265	* @ready: marks if the underlying HW is ready to work
2d33948e ND	266	*
	267	* One scheduler is implemented for each hardware ring.
	268	*/
1b1f42d8 LS	269	struct drm_gpu_scheduler {
	270	const struct drm_sched_backend_ops *ops;
	271	uint32_t hw_submission_limit;
	272	long timeout;
	273	const char *name;
	274	struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX];
	275	wait_queue_head_t wake_up_worker;
	276	wait_queue_head_t job_scheduled;
	277	atomic_t hw_rq_count;
	278	atomic64_t job_id_count;
6a962430	279	struct delayed_work work_tdr;
1b1f42d8 LS	280	struct task_struct *thread;
	281	struct list_head ring_mirror_list;
	282	spinlock_t job_list_lock;
	283	int hang_limit;
249a07c0	284	atomic_t num_jobs;
faf6e1a8	285	bool ready;
1b1f42d8 LS	286	};
	287
	288	int drm_sched_init(struct drm_gpu_scheduler *sched,
	289	const struct drm_sched_backend_ops *ops,
	290	uint32_t hw_submission, unsigned hang_limit, long timeout,
	291	const char *name);
faf6e1a8	292
1b1f42d8	293	void drm_sched_fini(struct drm_gpu_scheduler *sched);
620e762f CK	294	int drm_sched_job_init(struct drm_sched_job *job,
	295	struct drm_sched_entity *entity,
	296	void *owner);
26efecf9	297	void drm_sched_job_cleanup(struct drm_sched_job *job);
620e762f	298	void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
222b5f04 AG	299	void drm_sched_stop(struct drm_gpu_scheduler *sched);
	300	void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
	301	void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
	302	void drm_sched_increase_karma(struct drm_sched_job *bad);
620e762f CK	303	bool drm_sched_dependency_optimized(struct dma_fence* fence,
620e762f CK	304	struct drm_sched_entity *entity);
8fe159b0	305	void drm_sched_fault(struct drm_gpu_scheduler *sched);
620e762f CK	306	void drm_sched_job_kickout(struct drm_sched_job *s_job);
	307
	308	void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
	309	struct drm_sched_entity *entity);
	310	void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
	311	struct drm_sched_entity *entity);
1b1f42d8	312
aa16b6c6 ND	313	int drm_sched_entity_init(struct drm_sched_entity *entity,
	314	struct drm_sched_rq **rq_list,
	315	unsigned int num_rq_list,
8344c53f	316	atomic_t *guilty);
cdc50176 ND	317	long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout);
	318	void drm_sched_entity_fini(struct drm_sched_entity *entity);
	319	void drm_sched_entity_destroy(struct drm_sched_entity *entity);
620e762f CK	320	void drm_sched_entity_select_rq(struct drm_sched_entity *entity);
620e762f CK	321	struct drm_sched_job drm_sched_entity_pop_job(struct drm_sched_entity entity);
1b1f42d8 LS	322	void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
1b1f42d8 LS	323	struct drm_sched_entity *entity);
7febe4bf CK	324	void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
7febe4bf CK	325	enum drm_sched_priority priority);
620e762f CK	326	bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
620e762f CK	327
1b1f42d8 LS	328	struct drm_sched_fence *drm_sched_fence_create(
	329	struct drm_sched_entity s_entity, void owner);
	330	void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
	331	void drm_sched_fence_finished(struct drm_sched_fence *fence);
1b1f42d8	332
1db8c142 SM	333	unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
	334	void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,
	335	unsigned long remaining);
	336
1b1f42d8	337	#endif