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7c247c06 MN |
1 | /* SPDX-License-Identifier: MIT |
2 | * Copyright (C) 2018 Intel Corp. | |
3 | * | |
4 | * Authors: | |
5 | * Manasi Navare <manasi.d.navare@intel.com> | |
6 | */ | |
7 | ||
8 | #ifndef DRM_DSC_H_ | |
9 | #define DRM_DSC_H_ | |
10 | ||
11 | #include <drm/drm_dp_helper.h> | |
12 | ||
13 | /* VESA Display Stream Compression DSC 1.2 constants */ | |
19fd5adb MN |
14 | #define DSC_NUM_BUF_RANGES 15 |
15 | #define DSC_MUX_WORD_SIZE_8_10_BPC 48 | |
16 | #define DSC_MUX_WORD_SIZE_12_BPC 64 | |
17 | #define DSC_RC_PIXELS_PER_GROUP 3 | |
18 | #define DSC_SCALE_DECREMENT_INTERVAL_MAX 4095 | |
19 | #define DSC_RANGE_BPG_OFFSET_MASK 0x3f | |
20 | ||
082a7b86 SA |
21 | /* DSC Rate Control Constants */ |
22 | #define DSC_RC_MODEL_SIZE_CONST 8192 | |
23 | #define DSC_RC_EDGE_FACTOR_CONST 6 | |
24 | #define DSC_RC_TGT_OFFSET_HI_CONST 3 | |
25 | #define DSC_RC_TGT_OFFSET_LO_CONST 3 | |
26 | ||
a408c857 MN |
27 | /* DSC PPS constants and macros */ |
28 | #define DSC_PPS_VERSION_MAJOR_SHIFT 4 | |
29 | #define DSC_PPS_BPC_SHIFT 4 | |
30 | #define DSC_PPS_MSB_SHIFT 8 | |
31 | #define DSC_PPS_LSB_MASK (0xFF << 0) | |
32 | #define DSC_PPS_BPP_HIGH_MASK (0x3 << 8) | |
33 | #define DSC_PPS_VBR_EN_SHIFT 2 | |
34 | #define DSC_PPS_SIMPLE422_SHIFT 3 | |
35 | #define DSC_PPS_CONVERT_RGB_SHIFT 4 | |
36 | #define DSC_PPS_BLOCK_PRED_EN_SHIFT 5 | |
37 | #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK (0x3 << 8) | |
38 | #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK (0xF << 8) | |
39 | #define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT 4 | |
40 | #define DSC_PPS_RC_RANGE_MINQP_SHIFT 11 | |
41 | #define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6 | |
42 | #define DSC_PPS_NATIVE_420_SHIFT 1 | |
f25310c7 MN |
43 | #define DSC_1_2_MAX_LINEBUF_DEPTH_BITS 16 |
44 | #define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0 | |
45 | #define DSC_1_1_MAX_LINEBUF_DEPTH_BITS 13 | |
a408c857 | 46 | |
19fd5adb MN |
47 | /* Configuration for a single Rate Control model range */ |
48 | struct drm_dsc_rc_range_parameters { | |
49 | /* Min Quantization Parameters allowed for this range */ | |
50 | u8 range_min_qp; | |
51 | /* Max Quantization Parameters allowed for this range */ | |
52 | u8 range_max_qp; | |
53 | /* Bits/group offset to apply to target for this group */ | |
54 | u8 range_bpg_offset; | |
55 | }; | |
56 | ||
57 | struct drm_dsc_config { | |
58 | /* Bits / component for previous reconstructed line buffer */ | |
59 | u8 line_buf_depth; | |
60 | /* Bits per component to code (must be 8, 10, or 12) */ | |
61 | u8 bits_per_component; | |
62 | /* | |
63 | * Flag indicating to do RGB - YCoCg conversion | |
64 | * and back (should be 1 for RGB input) | |
65 | */ | |
66 | bool convert_rgb; | |
67 | u8 slice_count; | |
68 | /* Slice Width */ | |
69 | u16 slice_width; | |
70 | /* Slice Height */ | |
71 | u16 slice_height; | |
72 | /* | |
73 | * 4:2:2 enable mode (from PPS, 4:2:2 conversion happens | |
74 | * outside of DSC encode/decode algorithm) | |
75 | */ | |
76 | bool enable422; | |
77 | /* Picture Width */ | |
78 | u16 pic_width; | |
79 | /* Picture Height */ | |
80 | u16 pic_height; | |
81 | /* Offset to bits/group used by RC to determine QP adjustment */ | |
82 | u8 rc_tgt_offset_high; | |
83 | /* Offset to bits/group used by RC to determine QP adjustment */ | |
84 | u8 rc_tgt_offset_low; | |
85 | /* Bits/pixel target << 4 (ie., 4 fractional bits) */ | |
86 | u16 bits_per_pixel; | |
87 | /* | |
88 | * Factor to determine if an edge is present based | |
89 | * on the bits produced | |
90 | */ | |
91 | u8 rc_edge_factor; | |
92 | /* Slow down incrementing once the range reaches this value */ | |
93 | u8 rc_quant_incr_limit1; | |
94 | /* Slow down incrementing once the range reaches this value */ | |
95 | u8 rc_quant_incr_limit0; | |
96 | /* Number of pixels to delay the initial transmission */ | |
97 | u16 initial_xmit_delay; | |
98 | /* Number of pixels to delay the VLD on the decoder,not including SSM */ | |
99 | u16 initial_dec_delay; | |
100 | /* Block prediction enable */ | |
101 | bool block_pred_enable; | |
102 | /* Bits/group offset to use for first line of the slice */ | |
103 | u8 first_line_bpg_offset; | |
104 | /* Value to use for RC model offset at slice start */ | |
105 | u16 initial_offset; | |
106 | /* Thresholds defining each of the buffer ranges */ | |
107 | u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; | |
108 | /* Parameters for each of the RC ranges */ | |
109 | struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; | |
110 | /* Total size of RC model */ | |
111 | u16 rc_model_size; | |
112 | /* Minimum QP where flatness information is sent */ | |
113 | u8 flatness_min_qp; | |
114 | /* Maximum QP where flatness information is sent */ | |
115 | u8 flatness_max_qp; | |
116 | /* Initial value for scale factor */ | |
117 | u8 initial_scale_value; | |
118 | /* Decrement scale factor every scale_decrement_interval groups */ | |
119 | u16 scale_decrement_interval; | |
120 | /* Increment scale factor every scale_increment_interval groups */ | |
121 | u16 scale_increment_interval; | |
122 | /* Non-first line BPG offset to use */ | |
123 | u16 nfl_bpg_offset; | |
124 | /* BPG offset used to enforce slice bit */ | |
125 | u16 slice_bpg_offset; | |
126 | /* Final RC linear transformation offset value */ | |
127 | u16 final_offset; | |
128 | /* Enable on-off VBR (ie., disable stuffing bits) */ | |
129 | bool vbr_enable; | |
130 | /* Mux word size (in bits) for SSM mode */ | |
131 | u8 mux_word_size; | |
132 | /* | |
133 | * The (max) size in bytes of the "chunks" that are | |
134 | * used in slice multiplexing | |
135 | */ | |
136 | u16 slice_chunk_size; | |
137 | /* Rate Control buffer siz in bits */ | |
138 | u16 rc_bits; | |
139 | /* DSC Minor Version */ | |
140 | u8 dsc_version_minor; | |
141 | /* DSC Major version */ | |
142 | u8 dsc_version_major; | |
143 | /* Native 4:2:2 support */ | |
144 | bool native_422; | |
145 | /* Native 4:2:0 support */ | |
146 | bool native_420; | |
147 | /* Additional bits/grp for seconnd line of slice for native 4:2:0 */ | |
148 | u8 second_line_bpg_offset; | |
149 | /* Num of bits deallocated for each grp that is not in second line of slice */ | |
150 | u16 nsl_bpg_offset; | |
151 | /* Offset adj fr second line in Native 4:2:0 mode */ | |
152 | u16 second_line_offset_adj; | |
153 | }; | |
7c247c06 MN |
154 | |
155 | /** | |
156 | * struct picture_parameter_set - Represents 128 bytes of Picture Parameter Set | |
157 | * | |
158 | * The VESA DSC standard defines picture parameter set (PPS) which display | |
159 | * stream compression encoders must communicate to decoders. | |
160 | * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in | |
161 | * this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. | |
162 | * The PPS fields that span over more than a byte should be stored in Big Endian | |
163 | * format. | |
164 | */ | |
165 | struct drm_dsc_picture_parameter_set { | |
166 | /** | |
167 | * @dsc_version: | |
168 | * PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC | |
169 | * PPS0[7:4] - dsc_version_major: Contains major version of DSC | |
170 | */ | |
171 | u8 dsc_version; | |
172 | /** | |
173 | * @pps_identifier: | |
174 | * PPS1[7:0] - Application specific identifier that can be | |
175 | * used to differentiate between different PPS tables. | |
176 | */ | |
177 | u8 pps_identifier; | |
178 | /** | |
179 | * @pps_reserved: | |
180 | * PPS2[7:0]- RESERVED Byte | |
181 | */ | |
182 | u8 pps_reserved; | |
183 | /** | |
184 | * @pps_3: | |
185 | * PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to | |
186 | * generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, | |
187 | * 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, | |
188 | * 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. | |
189 | * PPS3[7:4] - bits_per_component: Bits per component for the original | |
190 | * pixels of the encoded picture. | |
191 | * 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) | |
192 | * 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also | |
193 | * allowed only when dsc_minor_version = 0x2) | |
194 | */ | |
195 | u8 pps_3; | |
196 | /** | |
197 | * @pps_4: | |
198 | * PPS4[1:0] -These are the most significant 2 bits of | |
199 | * compressed BPP bits_per_pixel[9:0] syntax element. | |
200 | * PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled | |
201 | * PPS4[3] - simple_422: Indicates if decoder drops samples to | |
202 | * reconstruct the 4:2:2 picture. | |
203 | * PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is | |
204 | * active. | |
205 | * PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any | |
206 | * groups in picture | |
207 | * PPS4[7:6] - Reseved bits | |
208 | */ | |
209 | u8 pps_4; | |
210 | /** | |
211 | * @bits_per_pixel_low: | |
212 | * PPS5[7:0] - This indicates the lower significant 8 bits of | |
213 | * the compressed BPP bits_per_pixel[9:0] element. | |
214 | */ | |
215 | u8 bits_per_pixel_low; | |
216 | /** | |
217 | * @pic_height: | |
218 | * PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows | |
219 | * within the raster. | |
220 | */ | |
221 | __be16 pic_height; | |
222 | /** | |
223 | * @pic_width: | |
224 | * PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within | |
225 | * the raster. | |
226 | */ | |
227 | __be16 pic_width; | |
228 | /** | |
229 | * @slice_height: | |
230 | * PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. | |
231 | */ | |
232 | __be16 slice_height; | |
233 | /** | |
234 | * @slice_width: | |
235 | * PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. | |
236 | */ | |
237 | __be16 slice_width; | |
238 | /** | |
239 | * @chunk_size: | |
240 | * PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks | |
241 | * that are used for slice multiplexing. | |
242 | */ | |
243 | __be16 chunk_size; | |
244 | /** | |
245 | * @initial_xmit_delay_high: | |
246 | * PPS16[1:0] - Most Significant two bits of initial transmission delay. | |
247 | * It specifies the number of pixel times that the encoder waits before | |
248 | * transmitting data from its rate buffer. | |
249 | * PPS16[7:2] - Reserved | |
250 | */ | |
251 | u8 initial_xmit_delay_high; | |
252 | /** | |
253 | * @initial_xmit_delay_low: | |
254 | * PPS17[7:0] - Least significant 8 bits of initial transmission delay. | |
255 | */ | |
256 | u8 initial_xmit_delay_low; | |
257 | /** | |
258 | * @initial_dec_delay: | |
259 | * | |
260 | * PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number | |
261 | * of pixel times that the decoder accumulates data in its rate buffer | |
262 | * before starting to decode and output pixels. | |
263 | */ | |
264 | __be16 initial_dec_delay; | |
265 | /** | |
266 | * @pps20_reserved: | |
267 | * | |
268 | * PPS20[7:0] - Reserved | |
269 | */ | |
270 | u8 pps20_reserved; | |
271 | /** | |
272 | * @initial_scale_value: | |
273 | * PPS21[5:0] - Initial rcXformScale factor used at beginning | |
274 | * of a slice. | |
275 | * PPS21[7:6] - Reserved | |
276 | */ | |
277 | u8 initial_scale_value; | |
278 | /** | |
279 | * @scale_increment_interval: | |
280 | * PPS22[7:0], PPS23[7:0] - Number of group times between incrementing | |
281 | * the rcXformScale factor at end of a slice. | |
282 | */ | |
283 | __be16 scale_increment_interval; | |
284 | /** | |
285 | * @scale_decrement_interval_high: | |
286 | * PPS24[3:0] - Higher 4 bits indicating number of group times between | |
287 | * decrementing the rcXformScale factor at beginning of a slice. | |
288 | * PPS24[7:4] - Reserved | |
289 | */ | |
290 | u8 scale_decrement_interval_high; | |
291 | /** | |
292 | * @scale_decrement_interval_low: | |
293 | * PPS25[7:0] - Lower 8 bits of scale decrement interval | |
294 | */ | |
295 | u8 scale_decrement_interval_low; | |
296 | /** | |
297 | * @pps26_reserved: | |
298 | * PPS26[7:0] | |
299 | */ | |
300 | u8 pps26_reserved; | |
301 | /** | |
302 | * @first_line_bpg_offset: | |
303 | * PPS27[4:0] - Number of additional bits that are allocated | |
304 | * for each group on first line of a slice. | |
305 | * PPS27[7:5] - Reserved | |
306 | */ | |
307 | u8 first_line_bpg_offset; | |
308 | /** | |
309 | * @nfl_bpg_offset: | |
310 | * PPS28[7:0], PPS29[7:0] - Number of bits including frac bits | |
311 | * deallocated for each group for groups after the first line of slice. | |
312 | */ | |
313 | __be16 nfl_bpg_offset; | |
314 | /** | |
315 | * @slice_bpg_offset: | |
316 | * PPS30, PPS31[7:0] - Number of bits that are deallocated for each | |
317 | * group to enforce the slice constraint. | |
318 | */ | |
319 | __be16 slice_bpg_offset; | |
320 | /** | |
321 | * @initial_offset: | |
322 | * PPS32,33[7:0] - Initial value for rcXformOffset | |
323 | */ | |
324 | __be16 initial_offset; | |
325 | /** | |
326 | * @final_offset: | |
327 | * PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset | |
328 | */ | |
329 | __be16 final_offset; | |
330 | /** | |
331 | * @flatness_min_qp: | |
332 | * PPS36[4:0] - Minimum QP at which flatness is signaled and | |
333 | * flatness QP adjustment is made. | |
334 | * PPS36[7:5] - Reserved | |
335 | */ | |
336 | u8 flatness_min_qp; | |
337 | /** | |
338 | * @flatness_max_qp: | |
339 | * PPS37[4:0] - Max QP at which flatness is signalled and | |
340 | * the flatness adjustment is made. | |
341 | * PPS37[7:5] - Reserved | |
342 | */ | |
343 | u8 flatness_max_qp; | |
344 | /** | |
345 | * @rc_model_size: | |
346 | * PPS38,39[7:0] - Number of bits within RC Model. | |
347 | */ | |
348 | __be16 rc_model_size; | |
349 | /** | |
350 | * @rc_edge_factor: | |
351 | * PPS40[3:0] - Ratio of current activity vs, previous | |
352 | * activity to determine presence of edge. | |
353 | * PPS40[7:4] - Reserved | |
354 | */ | |
355 | u8 rc_edge_factor; | |
356 | /** | |
357 | * @rc_quant_incr_limit0: | |
358 | * PPS41[4:0] - QP threshold used in short term RC | |
359 | * PPS41[7:5] - Reserved | |
360 | */ | |
361 | u8 rc_quant_incr_limit0; | |
362 | /** | |
363 | * @rc_quant_incr_limit1: | |
364 | * PPS42[4:0] - QP threshold used in short term RC | |
365 | * PPS42[7:5] - Reserved | |
366 | */ | |
367 | u8 rc_quant_incr_limit1; | |
368 | /** | |
369 | * @rc_tgt_offset: | |
370 | * PPS43[3:0] - Lower end of the variability range around the target | |
371 | * bits per group that is allowed by short term RC. | |
372 | * PPS43[7:4]- Upper end of the variability range around the target | |
373 | * bits per group that i allowed by short term rc. | |
374 | */ | |
375 | u8 rc_tgt_offset; | |
376 | /** | |
377 | * @rc_buf_thresh: | |
378 | * PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for | |
379 | * the 15 ranges defined by 14 thresholds. | |
380 | */ | |
381 | u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; | |
382 | /** | |
383 | * @rc_range_parameters: | |
384 | * PPS58[7:0] - PPS87[7:0] | |
385 | * Parameters that correspond to each of the 15 ranges. | |
386 | */ | |
387 | __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; | |
388 | /** | |
389 | * @native_422_420: | |
390 | * PPS88[0] - 0 = Native 4:2:2 not used | |
391 | * 1 = Native 4:2:2 used | |
392 | * PPS88[1] - 0 = Native 4:2:0 not use | |
393 | * 1 = Native 4:2:0 used | |
394 | * PPS88[7:2] - Reserved 6 bits | |
395 | */ | |
396 | u8 native_422_420; | |
397 | /** | |
398 | * @second_line_bpg_offset: | |
399 | * PPS89[4:0] - Additional bits/group budget for the | |
400 | * second line of a slice in Native 4:2:0 mode. | |
401 | * Set to 0 if DSC minor version is 1 or native420 is 0. | |
402 | * PPS89[7:5] - Reserved | |
403 | */ | |
404 | u8 second_line_bpg_offset; | |
405 | /** | |
406 | * @nsl_bpg_offset: | |
407 | * PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated | |
408 | * for each group that is not in the second line of a slice. | |
409 | */ | |
410 | __be16 nsl_bpg_offset; | |
411 | /** | |
412 | * @second_line_offset_adj: | |
413 | * PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second | |
414 | * line in Native 4:2:0 mode. | |
415 | */ | |
416 | __be16 second_line_offset_adj; | |
417 | /** | |
418 | * @pps_long_94_reserved: | |
419 | * PPS 94, 95, 96, 97 - Reserved | |
420 | */ | |
421 | u32 pps_long_94_reserved; | |
422 | /** | |
423 | * @pps_long_98_reserved: | |
424 | * PPS 98, 99, 100, 101 - Reserved | |
425 | */ | |
426 | u32 pps_long_98_reserved; | |
427 | /** | |
428 | * @pps_long_102_reserved: | |
429 | * PPS 102, 103, 104, 105 - Reserved | |
430 | */ | |
431 | u32 pps_long_102_reserved; | |
432 | /** | |
433 | * @pps_long_106_reserved: | |
434 | * PPS 106, 107, 108, 109 - reserved | |
435 | */ | |
436 | u32 pps_long_106_reserved; | |
437 | /** | |
438 | * @pps_long_110_reserved: | |
439 | * PPS 110, 111, 112, 113 - reserved | |
440 | */ | |
441 | u32 pps_long_110_reserved; | |
442 | /** | |
443 | * @pps_long_114_reserved: | |
444 | * PPS 114 - 117 - reserved | |
445 | */ | |
446 | u32 pps_long_114_reserved; | |
447 | /** | |
448 | * @pps_long_118_reserved: | |
449 | * PPS 118 - 121 - reserved | |
450 | */ | |
451 | u32 pps_long_118_reserved; | |
452 | /** | |
453 | * @pps_long_122_reserved: | |
454 | * PPS 122- 125 - reserved | |
455 | */ | |
456 | u32 pps_long_122_reserved; | |
457 | /** | |
458 | * @pps_short_126_reserved: | |
459 | * PPS 126, 127 - reserved | |
460 | */ | |
461 | __be16 pps_short_126_reserved; | |
462 | } __packed; | |
463 | ||
464 | /** | |
465 | * struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter | |
466 | * Set Metadata | |
467 | * | |
468 | * This structure represents the DSC PPS infoframe required to send the Picture | |
469 | * Parameter Set metadata required before enabling VESA Display Stream | |
470 | * Compression. This is based on the DP Secondary Data Packet structure and | |
471 | * comprises of SDP Header as defined in drm_dp_helper.h and PPS payload. | |
472 | * | |
473 | * @pps_header: Header for PPS as per DP SDP header format | |
474 | * @pps_payload: PPS payload fields as per DSC specification Table 4-1 | |
475 | */ | |
476 | struct drm_dsc_pps_infoframe { | |
477 | struct dp_sdp_header pps_header; | |
478 | struct drm_dsc_picture_parameter_set pps_payload; | |
479 | } __packed; | |
480 | ||
a408c857 MN |
481 | void drm_dsc_dp_pps_header_init(struct drm_dsc_pps_infoframe *pps_sdp); |
482 | void drm_dsc_pps_infoframe_pack(struct drm_dsc_pps_infoframe *pps_sdp, | |
483 | const struct drm_dsc_config *dsc_cfg); | |
484 | ||
7c247c06 | 485 | #endif /* _DRM_DSC_H_ */ |