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1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* | |
3 | * TI DaVinci clocksource driver | |
4 | * | |
5 | * Copyright (C) 2019 Texas Instruments | |
6 | * Author: Bartosz Golaszewski <bgolaszewski@baylibre.com> | |
7 | */ | |
8 | ||
9 | #ifndef __TIMER_DAVINCI_H__ | |
10 | #define __TIMER_DAVINCI_H__ | |
11 | ||
12 | #include <linux/clk.h> | |
13 | #include <linux/ioport.h> | |
14 | ||
15 | enum { | |
16 | DAVINCI_TIMER_CLOCKEVENT_IRQ, | |
17 | DAVINCI_TIMER_CLOCKSOURCE_IRQ, | |
18 | DAVINCI_TIMER_NUM_IRQS, | |
19 | }; | |
20 | ||
21 | /** | |
22 | * struct davinci_timer_cfg - davinci clocksource driver configuration struct | |
23 | * @reg: register range resource | |
24 | * @irq: clockevent and clocksource interrupt resources | |
25 | * @cmp_off: if set - it specifies the compare register used for clockevent | |
26 | * | |
27 | * Note: if the compare register is specified, the driver will use the bottom | |
28 | * clock half for both clocksource and clockevent and the compare register | |
29 | * to generate event irqs. The user must supply the correct compare register | |
30 | * interrupt number. | |
31 | * | |
32 | * This is only used by da830 the DSP of which uses the top half. The timer | |
33 | * driver still configures the top half to run in free-run mode. | |
34 | */ | |
35 | struct davinci_timer_cfg { | |
36 | struct resource reg; | |
37 | struct resource irq[DAVINCI_TIMER_NUM_IRQS]; | |
38 | unsigned int cmp_off; | |
39 | }; | |
40 | ||
41 | int __init davinci_timer_register(struct clk *clk, | |
42 | const struct davinci_timer_cfg *data); | |
43 | ||
44 | #endif /* __TIMER_DAVINCI_H__ */ |