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9a8fd558 CZ |
1 | /* |
2 | * linux/include/asm-xtensa/io.h | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | |
9 | */ | |
10 | ||
11 | #ifndef _XTENSA_IO_H | |
12 | #define _XTENSA_IO_H | |
13 | ||
14 | #ifdef __KERNEL__ | |
9a8fd558 CZ |
15 | #include <asm/byteorder.h> |
16 | ||
17 | #include <linux/types.h> | |
18 | #include <asm/fixmap.h> | |
19 | ||
20 | #define _IO_BASE 0 | |
21 | ||
22 | ||
23 | /* | |
24 | * swap functions to change byte order from little-endian to big-endian and | |
25 | * vice versa. | |
26 | */ | |
27 | ||
28 | static inline unsigned short _swapw (unsigned short v) | |
29 | { | |
30 | return (v << 8) | (v >> 8); | |
31 | } | |
32 | ||
33 | static inline unsigned int _swapl (unsigned int v) | |
34 | { | |
35 | return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24); | |
36 | } | |
37 | ||
38 | /* | |
39 | * Change virtual addresses to physical addresses and vv. | |
40 | * These are trivial on the 1:1 Linux/Xtensa mapping | |
41 | */ | |
42 | ||
d99cf715 | 43 | static inline unsigned long virt_to_phys(volatile void * address) |
9a8fd558 CZ |
44 | { |
45 | return PHYSADDR((unsigned long)address); | |
46 | } | |
47 | ||
d99cf715 | 48 | static inline void * phys_to_virt(unsigned long address) |
9a8fd558 CZ |
49 | { |
50 | return (void*) CACHED_ADDR(address); | |
51 | } | |
52 | ||
53 | /* | |
54 | * IO bus memory addresses are also 1:1 with the physical address | |
55 | */ | |
56 | ||
d99cf715 | 57 | static inline unsigned long virt_to_bus(volatile void * address) |
9a8fd558 CZ |
58 | { |
59 | return PHYSADDR((unsigned long)address); | |
60 | } | |
61 | ||
d99cf715 | 62 | static inline void * bus_to_virt (unsigned long address) |
9a8fd558 CZ |
63 | { |
64 | return (void *) CACHED_ADDR(address); | |
65 | } | |
66 | ||
67 | /* | |
68 | * Change "struct page" to physical address. | |
69 | */ | |
70 | ||
d99cf715 | 71 | static inline void *ioremap(unsigned long offset, unsigned long size) |
9a8fd558 CZ |
72 | { |
73 | return (void *) CACHED_ADDR_IO(offset); | |
74 | } | |
75 | ||
d99cf715 | 76 | static inline void *ioremap_nocache(unsigned long offset, unsigned long size) |
9a8fd558 CZ |
77 | { |
78 | return (void *) BYPASS_ADDR_IO(offset); | |
79 | } | |
80 | ||
d99cf715 | 81 | static inline void iounmap(void *addr) |
9a8fd558 CZ |
82 | { |
83 | } | |
84 | ||
85 | /* | |
86 | * Generic I/O | |
87 | */ | |
88 | ||
89 | #define readb(addr) \ | |
90 | ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) | |
91 | #define readw(addr) \ | |
92 | ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) | |
93 | #define readl(addr) \ | |
94 | ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) | |
95 | #define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b)) | |
96 | #define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b)) | |
97 | #define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b)) | |
98 | ||
99 | static inline __u8 __raw_readb(const volatile void __iomem *addr) | |
100 | { | |
101 | return *(__force volatile __u8 *)(addr); | |
102 | } | |
103 | static inline __u16 __raw_readw(const volatile void __iomem *addr) | |
104 | { | |
105 | return *(__force volatile __u16 *)(addr); | |
106 | } | |
107 | static inline __u32 __raw_readl(const volatile void __iomem *addr) | |
108 | { | |
109 | return *(__force volatile __u32 *)(addr); | |
110 | } | |
111 | static inline void __raw_writeb(__u8 b, volatile void __iomem *addr) | |
112 | { | |
113 | *(__force volatile __u8 *)(addr) = b; | |
114 | } | |
115 | static inline void __raw_writew(__u16 b, volatile void __iomem *addr) | |
116 | { | |
117 | *(__force volatile __u16 *)(addr) = b; | |
118 | } | |
119 | static inline void __raw_writel(__u32 b, volatile void __iomem *addr) | |
120 | { | |
121 | *(__force volatile __u32 *)(addr) = b; | |
122 | } | |
123 | ||
124 | ||
125 | ||
126 | ||
127 | /* These are the definitions for the x86 IO instructions | |
128 | * inb/inw/inl/outb/outw/outl, the "string" versions | |
129 | * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions | |
130 | * inb_p/inw_p/... | |
131 | * The macros don't do byte-swapping. | |
132 | */ | |
133 | ||
134 | #define inb(port) readb((u8 *)((port)+_IO_BASE)) | |
135 | #define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)+_IO_BASE)) | |
136 | #define inw(port) readw((u16 *)((port)+_IO_BASE)) | |
137 | #define outw(val, port) writew((val),(u16 *)((unsigned long)(port)+_IO_BASE)) | |
138 | #define inl(port) readl((u32 *)((port)+_IO_BASE)) | |
139 | #define outl(val, port) writel((val),(u32 *)((unsigned long)(port))) | |
140 | ||
141 | #define inb_p(port) inb((port)) | |
142 | #define outb_p(val, port) outb((val), (port)) | |
143 | #define inw_p(port) inw((port)) | |
144 | #define outw_p(val, port) outw((val), (port)) | |
145 | #define inl_p(port) inl((port)) | |
146 | #define outl_p(val, port) outl((val), (port)) | |
147 | ||
148 | extern void insb (unsigned long port, void *dst, unsigned long count); | |
149 | extern void insw (unsigned long port, void *dst, unsigned long count); | |
150 | extern void insl (unsigned long port, void *dst, unsigned long count); | |
151 | extern void outsb (unsigned long port, const void *src, unsigned long count); | |
152 | extern void outsw (unsigned long port, const void *src, unsigned long count); | |
153 | extern void outsl (unsigned long port, const void *src, unsigned long count); | |
154 | ||
155 | #define IO_SPACE_LIMIT ~0 | |
156 | ||
157 | #define memset_io(a,b,c) memset((void *)(a),(b),(c)) | |
158 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | |
159 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | |
160 | ||
161 | /* At this point the Xtensa doesn't provide byte swap instructions */ | |
162 | ||
163 | #ifdef __XTENSA_EB__ | |
164 | # define in_8(addr) (*(u8*)(addr)) | |
165 | # define in_le16(addr) _swapw(*(u16*)(addr)) | |
166 | # define in_le32(addr) _swapl(*(u32*)(addr)) | |
167 | # define out_8(b, addr) *(u8*)(addr) = (b) | |
168 | # define out_le16(b, addr) *(u16*)(addr) = _swapw(b) | |
169 | # define out_le32(b, addr) *(u32*)(addr) = _swapl(b) | |
170 | #elif defined(__XTENSA_EL__) | |
171 | # define in_8(addr) (*(u8*)(addr)) | |
172 | # define in_le16(addr) (*(u16*)(addr)) | |
173 | # define in_le32(addr) (*(u32*)(addr)) | |
174 | # define out_8(b, addr) *(u8*)(addr) = (b) | |
175 | # define out_le16(b, addr) *(u16*)(addr) = (b) | |
176 | # define out_le32(b, addr) *(u32*)(addr) = (b) | |
177 | #else | |
178 | # error processor byte order undefined! | |
179 | #endif | |
180 | ||
181 | ||
182 | /* | |
183 | * * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
184 | * * access | |
185 | * */ | |
186 | #define xlate_dev_mem_ptr(p) __va(p) | |
187 | ||
188 | /* | |
189 | * * Convert a virtual cached pointer to an uncached pointer | |
190 | * */ | |
191 | #define xlate_dev_kmem_ptr(p) p | |
192 | ||
193 | ||
194 | #endif /* __KERNEL__ */ | |
195 | ||
196 | #endif /* _XTENSA_IO_H */ |