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9a8fd558 CZ |
1 | /* |
2 | * include/asm-xtensa/atomic.h | |
3 | * | |
4 | * Atomic operations that C can't guarantee us. Useful for resource counting.. | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | * | |
10 | * Copyright (C) 2001 - 2005 Tensilica Inc. | |
11 | */ | |
12 | ||
13 | #ifndef _XTENSA_ATOMIC_H | |
14 | #define _XTENSA_ATOMIC_H | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/stringify.h> | |
18 | ||
19 | typedef struct { volatile int counter; } atomic_t; | |
20 | ||
21 | #ifdef __KERNEL__ | |
22 | #include <asm/processor.h> | |
23 | #include <asm/system.h> | |
24 | ||
288a60cf | 25 | #define ATOMIC_INIT(i) { (i) } |
9a8fd558 CZ |
26 | |
27 | /* | |
28 | * This Xtensa implementation assumes that the right mechanism | |
29 | * for exclusion is for locking interrupts to level 1. | |
30 | * | |
31 | * Locking interrupts looks like this: | |
32 | * | |
33 | * rsil a15, 1 | |
34 | * <code> | |
35 | * wsr a15, PS | |
36 | * rsync | |
37 | * | |
38 | * Note that a15 is used here because the register allocation | |
39 | * done by the compiler is not guaranteed and a window overflow | |
40 | * may not occur between the rsil and wsr instructions. By using | |
41 | * a15 in the rsil, the machine is guaranteed to be in a state | |
42 | * where no register reference will cause an overflow. | |
43 | */ | |
44 | ||
45 | /** | |
46 | * atomic_read - read atomic variable | |
47 | * @v: pointer of type atomic_t | |
48 | * | |
49 | * Atomically reads the value of @v. | |
50 | */ | |
51 | #define atomic_read(v) ((v)->counter) | |
52 | ||
53 | /** | |
54 | * atomic_set - set atomic variable | |
55 | * @v: pointer of type atomic_t | |
56 | * @i: required value | |
57 | * | |
58 | * Atomically sets the value of @v to @i. | |
59 | */ | |
60 | #define atomic_set(v,i) ((v)->counter = (i)) | |
61 | ||
62 | /** | |
63 | * atomic_add - add integer to atomic variable | |
64 | * @i: integer value to add | |
65 | * @v: pointer of type atomic_t | |
66 | * | |
67 | * Atomically adds @i to @v. | |
68 | */ | |
d99cf715 | 69 | static inline void atomic_add(int i, atomic_t * v) |
9a8fd558 CZ |
70 | { |
71 | unsigned int vval; | |
72 | ||
73 | __asm__ __volatile__( | |
74 | "rsil a15, "__stringify(LOCKLEVEL)"\n\t" | |
75 | "l32i %0, %2, 0 \n\t" | |
76 | "add %0, %0, %1 \n\t" | |
77 | "s32i %0, %2, 0 \n\t" | |
78 | "wsr a15, "__stringify(PS)" \n\t" | |
79 | "rsync \n" | |
80 | : "=&a" (vval) | |
81 | : "a" (i), "a" (v) | |
82 | : "a15", "memory" | |
83 | ); | |
84 | } | |
85 | ||
86 | /** | |
87 | * atomic_sub - subtract the atomic variable | |
88 | * @i: integer value to subtract | |
89 | * @v: pointer of type atomic_t | |
90 | * | |
91 | * Atomically subtracts @i from @v. | |
92 | */ | |
d99cf715 | 93 | static inline void atomic_sub(int i, atomic_t *v) |
9a8fd558 CZ |
94 | { |
95 | unsigned int vval; | |
96 | ||
97 | __asm__ __volatile__( | |
98 | "rsil a15, "__stringify(LOCKLEVEL)"\n\t" | |
99 | "l32i %0, %2, 0 \n\t" | |
100 | "sub %0, %0, %1 \n\t" | |
101 | "s32i %0, %2, 0 \n\t" | |
102 | "wsr a15, "__stringify(PS)" \n\t" | |
103 | "rsync \n" | |
104 | : "=&a" (vval) | |
105 | : "a" (i), "a" (v) | |
106 | : "a15", "memory" | |
107 | ); | |
108 | } | |
109 | ||
110 | /* | |
111 | * We use atomic_{add|sub}_return to define other functions. | |
112 | */ | |
113 | ||
d99cf715 | 114 | static inline int atomic_add_return(int i, atomic_t * v) |
9a8fd558 CZ |
115 | { |
116 | unsigned int vval; | |
117 | ||
118 | __asm__ __volatile__( | |
119 | "rsil a15,"__stringify(LOCKLEVEL)"\n\t" | |
120 | "l32i %0, %2, 0 \n\t" | |
121 | "add %0, %0, %1 \n\t" | |
122 | "s32i %0, %2, 0 \n\t" | |
123 | "wsr a15, "__stringify(PS)" \n\t" | |
124 | "rsync \n" | |
125 | : "=&a" (vval) | |
126 | : "a" (i), "a" (v) | |
127 | : "a15", "memory" | |
128 | ); | |
129 | ||
130 | return vval; | |
131 | } | |
132 | ||
d99cf715 | 133 | static inline int atomic_sub_return(int i, atomic_t * v) |
9a8fd558 CZ |
134 | { |
135 | unsigned int vval; | |
136 | ||
137 | __asm__ __volatile__( | |
138 | "rsil a15,"__stringify(LOCKLEVEL)"\n\t" | |
139 | "l32i %0, %2, 0 \n\t" | |
140 | "sub %0, %0, %1 \n\t" | |
141 | "s32i %0, %2, 0 \n\t" | |
142 | "wsr a15, "__stringify(PS)" \n\t" | |
143 | "rsync \n" | |
144 | : "=&a" (vval) | |
145 | : "a" (i), "a" (v) | |
146 | : "a15", "memory" | |
147 | ); | |
148 | ||
149 | return vval; | |
150 | } | |
151 | ||
152 | /** | |
153 | * atomic_sub_and_test - subtract value from variable and test result | |
154 | * @i: integer value to subtract | |
155 | * @v: pointer of type atomic_t | |
156 | * | |
157 | * Atomically subtracts @i from @v and returns | |
158 | * true if the result is zero, or false for all | |
159 | * other cases. | |
160 | */ | |
161 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0) | |
162 | ||
163 | /** | |
164 | * atomic_inc - increment atomic variable | |
165 | * @v: pointer of type atomic_t | |
166 | * | |
167 | * Atomically increments @v by 1. | |
168 | */ | |
169 | #define atomic_inc(v) atomic_add(1,(v)) | |
170 | ||
171 | /** | |
172 | * atomic_inc - increment atomic variable | |
173 | * @v: pointer of type atomic_t | |
174 | * | |
175 | * Atomically increments @v by 1. | |
176 | */ | |
177 | #define atomic_inc_return(v) atomic_add_return(1,(v)) | |
178 | ||
179 | /** | |
180 | * atomic_dec - decrement atomic variable | |
181 | * @v: pointer of type atomic_t | |
182 | * | |
183 | * Atomically decrements @v by 1. | |
184 | */ | |
185 | #define atomic_dec(v) atomic_sub(1,(v)) | |
186 | ||
187 | /** | |
188 | * atomic_dec_return - decrement atomic variable | |
189 | * @v: pointer of type atomic_t | |
190 | * | |
191 | * Atomically decrements @v by 1. | |
192 | */ | |
193 | #define atomic_dec_return(v) atomic_sub_return(1,(v)) | |
194 | ||
195 | /** | |
196 | * atomic_dec_and_test - decrement and test | |
197 | * @v: pointer of type atomic_t | |
198 | * | |
199 | * Atomically decrements @v by 1 and | |
200 | * returns true if the result is 0, or false for all other | |
201 | * cases. | |
202 | */ | |
203 | #define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0) | |
204 | ||
205 | /** | |
206 | * atomic_inc_and_test - increment and test | |
207 | * @v: pointer of type atomic_t | |
208 | * | |
209 | * Atomically increments @v by 1 | |
210 | * and returns true if the result is zero, or false for all | |
211 | * other cases. | |
212 | */ | |
213 | #define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0) | |
214 | ||
215 | /** | |
216 | * atomic_add_negative - add and test if negative | |
217 | * @v: pointer of type atomic_t | |
218 | * @i: integer value to add | |
219 | * | |
220 | * Atomically adds @i to @v and returns true | |
221 | * if the result is negative, or false when | |
222 | * result is greater than or equal to zero. | |
223 | */ | |
224 | #define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) | |
225 | ||
4a6dae6d | 226 | #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) |
ffbf670f | 227 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) |
9a8fd558 | 228 | |
8426e1f6 NP |
229 | /** |
230 | * atomic_add_unless - add unless the number is a given value | |
231 | * @v: pointer of type atomic_t | |
232 | * @a: the amount to add to v... | |
233 | * @u: ...unless v is equal to u. | |
234 | * | |
235 | * Atomically adds @a to @v, so long as it was not @u. | |
236 | * Returns non-zero if @v was not @u, and zero otherwise. | |
237 | */ | |
238 | #define atomic_add_unless(v, a, u) \ | |
239 | ({ \ | |
240 | int c, old; \ | |
241 | c = atomic_read(v); \ | |
242 | while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ | |
243 | c = old; \ | |
244 | c != (u); \ | |
245 | }) | |
246 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | |
247 | ||
d99cf715 | 248 | static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) |
9a8fd558 CZ |
249 | { |
250 | unsigned int all_f = -1; | |
251 | unsigned int vval; | |
252 | ||
253 | __asm__ __volatile__( | |
254 | "rsil a15,"__stringify(LOCKLEVEL)"\n\t" | |
255 | "l32i %0, %2, 0 \n\t" | |
256 | "xor %1, %4, %3 \n\t" | |
257 | "and %0, %0, %4 \n\t" | |
258 | "s32i %0, %2, 0 \n\t" | |
259 | "wsr a15, "__stringify(PS)" \n\t" | |
260 | "rsync \n" | |
261 | : "=&a" (vval), "=a" (mask) | |
262 | : "a" (v), "a" (all_f), "1" (mask) | |
263 | : "a15", "memory" | |
264 | ); | |
265 | } | |
266 | ||
d99cf715 | 267 | static inline void atomic_set_mask(unsigned int mask, atomic_t *v) |
9a8fd558 CZ |
268 | { |
269 | unsigned int vval; | |
270 | ||
271 | __asm__ __volatile__( | |
272 | "rsil a15,"__stringify(LOCKLEVEL)"\n\t" | |
273 | "l32i %0, %2, 0 \n\t" | |
274 | "or %0, %0, %1 \n\t" | |
275 | "s32i %0, %2, 0 \n\t" | |
276 | "wsr a15, "__stringify(PS)" \n\t" | |
277 | "rsync \n" | |
278 | : "=&a" (vval) | |
279 | : "a" (mask), "a" (v) | |
280 | : "a15", "memory" | |
281 | ); | |
282 | } | |
283 | ||
284 | /* Atomic operations are already serializing */ | |
285 | #define smp_mb__before_atomic_dec() barrier() | |
286 | #define smp_mb__after_atomic_dec() barrier() | |
287 | #define smp_mb__before_atomic_inc() barrier() | |
288 | #define smp_mb__after_atomic_inc() barrier() | |
289 | ||
d3cb4871 | 290 | #include <asm-generic/atomic.h> |
9a8fd558 CZ |
291 | #endif /* __KERNEL__ */ |
292 | ||
293 | #endif /* _XTENSA_ATOMIC_H */ | |
294 |