[PATCH] fix potential stack overflow in mm/slab.c
[linux-2.6-block.git] / include / asm-x86_64 / pgtable.h
CommitLineData
1da177e4
LT
1#ifndef _X86_64_PGTABLE_H
2#define _X86_64_PGTABLE_H
3
4/*
5 * This file contains the functions and defines necessary to modify and use
6 * the x86-64 page table tree.
7 */
8#include <asm/processor.h>
9#include <asm/fixmap.h>
10#include <asm/bitops.h>
11#include <linux/threads.h>
12#include <asm/pda.h>
13
14extern pud_t level3_kernel_pgt[512];
15extern pud_t level3_physmem_pgt[512];
16extern pud_t level3_ident_pgt[512];
17extern pmd_t level2_kernel_pgt[512];
18extern pgd_t init_level4_pgt[];
f6c2e333 19extern pgd_t boot_level4_pgt[];
1da177e4
LT
20extern unsigned long __supported_pte_mask;
21
22#define swapper_pg_dir init_level4_pgt
23
24extern int nonx_setup(char *str);
25extern void paging_init(void);
26extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
27
28extern unsigned long pgkern_mask;
29
30/*
31 * ZERO_PAGE is a global shared page that is always zero: used
32 * for zero-mapped memory areas etc..
33 */
34extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
35#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
36
37/*
38 * PGDIR_SHIFT determines what a top-level page table entry can map
39 */
40#define PGDIR_SHIFT 39
41#define PTRS_PER_PGD 512
42
43/*
44 * 3rd level page
45 */
46#define PUD_SHIFT 30
47#define PTRS_PER_PUD 512
48
49/*
50 * PMD_SHIFT determines the size of the area a middle-level
51 * page table can map
52 */
53#define PMD_SHIFT 21
54#define PTRS_PER_PMD 512
55
56/*
57 * entries per page directory level
58 */
59#define PTRS_PER_PTE 512
60
61#define pte_ERROR(e) \
62 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
63#define pmd_ERROR(e) \
64 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
65#define pud_ERROR(e) \
66 printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
67#define pgd_ERROR(e) \
68 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
69
70#define pgd_none(x) (!pgd_val(x))
71#define pud_none(x) (!pud_val(x))
72
73static inline void set_pte(pte_t *dst, pte_t val)
74{
75 pte_val(*dst) = pte_val(val);
76}
77#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
78
79static inline void set_pmd(pmd_t *dst, pmd_t val)
80{
81 pmd_val(*dst) = pmd_val(val);
82}
83
84static inline void set_pud(pud_t *dst, pud_t val)
85{
86 pud_val(*dst) = pud_val(val);
87}
88
9c0aa0f9 89static inline void pud_clear (pud_t *pud)
1da177e4
LT
90{
91 set_pud(pud, __pud(0));
92}
93
94static inline void set_pgd(pgd_t *dst, pgd_t val)
95{
96 pgd_val(*dst) = pgd_val(val);
97}
98
9c0aa0f9 99static inline void pgd_clear (pgd_t * pgd)
1da177e4
LT
100{
101 set_pgd(pgd, __pgd(0));
102}
103
104#define pud_page(pud) \
105((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
106
107#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
61e06037 108
8c65b4a6
TS
109struct mm_struct;
110
61e06037
ZA
111static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
112{
113 pte_t pte;
114 if (full) {
115 pte = *ptep;
116 *ptep = __pte(0);
117 } else {
118 pte = ptep_get_and_clear(mm, addr, ptep);
119 }
120 return pte;
121}
122
1da177e4
LT
123#define pte_same(a, b) ((a).pte == (b).pte)
124
c728252c
AV
125#define pte_pgprot(a) (__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))
126
1da177e4
LT
127#define PMD_SIZE (1UL << PMD_SHIFT)
128#define PMD_MASK (~(PMD_SIZE-1))
129#define PUD_SIZE (1UL << PUD_SHIFT)
130#define PUD_MASK (~(PUD_SIZE-1))
131#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
132#define PGDIR_MASK (~(PGDIR_SIZE-1))
133
f83f2b5f 134#define USER_PTRS_PER_PGD ((TASK_SIZE-1)/PGDIR_SIZE+1)
d455a369 135#define FIRST_USER_ADDRESS 0
1da177e4
LT
136
137#ifndef __ASSEMBLY__
138#define MAXMEM 0x3fffffffffffUL
139#define VMALLOC_START 0xffffc20000000000UL
140#define VMALLOC_END 0xffffe1ffffffffffUL
141#define MODULES_VADDR 0xffffffff88000000UL
142#define MODULES_END 0xfffffffffff00000UL
143#define MODULES_LEN (MODULES_END - MODULES_VADDR)
144
145#define _PAGE_BIT_PRESENT 0
146#define _PAGE_BIT_RW 1
147#define _PAGE_BIT_USER 2
148#define _PAGE_BIT_PWT 3
149#define _PAGE_BIT_PCD 4
150#define _PAGE_BIT_ACCESSED 5
151#define _PAGE_BIT_DIRTY 6
152#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
153#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
154#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
155
156#define _PAGE_PRESENT 0x001
157#define _PAGE_RW 0x002
158#define _PAGE_USER 0x004
159#define _PAGE_PWT 0x008
160#define _PAGE_PCD 0x010
161#define _PAGE_ACCESSED 0x020
162#define _PAGE_DIRTY 0x040
163#define _PAGE_PSE 0x080 /* 2MB page */
9b4ee40e 164#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
1da177e4
LT
165#define _PAGE_GLOBAL 0x100 /* Global TLB entry */
166
167#define _PAGE_PROTNONE 0x080 /* If not present */
168#define _PAGE_NX (1UL<<_PAGE_BIT_NX)
169
170#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
171#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
172
173#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
174
175#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
176#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
177#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
178#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
179#define PAGE_COPY PAGE_COPY_NOEXEC
180#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
181#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
182#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
183#define __PAGE_KERNEL \
184 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
185#define __PAGE_KERNEL_EXEC \
186 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
187#define __PAGE_KERNEL_NOCACHE \
188 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_ACCESSED | _PAGE_NX)
189#define __PAGE_KERNEL_RO \
190 (_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
191#define __PAGE_KERNEL_VSYSCALL \
192 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
193#define __PAGE_KERNEL_VSYSCALL_NOCACHE \
194 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD)
195#define __PAGE_KERNEL_LARGE \
196 (__PAGE_KERNEL | _PAGE_PSE)
8bf27556
EB
197#define __PAGE_KERNEL_LARGE_EXEC \
198 (__PAGE_KERNEL_EXEC | _PAGE_PSE)
1da177e4
LT
199
200#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
201
202#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
203#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
204#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
205#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
206#define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
207#define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
208#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
209#define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
210
211/* xwr */
212#define __P000 PAGE_NONE
213#define __P001 PAGE_READONLY
214#define __P010 PAGE_COPY
215#define __P011 PAGE_COPY
216#define __P100 PAGE_READONLY_EXEC
217#define __P101 PAGE_READONLY_EXEC
218#define __P110 PAGE_COPY_EXEC
219#define __P111 PAGE_COPY_EXEC
220
221#define __S000 PAGE_NONE
222#define __S001 PAGE_READONLY
223#define __S010 PAGE_SHARED
224#define __S011 PAGE_SHARED
225#define __S100 PAGE_READONLY_EXEC
226#define __S101 PAGE_READONLY_EXEC
227#define __S110 PAGE_SHARED_EXEC
228#define __S111 PAGE_SHARED_EXEC
229
230static inline unsigned long pgd_bad(pgd_t pgd)
231{
232 unsigned long val = pgd_val(pgd);
233 val &= ~PTE_MASK;
234 val &= ~(_PAGE_USER | _PAGE_DIRTY);
235 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
236}
237
238static inline unsigned long pud_bad(pud_t pud)
239{
240 unsigned long val = pud_val(pud);
241 val &= ~PTE_MASK;
242 val &= ~(_PAGE_USER | _PAGE_DIRTY);
243 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
244}
245
246#define pte_none(x) (!pte_val(x))
247#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
248#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
249
250#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this
251 right? */
252#define pte_page(x) pfn_to_page(pte_pfn(x))
6b75aeed 253#define pte_pfn(x) ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
1da177e4
LT
254
255static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
256{
257 pte_t pte;
258 pte_val(pte) = (page_nr << PAGE_SHIFT);
259 pte_val(pte) |= pgprot_val(pgprot);
260 pte_val(pte) &= __supported_pte_mask;
261 return pte;
262}
263
264/*
265 * The following only work if pte_present() is true.
266 * Undefined behaviour if not..
267 */
32e51a8c 268#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
1da177e4 269static inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
4839057c
AB
270static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
271static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
272static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
273static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
274static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
1da177e4 275static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
8f860591 276static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_PSE; }
1da177e4 277
4839057c
AB
278static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
279static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
280static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
281static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
282static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
283static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
284static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
285static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
286static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
287static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
8f860591 288static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
1da177e4
LT
289
290struct vm_area_struct;
291
292static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
293{
294 if (!pte_dirty(*ptep))
295 return 0;
3d1712c9 296 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
1da177e4
LT
297}
298
299static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
300{
301 if (!pte_young(*ptep))
302 return 0;
3d1712c9 303 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
1da177e4
LT
304}
305
306static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
307{
3d1712c9 308 clear_bit(_PAGE_BIT_RW, &ptep->pte);
1da177e4
LT
309}
310
311/*
312 * Macro to mark a page protection value as "uncacheable".
313 */
314#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
315
1da177e4
LT
316static inline int pmd_large(pmd_t pte) {
317 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
318}
319
320
321/*
322 * Conversion functions: convert a page and protection to a page entry,
323 * and a page entry and page directory to the page they refer to.
324 */
325
1da177e4
LT
326/*
327 * Level 4 access.
328 */
329#define pgd_page(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
330#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
331#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
332#define pgd_offset_k(address) (init_level4_pgt + pgd_index(address))
333#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
334#define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE })
335
336/* PUD - Level3 access */
337/* to find an entry in a page-table-directory. */
338#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
339#define pud_offset(pgd, address) ((pud_t *) pgd_page(*(pgd)) + pud_index(address))
1da177e4
LT
340#define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
341
1da177e4
LT
342/* PMD - Level 2 access */
343#define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
344#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
345
346#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
347#define pmd_offset(dir, address) ((pmd_t *) pud_page(*(dir)) + \
348 pmd_index(address))
349#define pmd_none(x) (!pmd_val(x))
350#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
351#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
352#define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE )
353#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
6b75aeed 354#define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
1da177e4
LT
355
356#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
357#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
358#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
359
360/* PTE - Level 1 access. */
361
362/* page, protection -> pte */
363#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
364#define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
365
366/* physical address -> PTE */
367static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
368{
369 pte_t pte;
370 pte_val(pte) = physpage | pgprot_val(pgprot);
371 return pte;
372}
373
374/* Change flags of a PTE */
9c0aa0f9 375static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4
LT
376{
377 pte_val(pte) &= _PAGE_CHG_MASK;
378 pte_val(pte) |= pgprot_val(newprot);
379 pte_val(pte) &= __supported_pte_mask;
380 return pte;
381}
382
383#define pte_index(address) \
1294b118 384 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
1da177e4
LT
385#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_kernel(*(dir)) + \
386 pte_index(address))
387
388/* x86-64 always has all page tables mapped. */
389#define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
390#define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
391#define pte_unmap(pte) /* NOP */
392#define pte_unmap_nested(pte) /* NOP */
393
394#define update_mmu_cache(vma,address,pte) do { } while (0)
395
396/* We only update the dirty/accessed state if we set
397 * the dirty bit by hand in the kernel, since the hardware
398 * will do the accessed bit for us, and we don't want to
399 * race with other CPU's that might be updating the dirty
400 * bit at the same time. */
401#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
402#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
403 do { \
404 if (__dirty) { \
405 set_pte(__ptep, __entry); \
406 flush_tlb_page(__vma, __address); \
407 } \
408 } while (0)
409
410/* Encode and de-code a swap entry */
411#define __swp_type(x) (((x).val >> 1) & 0x3f)
412#define __swp_offset(x) ((x).val >> 8)
413#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
414#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
415#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
416
8c914cb7
JB
417extern spinlock_t pgd_lock;
418extern struct page *pgd_list;
419void vmalloc_sync_all(void);
420
1da177e4
LT
421#endif /* !__ASSEMBLY__ */
422
423extern int kern_addr_valid(unsigned long addr);
424
1da177e4
LT
425#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
426 remap_pfn_range(vma, vaddr, pfn, size, prot)
427
428#define MK_IOSPACE_PFN(space, pfn) (pfn)
429#define GET_IOSPACE(pfn) 0
430#define GET_PFN(pfn) (pfn)
431
432#define HAVE_ARCH_UNMAPPED_AREA
433
434#define pgtable_cache_init() do { } while (0)
435#define check_pgt_cache() do { } while (0)
436
437#define PAGE_AGP PAGE_KERNEL_NOCACHE
438#define HAVE_PAGE_AGP 1
439
440/* fs/proc/kcore.c */
441#define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
442#define kc_offset_to_vaddr(o) \
443 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
444
445#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
446#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
447#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
61e06037 448#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1da177e4
LT
449#define __HAVE_ARCH_PTEP_SET_WRPROTECT
450#define __HAVE_ARCH_PTE_SAME
451#include <asm-generic/pgtable.h>
452
453#endif /* _X86_64_PGTABLE_H */