[linux-2.6-block.git] / include / asm-x86_64 / apic.h

#ifndef __ASM_APIC_H
#define __ASM_APIC_H

#include <linux/pm.h>
#include <asm/fixmap.h>
#include <asm/apicdef.h>
#include <asm/system.h>

#define Dprintk(x...)

/*
 * Debugging macros
 */
#define APIC_QUIET   0
#define APIC_VERBOSE 1
#define APIC_DEBUG   2

extern int apic_verbosity;
extern int apic_runs_main_timer;
extern int ioapic_force;
extern int apic_mapped;

/*
 * Define the default level of output to be very little
 * This can be turned up by using apic=verbose for more
 * information and apic=debug for _lots_ of information.
 * apic_verbosity is defined in apic.c
 */
#define apic_printk(v, s, a...) do {       \
		if ((v) <= apic_verbosity) \
			printk(s, ##a);    \
	} while (0)

struct pt_regs;

/*
 * Basic functions accessing APICs.
 */

static __inline void apic_write(unsigned long reg, unsigned int v)
{
	*((volatile unsigned int *)(APIC_BASE+reg)) = v;
}

static __inline unsigned int apic_read(unsigned long reg)
{
	return *((volatile unsigned int *)(APIC_BASE+reg));
}

static __inline__ void apic_wait_icr_idle(void)
{
	while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
		cpu_relax();
}

static inline void ack_APIC_irq(void)
{
	/*
	 * ack_APIC_irq() actually gets compiled as a single instruction:
	 * - a single rmw on Pentium/82489DX
	 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
	 * ... yummie.
	 */

	/* Docs say use 0 for future compatibility */
	apic_write(APIC_EOI, 0);
}

extern int get_maxlvt (void);
extern void clear_local_APIC (void);
extern void connect_bsp_APIC (void);
extern void disconnect_bsp_APIC (int virt_wire_setup);
extern void disable_local_APIC (void);
extern int verify_local_APIC (void);
extern void cache_APIC_registers (void);
extern void sync_Arb_IDs (void);
extern void init_bsp_APIC (void);
extern void setup_local_APIC (void);
extern void init_apic_mappings (void);
extern void smp_local_timer_interrupt (void);
extern void setup_boot_APIC_clock (void);
extern void setup_secondary_APIC_clock (void);
extern int APIC_init_uniprocessor (void);
extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
extern void clustered_apic_check(void);

extern void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
				   unsigned char msg_type, unsigned char mask);

#define K8_APIC_EXT_LVT_BASE    0x500
#define K8_APIC_EXT_INT_MSG_FIX 0x0
#define K8_APIC_EXT_INT_MSG_SMI 0x2
#define K8_APIC_EXT_INT_MSG_NMI 0x4
#define K8_APIC_EXT_INT_MSG_EXT 0x7
#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD    0

void smp_send_timer_broadcast_ipi(void);
void switch_APIC_timer_to_ipi(void *cpumask);
void switch_ipi_to_APIC_timer(void *cpumask);

#define ARCH_APICTIMER_STOPS_ON_C3	1

extern unsigned boot_cpu_id;

#endif /* __ASM_APIC_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_APIC_H
	2	#define __ASM_APIC_H
	3
1da177e4 LT	4	#include <linux/pm.h>
	5	#include <asm/fixmap.h>
	6	#include <asm/apicdef.h>
	7	#include <asm/system.h>
	8
	9	#define Dprintk(x...)
	10
	11	/*
	12	* Debugging macros
	13	*/
	14	#define APIC_QUIET 0
	15	#define APIC_VERBOSE 1
	16	#define APIC_DEBUG 2
	17
	18	extern int apic_verbosity;
73dea47f	19	extern int apic_runs_main_timer;
2c8c0e6b	20	extern int ioapic_force;
b7f5e3c7	21	extern int apic_mapped;
1da177e4 LT	22
	23	/*
	24	* Define the default level of output to be very little
	25	* This can be turned up by using apic=verbose for more
	26	* information and apic=debug for _lots_ of information.
	27	* apic_verbosity is defined in apic.c
	28	*/
	29	#define apic_printk(v, s, a...) do { \
	30	if ((v) <= apic_verbosity) \
	31	printk(s, ##a); \
	32	} while (0)
	33
1da177e4 LT	34	struct pt_regs;
	35
	36	/*
	37	* Basic functions accessing APICs.
	38	*/
	39
	40	static __inline void apic_write(unsigned long reg, unsigned int v)
	41	{
	42	((volatile unsigned int )(APIC_BASE+reg)) = v;
	43	}
	44
1da177e4 LT	45	static __inline unsigned int apic_read(unsigned long reg)
	46	{
	47	return ((volatile unsigned int )(APIC_BASE+reg));
	48	}
	49
	50	static __inline__ void apic_wait_icr_idle(void)
	51	{
899ced0d AM	52	while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
899ced0d AM	53	cpu_relax();
1da177e4 LT	54	}
1da177e4 LT	55
1da177e4 LT	56	static inline void ack_APIC_irq(void)
	57	{
	58	/*
	59	* ack_APIC_irq() actually gets compiled as a single instruction:
	60	* - a single rmw on Pentium/82489DX
	61	* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
	62	* ... yummie.
	63	*/
	64
	65	/* Docs say use 0 for future compatibility */
11a8e778	66	apic_write(APIC_EOI, 0);
1da177e4 LT	67	}
	68
	69	extern int get_maxlvt (void);
	70	extern void clear_local_APIC (void);
	71	extern void connect_bsp_APIC (void);
208fb931	72	extern void disconnect_bsp_APIC (int virt_wire_setup);
1da177e4 LT	73	extern void disable_local_APIC (void);
	74	extern int verify_local_APIC (void);
	75	extern void cache_APIC_registers (void);
	76	extern void sync_Arb_IDs (void);
	77	extern void init_bsp_APIC (void);
	78	extern void setup_local_APIC (void);
	79	extern void init_apic_mappings (void);
7d12e780	80	extern void smp_local_timer_interrupt (void);
1da177e4 LT	81	extern void setup_boot_APIC_clock (void);
1da177e4 LT	82	extern void setup_secondary_APIC_clock (void);
1da177e4 LT	83	extern int APIC_init_uniprocessor (void);
	84	extern void disable_APIC_timer(void);
	85	extern void enable_APIC_timer(void);
	86	extern void clustered_apic_check(void);
	87
17fc14ff JS	88	extern void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
	89	unsigned char msg_type, unsigned char mask);
	90
	91	#define K8_APIC_EXT_LVT_BASE 0x500
	92	#define K8_APIC_EXT_INT_MSG_FIX 0x0
	93	#define K8_APIC_EXT_INT_MSG_SMI 0x2
	94	#define K8_APIC_EXT_INT_MSG_NMI 0x4
	95	#define K8_APIC_EXT_INT_MSG_EXT 0x7
	96	#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0
	97
d25bf7e5 VP	98	void smp_send_timer_broadcast_ipi(void);
	99	void switch_APIC_timer_to_ipi(void *cpumask);
	100	void switch_ipi_to_APIC_timer(void *cpumask);
	101
	102	#define ARCH_APICTIMER_STOPS_ON_C3 1
	103
1da177e4 LT	104	extern unsigned boot_cpu_id;
	105
	106	#endif /* __ASM_APIC_H */