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1812924b CW |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * SGI UV Broadcast Assist Unit definitions | |
7 | * | |
8 | * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. | |
9 | */ | |
10 | ||
77ef50a5 VN |
11 | #ifndef ASM_X86__UV__UV_BAU_H |
12 | #define ASM_X86__UV__UV_BAU_H | |
1812924b CW |
13 | |
14 | #include <linux/bitmap.h> | |
15 | #define BITSPERBYTE 8 | |
16 | ||
1812924b | 17 | /* |
b194b120 CW |
18 | * Broadcast Assist Unit messaging structures |
19 | * | |
1812924b CW |
20 | * Selective Broadcast activations are induced by software action |
21 | * specifying a particular 8-descriptor "set" via a 6-bit index written | |
22 | * to an MMR. | |
23 | * Thus there are 64 unique 512-byte sets of SB descriptors - one set for | |
24 | * each 6-bit index value. These descriptor sets are mapped in sequence | |
25 | * starting with set 0 located at the address specified in the | |
26 | * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512, | |
27 | * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on. | |
28 | * | |
29 | * We will use 31 sets, one for sending BAU messages from each of the 32 | |
30 | * cpu's on the node. | |
31 | * | |
32 | * TLB shootdown will use the first of the 8 descriptors of each set. | |
33 | * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set). | |
34 | */ | |
35 | ||
b194b120 CW |
36 | #define UV_ITEMS_PER_DESCRIPTOR 8 |
37 | #define UV_CPUS_PER_ACT_STATUS 32 | |
38 | #define UV_ACT_STATUS_MASK 0x3 | |
39 | #define UV_ACT_STATUS_SIZE 2 | |
40 | #define UV_ACTIVATION_DESCRIPTOR_SIZE 32 | |
41 | #define UV_DISTRIBUTION_SIZE 256 | |
42 | #define UV_SW_ACK_NPENDING 8 | |
b194b120 CW |
43 | #define UV_NET_ENDPOINT_INTD 0x38 |
44 | #define UV_DESC_BASE_PNODE_SHIFT 49 | |
45 | #define UV_PAYLOADQ_PNODE_SHIFT 49 | |
46 | #define UV_PTC_BASENAME "sgi_uv/ptc_statistics" | |
47 | #define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask)) | |
48 | ||
49 | /* | |
50 | * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1 | |
51 | */ | |
dc163a41 IM |
52 | #define DESC_STATUS_IDLE 0 |
53 | #define DESC_STATUS_ACTIVE 1 | |
54 | #define DESC_STATUS_DESTINATION_TIMEOUT 2 | |
55 | #define DESC_STATUS_SOURCE_TIMEOUT 3 | |
1812924b | 56 | |
b194b120 CW |
57 | /* |
58 | * source side threshholds at which message retries print a warning | |
59 | */ | |
dc163a41 IM |
60 | #define SOURCE_TIMEOUT_LIMIT 20 |
61 | #define DESTINATION_TIMEOUT_LIMIT 20 | |
1812924b | 62 | |
b194b120 CW |
63 | /* |
64 | * number of entries in the destination side payload queue | |
65 | */ | |
dc163a41 | 66 | #define DEST_Q_SIZE 17 |
b194b120 CW |
67 | /* |
68 | * number of destination side software ack resources | |
69 | */ | |
dc163a41 | 70 | #define DEST_NUM_RESOURCES 8 |
1812924b | 71 | #define MAX_CPUS_PER_NODE 32 |
b194b120 CW |
72 | /* |
73 | * completion statuses for sending a TLB flush message | |
74 | */ | |
75 | #define FLUSH_RETRY 1 | |
76 | #define FLUSH_GIVEUP 2 | |
77 | #define FLUSH_COMPLETE 3 | |
1812924b | 78 | |
b194b120 CW |
79 | /* |
80 | * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor) | |
81 | * If the 'multilevel' flag in the header portion of the descriptor | |
1812924b CW |
82 | * has been set to 0, then endpoint multi-unicast mode is selected. |
83 | * The distribution specification (32 bytes) is interpreted as a 256-bit | |
84 | * distribution vector. Adjacent bits correspond to consecutive even numbered | |
85 | * nodeIDs. The result of adding the index of a given bit to the 15-bit | |
86 | * 'base_dest_nodeid' field of the header corresponds to the | |
b194b120 CW |
87 | * destination nodeID associated with that specified bit. |
88 | */ | |
1812924b CW |
89 | struct bau_target_nodemask { |
90 | unsigned long bits[BITS_TO_LONGS(256)]; | |
91 | }; | |
92 | ||
b194b120 CW |
93 | /* |
94 | * mask of cpu's on a node | |
95 | * (during initialization we need to check that unsigned long has | |
96 | * enough bits for max. cpu's per node) | |
97 | */ | |
1812924b CW |
98 | struct bau_local_cpumask { |
99 | unsigned long bits; | |
100 | }; | |
101 | ||
102 | /* | |
103 | * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor) | |
104 | * only 12 bytes (96 bits) of the payload area are usable. | |
105 | * An additional 3 bytes (bits 27:4) of the header address are carried | |
106 | * to the next bytes of the destination payload queue. | |
107 | * And an additional 2 bytes of the header Suppl_A field are also | |
108 | * carried to the destination payload queue. | |
109 | * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte) | |
110 | * of the destination payload queue, which is written by the hardware | |
111 | * with the s/w ack resource bit vector. | |
112 | * [ effective message contents (16 bytes (128 bits) maximum), not counting | |
113 | * the s/w ack bit vector ] | |
114 | */ | |
115 | ||
b194b120 CW |
116 | /* |
117 | * The payload is software-defined for INTD transactions | |
118 | */ | |
1812924b CW |
119 | struct bau_msg_payload { |
120 | unsigned long address; /* signifies a page or all TLB's | |
121 | of the cpu */ | |
122 | /* 64 bits */ | |
123 | unsigned short sending_cpu; /* filled in by sender */ | |
124 | /* 16 bits */ | |
125 | unsigned short acknowledge_count;/* filled in by destination */ | |
126 | /* 16 bits */ | |
127 | unsigned int reserved1:32; /* not usable */ | |
128 | }; | |
129 | ||
130 | ||
b194b120 CW |
131 | /* |
132 | * Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor) | |
133 | * see table 4.2.3.0.1 in broacast_assist spec. | |
134 | */ | |
1812924b CW |
135 | struct bau_msg_header { |
136 | int dest_subnodeid:6; /* must be zero */ | |
137 | /* bits 5:0 */ | |
138 | int base_dest_nodeid:15; /* nasid>>1 (pnode) of first bit in node_map */ | |
139 | /* bits 20:6 */ | |
140 | int command:8; /* message type */ | |
141 | /* bits 28:21 */ | |
142 | /* 0x38: SN3net EndPoint Message */ | |
143 | int rsvd_1:3; /* must be zero */ | |
144 | /* bits 31:29 */ | |
145 | /* int will align on 32 bits */ | |
146 | int rsvd_2:9; /* must be zero */ | |
147 | /* bits 40:32 */ | |
148 | /* Suppl_A is 56-41 */ | |
149 | int payload_2a:8; /* becomes byte 16 of msg */ | |
150 | /* bits 48:41 */ /* not currently using */ | |
151 | int payload_2b:8; /* becomes byte 17 of msg */ | |
152 | /* bits 56:49 */ /* not currently using */ | |
153 | /* Address field (96:57) is never used as an | |
154 | address (these are address bits 42:3) */ | |
155 | int rsvd_3:1; /* must be zero */ | |
156 | /* bit 57 */ | |
157 | /* address bits 27:4 are payload */ | |
158 | /* these 24 bits become bytes 12-14 of msg */ | |
159 | int replied_to:1; /* sent as 0 by the source to byte 12 */ | |
160 | /* bit 58 */ | |
161 | ||
162 | int payload_1a:5; /* not currently used */ | |
163 | /* bits 63:59 */ | |
164 | int payload_1b:8; /* not currently used */ | |
165 | /* bits 71:64 */ | |
166 | int payload_1c:8; /* not currently used */ | |
167 | /* bits 79:72 */ | |
168 | int payload_1d:2; /* not currently used */ | |
169 | /* bits 81:80 */ | |
170 | ||
171 | int rsvd_4:7; /* must be zero */ | |
172 | /* bits 88:82 */ | |
173 | int sw_ack_flag:1; /* software acknowledge flag */ | |
174 | /* bit 89 */ | |
175 | /* INTD trasactions at destination are to | |
176 | wait for software acknowledge */ | |
177 | int rsvd_5:6; /* must be zero */ | |
178 | /* bits 95:90 */ | |
179 | int rsvd_6:5; /* must be zero */ | |
180 | /* bits 100:96 */ | |
181 | int int_both:1; /* if 1, interrupt both sockets on the blade */ | |
182 | /* bit 101*/ | |
183 | int fairness:3; /* usually zero */ | |
184 | /* bits 104:102 */ | |
185 | int multilevel:1; /* multi-level multicast format */ | |
186 | /* bit 105 */ | |
187 | /* 0 for TLB: endpoint multi-unicast messages */ | |
188 | int chaining:1; /* next descriptor is part of this activation*/ | |
189 | /* bit 106 */ | |
190 | int rsvd_7:21; /* must be zero */ | |
191 | /* bits 127:107 */ | |
192 | }; | |
193 | ||
b194b120 | 194 | /* |
dc163a41 | 195 | * The activation descriptor: |
b194b120 CW |
196 | * The format of the message to send, plus all accompanying control |
197 | * Should be 64 bytes | |
198 | */ | |
dc163a41 | 199 | struct bau_desc { |
1812924b | 200 | struct bau_target_nodemask distribution; |
b194b120 CW |
201 | /* |
202 | * message template, consisting of header and payload: | |
203 | */ | |
1812924b CW |
204 | struct bau_msg_header header; |
205 | struct bau_msg_payload payload; | |
206 | }; | |
207 | /* | |
208 | * -payload-- ---------header------ | |
209 | * bytes 0-11 bits 41-56 bits 58-81 | |
210 | * A B (2) C (3) | |
211 | * | |
212 | * A/B/C are moved to: | |
213 | * A C B | |
214 | * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector) | |
215 | * ------------payload queue----------- | |
216 | */ | |
217 | ||
218 | /* | |
219 | * The payload queue on the destination side is an array of these. | |
220 | * With BAU_MISC_CONTROL set for software acknowledge mode, the messages | |
221 | * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17 | |
222 | * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120) | |
223 | * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from | |
224 | * sw_ack_vector and payload_2) | |
225 | * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software | |
226 | * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload | |
227 | * operation." | |
228 | */ | |
229 | struct bau_payload_queue_entry { | |
230 | unsigned long address; /* signifies a page or all TLB's | |
231 | of the cpu */ | |
232 | /* 64 bits, bytes 0-7 */ | |
233 | ||
234 | unsigned short sending_cpu; /* cpu that sent the message */ | |
235 | /* 16 bits, bytes 8-9 */ | |
236 | ||
237 | unsigned short acknowledge_count; /* filled in by destination */ | |
238 | /* 16 bits, bytes 10-11 */ | |
239 | ||
240 | unsigned short replied_to:1; /* sent as 0 by the source */ | |
241 | /* 1 bit */ | |
242 | unsigned short unused1:7; /* not currently using */ | |
243 | /* 7 bits: byte 12) */ | |
244 | ||
245 | unsigned char unused2[2]; /* not currently using */ | |
246 | /* bytes 13-14 */ | |
247 | ||
248 | unsigned char sw_ack_vector; /* filled in by the hardware */ | |
249 | /* byte 15 (bits 127:120) */ | |
250 | ||
251 | unsigned char unused4[3]; /* not currently using bytes 17-19 */ | |
252 | /* bytes 17-19 */ | |
253 | ||
254 | int number_of_cpus; /* filled in at destination */ | |
255 | /* 32 bits, bytes 20-23 (aligned) */ | |
256 | ||
257 | unsigned char unused5[8]; /* not using */ | |
258 | /* bytes 24-31 */ | |
259 | }; | |
260 | ||
b194b120 CW |
261 | /* |
262 | * one for every slot in the destination payload queue | |
263 | */ | |
1812924b CW |
264 | struct bau_msg_status { |
265 | struct bau_local_cpumask seen_by; /* map of cpu's */ | |
266 | }; | |
267 | ||
b194b120 CW |
268 | /* |
269 | * one for every slot in the destination software ack resources | |
270 | */ | |
1812924b CW |
271 | struct bau_sw_ack_status { |
272 | struct bau_payload_queue_entry *msg; /* associated message */ | |
273 | int watcher; /* cpu monitoring, or -1 */ | |
274 | }; | |
275 | ||
b194b120 CW |
276 | /* |
277 | * one on every node and per-cpu; to locate the software tables | |
278 | */ | |
1812924b | 279 | struct bau_control { |
dc163a41 | 280 | struct bau_desc *descriptor_base; |
1812924b CW |
281 | struct bau_payload_queue_entry *bau_msg_head; |
282 | struct bau_payload_queue_entry *va_queue_first; | |
283 | struct bau_payload_queue_entry *va_queue_last; | |
284 | struct bau_msg_status *msg_statuses; | |
285 | int *watching; /* pointer to array */ | |
286 | }; | |
287 | ||
288 | /* | |
289 | * This structure is allocated per_cpu for UV TLB shootdown statistics. | |
290 | */ | |
291 | struct ptc_stats { | |
292 | unsigned long ptc_i; /* number of IPI-style flushes */ | |
293 | unsigned long requestor; /* number of nodes this cpu sent to */ | |
294 | unsigned long requestee; /* times cpu was remotely requested */ | |
295 | unsigned long alltlb; /* times all tlb's on this cpu were flushed */ | |
296 | unsigned long onetlb; /* times just one tlb on this cpu was flushed */ | |
297 | unsigned long s_retry; /* retries on source side timeouts */ | |
298 | unsigned long d_retry; /* retries on destination side timeouts */ | |
b194b120 CW |
299 | unsigned long sflush; /* cycles spent in uv_flush_tlb_others */ |
300 | unsigned long dflush; /* cycles spent on destination side */ | |
1812924b CW |
301 | unsigned long retriesok; /* successes on retries */ |
302 | unsigned long nomsg; /* interrupts with no message */ | |
303 | unsigned long multmsg; /* interrupts with multiple messages */ | |
304 | unsigned long ntargeted;/* nodes targeted */ | |
305 | }; | |
306 | ||
307 | static inline int bau_node_isset(int node, struct bau_target_nodemask *dstp) | |
308 | { | |
309 | return constant_test_bit(node, &dstp->bits[0]); | |
310 | } | |
311 | static inline void bau_node_set(int node, struct bau_target_nodemask *dstp) | |
312 | { | |
313 | __set_bit(node, &dstp->bits[0]); | |
314 | } | |
315 | static inline void bau_nodes_clear(struct bau_target_nodemask *dstp, int nbits) | |
316 | { | |
317 | bitmap_zero(&dstp->bits[0], nbits); | |
318 | } | |
319 | ||
320 | static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits) | |
321 | { | |
322 | bitmap_zero(&dstp->bits, nbits); | |
323 | } | |
324 | ||
1812924b CW |
325 | #define cpubit_isset(cpu, bau_local_cpumask) \ |
326 | test_bit((cpu), (bau_local_cpumask).bits) | |
327 | ||
b194b120 CW |
328 | extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long); |
329 | extern void uv_bau_message_intr1(void); | |
330 | extern void uv_bau_timeout_intr1(void); | |
1812924b | 331 | |
77ef50a5 | 332 | #endif /* ASM_X86__UV__UV_BAU_H */ |