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c27cfeff GC |
1 | #ifndef _ASM_X86_SMP_H_ |
2 | #define _ASM_X86_SMP_H_ | |
3 | #ifndef __ASSEMBLY__ | |
53ebef49 | 4 | #include <linux/cpumask.h> |
93b016f8 | 5 | #include <linux/init.h> |
7e1efc0c | 6 | #include <asm/percpu.h> |
53ebef49 | 7 | |
b23dab08 GC |
8 | /* |
9 | * We need the APIC definitions automatically as part of 'smp.h' | |
10 | */ | |
11 | #ifdef CONFIG_X86_LOCAL_APIC | |
12 | # include <asm/mpspec.h> | |
13 | # include <asm/apic.h> | |
14 | # ifdef CONFIG_X86_IO_APIC | |
15 | # include <asm/io_apic.h> | |
16 | # endif | |
17 | #endif | |
18 | #include <asm/pda.h> | |
19 | #include <asm/thread_info.h> | |
20 | ||
53ebef49 | 21 | extern cpumask_t cpu_callout_map; |
8be9ac85 GC |
22 | extern cpumask_t cpu_initialized; |
23 | extern cpumask_t cpu_callin_map; | |
24 | ||
25 | extern void (*mtrr_hook)(void); | |
26 | extern void zap_low_mappings(void); | |
53ebef49 GC |
27 | |
28 | extern int smp_num_siblings; | |
29 | extern unsigned int num_processors; | |
cb3c8b90 | 30 | extern cpumask_t cpu_initialized; |
c27cfeff | 31 | |
7e1efc0c GOC |
32 | extern u16 x86_cpu_to_apicid_init[]; |
33 | extern u16 x86_bios_cpu_apicid_init[]; | |
34 | extern void *x86_cpu_to_apicid_early_ptr; | |
35 | extern void *x86_bios_cpu_apicid_early_ptr; | |
36 | ||
37 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); | |
38 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); | |
39 | DECLARE_PER_CPU(u16, cpu_llc_id); | |
40 | DECLARE_PER_CPU(u16, x86_cpu_to_apicid); | |
41 | DECLARE_PER_CPU(u16, x86_bios_cpu_apicid); | |
42 | ||
42068829 GC |
43 | /* |
44 | * Trampoline 80x86 program as an array. | |
45 | */ | |
46 | extern const unsigned char trampoline_data []; | |
47 | extern const unsigned char trampoline_end []; | |
91718e8d | 48 | extern unsigned char *trampoline_base; |
42068829 | 49 | |
9d97d0da GOC |
50 | /* Static state in head.S used to set up a CPU */ |
51 | extern struct { | |
52 | void *sp; | |
53 | unsigned short ss; | |
54 | } stack_start; | |
55 | ||
cb3c8b90 GOC |
56 | extern unsigned long init_rsp; |
57 | extern unsigned long initial_code; | |
9d97d0da | 58 | |
16694024 GC |
59 | struct smp_ops { |
60 | void (*smp_prepare_boot_cpu)(void); | |
61 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
62 | int (*cpu_up)(unsigned cpu); | |
63 | void (*smp_cpus_done)(unsigned max_cpus); | |
64 | ||
65 | void (*smp_send_stop)(void); | |
66 | void (*smp_send_reschedule)(int cpu); | |
67 | int (*smp_call_function_mask)(cpumask_t mask, | |
68 | void (*func)(void *info), void *info, | |
69 | int wait); | |
70 | }; | |
71 | ||
14522076 GC |
72 | /* Globals due to paravirt */ |
73 | extern void set_cpu_sibling_map(int cpu); | |
74 | ||
c76cb368 | 75 | #ifdef CONFIG_SMP |
d0173aea GOC |
76 | #ifndef CONFIG_PARAVIRT |
77 | #define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0) | |
78 | #endif | |
c76cb368 | 79 | extern struct smp_ops smp_ops; |
8678969e | 80 | |
377d6984 GC |
81 | static inline void smp_send_stop(void) |
82 | { | |
83 | smp_ops.smp_send_stop(); | |
84 | } | |
85 | ||
1e3fac83 GC |
86 | static inline void smp_prepare_boot_cpu(void) |
87 | { | |
88 | smp_ops.smp_prepare_boot_cpu(); | |
89 | } | |
90 | ||
7557da67 GC |
91 | static inline void smp_prepare_cpus(unsigned int max_cpus) |
92 | { | |
93 | smp_ops.smp_prepare_cpus(max_cpus); | |
94 | } | |
95 | ||
c5597649 GC |
96 | static inline void smp_cpus_done(unsigned int max_cpus) |
97 | { | |
98 | smp_ops.smp_cpus_done(max_cpus); | |
99 | } | |
100 | ||
71d19549 GC |
101 | static inline int __cpu_up(unsigned int cpu) |
102 | { | |
103 | return smp_ops.cpu_up(cpu); | |
104 | } | |
105 | ||
8678969e GC |
106 | static inline void smp_send_reschedule(int cpu) |
107 | { | |
108 | smp_ops.smp_send_reschedule(cpu); | |
109 | } | |
64b1a21e GC |
110 | |
111 | static inline int smp_call_function_mask(cpumask_t mask, | |
112 | void (*func) (void *info), void *info, | |
113 | int wait) | |
114 | { | |
115 | return smp_ops.smp_call_function_mask(mask, func, info, wait); | |
116 | } | |
71d19549 | 117 | |
1e3fac83 | 118 | void native_smp_prepare_boot_cpu(void); |
7557da67 | 119 | void native_smp_prepare_cpus(unsigned int max_cpus); |
c5597649 | 120 | void native_smp_cpus_done(unsigned int max_cpus); |
71d19549 | 121 | int native_cpu_up(unsigned int cpunum); |
93b016f8 | 122 | |
69c18c15 GC |
123 | extern int __cpu_disable(void); |
124 | extern void __cpu_die(unsigned int cpu); | |
125 | ||
93b016f8 | 126 | extern unsigned disabled_cpus; |
68a1c3f8 | 127 | extern void prefill_possible_map(void); |
91718e8d GC |
128 | |
129 | #define SMP_TRAMPOLINE_BASE 0x6000 | |
130 | extern unsigned long setup_trampoline(void); | |
1d89a7f0 GOC |
131 | |
132 | void smp_store_cpu_info(int id); | |
c70dcb74 | 133 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
a9c057c1 GC |
134 | |
135 | /* We don't mark CPUs online until __cpu_up(), so we need another measure */ | |
136 | static inline int num_booting_cpus(void) | |
137 | { | |
138 | return cpus_weight(cpu_callout_map); | |
139 | } | |
140 | #endif /* CONFIG_SMP */ | |
141 | ||
142 | #ifdef CONFIG_X86_32_SMP | |
143 | /* | |
144 | * This function is needed by all SMP systems. It must _always_ be valid | |
145 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
146 | * so this is correct in the x86 case. | |
147 | */ | |
148 | DECLARE_PER_CPU(int, cpu_number); | |
149 | #define raw_smp_processor_id() (x86_read_percpu(cpu_number)) | |
150 | extern int safe_smp_processor_id(void); | |
151 | ||
152 | #elif defined(CONFIG_X86_64_SMP) | |
153 | #define raw_smp_processor_id() read_pda(cpunumber) | |
154 | ||
155 | #define stack_smp_processor_id() \ | |
156 | ({ \ | |
157 | struct thread_info *ti; \ | |
158 | __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \ | |
159 | ti->cpu; \ | |
160 | }) | |
161 | #define safe_smp_processor_id() smp_processor_id() | |
162 | ||
163 | #else /* !CONFIG_X86_32_SMP && !CONFIG_X86_64_SMP */ | |
c70dcb74 | 164 | #define cpu_physical_id(cpu) boot_cpu_physical_apicid |
a9c057c1 GC |
165 | #define safe_smp_processor_id() 0 |
166 | #define stack_smp_processor_id() 0 | |
c76cb368 | 167 | #endif |
16694024 | 168 | |
1b000843 GC |
169 | #ifdef CONFIG_X86_LOCAL_APIC |
170 | ||
171 | static inline int logical_smp_processor_id(void) | |
172 | { | |
173 | /* we don't want to mark this access volatile - bad code generation */ | |
174 | return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); | |
175 | } | |
176 | ||
05f2d12c JS |
177 | static inline unsigned int read_apic_id(void) |
178 | { | |
179 | return *(u32 *)(APIC_BASE + APIC_ID); | |
180 | } | |
181 | ||
1b000843 GC |
182 | # ifdef APIC_DEFINITION |
183 | extern int hard_smp_processor_id(void); | |
184 | # else | |
185 | # include <mach_apicdef.h> | |
186 | static inline int hard_smp_processor_id(void) | |
187 | { | |
188 | /* we don't want to mark this access volatile - bad code generation */ | |
05f2d12c | 189 | return GET_APIC_ID(read_apic_id()); |
1b000843 GC |
190 | } |
191 | # endif /* APIC_DEFINITION */ | |
192 | ||
193 | #else /* CONFIG_X86_LOCAL_APIC */ | |
194 | ||
195 | # ifndef CONFIG_SMP | |
196 | # define hard_smp_processor_id() 0 | |
197 | # endif | |
198 | ||
199 | #endif /* CONFIG_X86_LOCAL_APIC */ | |
200 | ||
1dbb4726 GC |
201 | #ifdef CONFIG_HOTPLUG_CPU |
202 | extern void cpu_exit_clear(void); | |
203 | extern void cpu_uninit(void); | |
204 | extern void remove_siblinginfo(int cpu); | |
205 | #endif | |
206 | ||
639acb16 GC |
207 | extern void smp_alloc_memory(void); |
208 | extern void lock_ipi_call_lock(void); | |
209 | extern void unlock_ipi_call_lock(void); | |
c27cfeff GC |
210 | #endif /* __ASSEMBLY__ */ |
211 | #endif |