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d3561b7f RR |
1 | #ifndef __ASM_PARAVIRT_H |
2 | #define __ASM_PARAVIRT_H | |
3 | /* Various instructions on x86 need to be replaced for | |
4 | * para-virtualization: those hooks are defined here. */ | |
b239fb25 JF |
5 | |
6 | #ifdef CONFIG_PARAVIRT | |
da181a8b | 7 | #include <asm/page.h> |
658be9d3 | 8 | #include <asm/asm.h> |
d3561b7f | 9 | |
139ec7c4 RR |
10 | /* Bitmask of what can be clobbered: usually at least eax. */ |
11 | #define CLBR_NONE 0x0 | |
12 | #define CLBR_EAX 0x1 | |
13 | #define CLBR_ECX 0x2 | |
14 | #define CLBR_EDX 0x4 | |
15 | #define CLBR_ANY 0x7 | |
16 | ||
d3561b7f | 17 | #ifndef __ASSEMBLY__ |
3dc494e8 | 18 | #include <linux/types.h> |
d4c10477 | 19 | #include <linux/cpumask.h> |
ce6234b5 | 20 | #include <asm/kmap_types.h> |
8d947344 | 21 | #include <asm/desc_defs.h> |
3dc494e8 | 22 | |
ce6234b5 | 23 | struct page; |
d3561b7f | 24 | struct thread_struct; |
6b68f01b | 25 | struct desc_ptr; |
d3561b7f | 26 | struct tss_struct; |
da181a8b | 27 | struct mm_struct; |
90a0a06a | 28 | struct desc_struct; |
294688c0 | 29 | |
93b1eab3 JF |
30 | /* general info */ |
31 | struct pv_info { | |
d3561b7f | 32 | unsigned int kernel_rpl; |
5311ab62 | 33 | int shared_kernel_pmd; |
93b1eab3 | 34 | int paravirt_enabled; |
d3561b7f | 35 | const char *name; |
93b1eab3 | 36 | }; |
d3561b7f | 37 | |
93b1eab3 | 38 | struct pv_init_ops { |
139ec7c4 | 39 | /* |
93b1eab3 JF |
40 | * Patch may replace one of the defined code sequences with |
41 | * arbitrary code, subject to the same register constraints. | |
42 | * This generally means the code is not free to clobber any | |
43 | * registers other than EAX. The patch function should return | |
44 | * the number of bytes of code generated, as we nop pad the | |
45 | * rest in generic code. | |
139ec7c4 | 46 | */ |
ab144f5e AK |
47 | unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, |
48 | unsigned long addr, unsigned len); | |
139ec7c4 | 49 | |
294688c0 | 50 | /* Basic arch-specific setup */ |
d3561b7f RR |
51 | void (*arch_setup)(void); |
52 | char *(*memory_setup)(void); | |
6996d3b6 JF |
53 | void (*post_allocator_init)(void); |
54 | ||
294688c0 | 55 | /* Print a banner to identify the environment */ |
d3561b7f | 56 | void (*banner)(void); |
93b1eab3 JF |
57 | }; |
58 | ||
59 | ||
8965c1c0 | 60 | struct pv_lazy_ops { |
93b1eab3 | 61 | /* Set deferred update mode, used for batching operations. */ |
8965c1c0 JF |
62 | void (*enter)(void); |
63 | void (*leave)(void); | |
93b1eab3 JF |
64 | }; |
65 | ||
66 | struct pv_time_ops { | |
67 | void (*time_init)(void); | |
d3561b7f | 68 | |
294688c0 | 69 | /* Set and set time of day */ |
d3561b7f RR |
70 | unsigned long (*get_wallclock)(void); |
71 | int (*set_wallclock)(unsigned long); | |
d3561b7f | 72 | |
93b1eab3 JF |
73 | unsigned long long (*sched_clock)(void); |
74 | unsigned long (*get_cpu_khz)(void); | |
75 | }; | |
d3561b7f | 76 | |
93b1eab3 | 77 | struct pv_cpu_ops { |
294688c0 | 78 | /* hooks for various privileged instructions */ |
1a1eecd1 AK |
79 | unsigned long (*get_debugreg)(int regno); |
80 | void (*set_debugreg)(int regno, unsigned long value); | |
d3561b7f | 81 | |
1a1eecd1 | 82 | void (*clts)(void); |
d3561b7f | 83 | |
1a1eecd1 AK |
84 | unsigned long (*read_cr0)(void); |
85 | void (*write_cr0)(unsigned long); | |
d3561b7f | 86 | |
1a1eecd1 AK |
87 | unsigned long (*read_cr4_safe)(void); |
88 | unsigned long (*read_cr4)(void); | |
89 | void (*write_cr4)(unsigned long); | |
d3561b7f | 90 | |
294688c0 | 91 | /* Segment descriptor handling */ |
1a1eecd1 | 92 | void (*load_tr_desc)(void); |
6b68f01b GOC |
93 | void (*load_gdt)(const struct desc_ptr *); |
94 | void (*load_idt)(const struct desc_ptr *); | |
95 | void (*store_gdt)(struct desc_ptr *); | |
96 | void (*store_idt)(struct desc_ptr *); | |
1a1eecd1 AK |
97 | void (*set_ldt)(const void *desc, unsigned entries); |
98 | unsigned long (*store_tr)(void); | |
99 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | |
75b8bb3e GOC |
100 | void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, |
101 | const void *desc); | |
90a0a06a | 102 | void (*write_gdt_entry)(struct desc_struct *, |
014b15be | 103 | int entrynum, const void *desc, int size); |
8d947344 GOC |
104 | void (*write_idt_entry)(gate_desc *, |
105 | int entrynum, const gate_desc *gate); | |
faca6227 | 106 | void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t); |
d3561b7f | 107 | |
1a1eecd1 | 108 | void (*set_iopl_mask)(unsigned mask); |
93b1eab3 JF |
109 | |
110 | void (*wbinvd)(void); | |
1a1eecd1 | 111 | void (*io_delay)(void); |
d3561b7f | 112 | |
93b1eab3 JF |
113 | /* cpuid emulation, mostly so that caps bits can be disabled */ |
114 | void (*cpuid)(unsigned int *eax, unsigned int *ebx, | |
115 | unsigned int *ecx, unsigned int *edx); | |
116 | ||
117 | /* MSR, PMC and TSR operations. | |
118 | err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ | |
119 | u64 (*read_msr)(unsigned int msr, int *err); | |
c9dcda5c | 120 | int (*write_msr)(unsigned int msr, unsigned low, unsigned high); |
93b1eab3 JF |
121 | |
122 | u64 (*read_tsc)(void); | |
b8d1fae7 | 123 | u64 (*read_pmc)(int counter); |
e5aaac44 | 124 | unsigned long long (*read_tscp)(unsigned int *aux); |
93b1eab3 JF |
125 | |
126 | /* These two are jmp to, not actually called. */ | |
6abcd98f | 127 | void (*irq_enable_syscall_ret)(void); |
93b1eab3 | 128 | void (*iret)(void); |
8965c1c0 | 129 | |
e801f864 GOC |
130 | void (*swapgs)(void); |
131 | ||
8965c1c0 | 132 | struct pv_lazy_ops lazy_mode; |
93b1eab3 JF |
133 | }; |
134 | ||
135 | struct pv_irq_ops { | |
136 | void (*init_IRQ)(void); | |
137 | ||
294688c0 | 138 | /* |
93b1eab3 JF |
139 | * Get/set interrupt state. save_fl and restore_fl are only |
140 | * expected to use X86_EFLAGS_IF; all other bits | |
141 | * returned from save_fl are undefined, and may be ignored by | |
142 | * restore_fl. | |
294688c0 | 143 | */ |
93b1eab3 JF |
144 | unsigned long (*save_fl)(void); |
145 | void (*restore_fl)(unsigned long); | |
146 | void (*irq_disable)(void); | |
147 | void (*irq_enable)(void); | |
148 | void (*safe_halt)(void); | |
149 | void (*halt)(void); | |
150 | }; | |
d6dd61c8 | 151 | |
93b1eab3 | 152 | struct pv_apic_ops { |
13623d79 | 153 | #ifdef CONFIG_X86_LOCAL_APIC |
294688c0 JF |
154 | /* |
155 | * Direct APIC operations, principally for VMI. Ideally | |
156 | * these shouldn't be in this interface. | |
157 | */ | |
42e0a9aa TG |
158 | void (*apic_write)(unsigned long reg, u32 v); |
159 | void (*apic_write_atomic)(unsigned long reg, u32 v); | |
160 | u32 (*apic_read)(unsigned long reg); | |
bbab4f3b ZA |
161 | void (*setup_boot_clock)(void); |
162 | void (*setup_secondary_clock)(void); | |
294688c0 JF |
163 | |
164 | void (*startup_ipi_hook)(int phys_apicid, | |
165 | unsigned long start_eip, | |
166 | unsigned long start_esp); | |
13623d79 | 167 | #endif |
93b1eab3 JF |
168 | }; |
169 | ||
170 | struct pv_mmu_ops { | |
171 | /* | |
172 | * Called before/after init_mm pagetable setup. setup_start | |
173 | * may reset %cr3, and may pre-install parts of the pagetable; | |
174 | * pagetable setup is expected to preserve any existing | |
175 | * mapping. | |
176 | */ | |
177 | void (*pagetable_setup_start)(pgd_t *pgd_base); | |
178 | void (*pagetable_setup_done)(pgd_t *pgd_base); | |
179 | ||
180 | unsigned long (*read_cr2)(void); | |
181 | void (*write_cr2)(unsigned long); | |
182 | ||
183 | unsigned long (*read_cr3)(void); | |
184 | void (*write_cr3)(unsigned long); | |
185 | ||
186 | /* | |
187 | * Hooks for intercepting the creation/use/destruction of an | |
188 | * mm_struct. | |
189 | */ | |
190 | void (*activate_mm)(struct mm_struct *prev, | |
191 | struct mm_struct *next); | |
192 | void (*dup_mmap)(struct mm_struct *oldmm, | |
193 | struct mm_struct *mm); | |
194 | void (*exit_mmap)(struct mm_struct *mm); | |
195 | ||
13623d79 | 196 | |
294688c0 | 197 | /* TLB operations */ |
1a1eecd1 AK |
198 | void (*flush_tlb_user)(void); |
199 | void (*flush_tlb_kernel)(void); | |
f8822f42 | 200 | void (*flush_tlb_single)(unsigned long addr); |
d4c10477 JF |
201 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, |
202 | unsigned long va); | |
1a1eecd1 | 203 | |
294688c0 | 204 | /* Hooks for allocating/releasing pagetable pages */ |
fdb4c338 | 205 | void (*alloc_pt)(struct mm_struct *mm, u32 pfn); |
1a1eecd1 AK |
206 | void (*alloc_pd)(u32 pfn); |
207 | void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); | |
208 | void (*release_pt)(u32 pfn); | |
209 | void (*release_pd)(u32 pfn); | |
210 | ||
294688c0 | 211 | /* Pagetable manipulation functions */ |
1a1eecd1 | 212 | void (*set_pte)(pte_t *ptep, pte_t pteval); |
294688c0 JF |
213 | void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, |
214 | pte_t *ptep, pte_t pteval); | |
1a1eecd1 | 215 | void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); |
3dc494e8 | 216 | void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
294688c0 JF |
217 | void (*pte_update_defer)(struct mm_struct *mm, |
218 | unsigned long addr, pte_t *ptep); | |
3dc494e8 | 219 | |
da181a8b | 220 | #ifdef CONFIG_X86_PAE |
1a1eecd1 | 221 | void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); |
93b1eab3 JF |
222 | void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, |
223 | pte_t *ptep, pte_t pte); | |
1a1eecd1 | 224 | void (*set_pud)(pud_t *pudp, pud_t pudval); |
93b1eab3 | 225 | void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
1a1eecd1 | 226 | void (*pmd_clear)(pmd_t *pmdp); |
3dc494e8 JF |
227 | |
228 | unsigned long long (*pte_val)(pte_t); | |
229 | unsigned long long (*pmd_val)(pmd_t); | |
230 | unsigned long long (*pgd_val)(pgd_t); | |
231 | ||
232 | pte_t (*make_pte)(unsigned long long pte); | |
233 | pmd_t (*make_pmd)(unsigned long long pmd); | |
234 | pgd_t (*make_pgd)(unsigned long long pgd); | |
235 | #else | |
236 | unsigned long (*pte_val)(pte_t); | |
237 | unsigned long (*pgd_val)(pgd_t); | |
238 | ||
239 | pte_t (*make_pte)(unsigned long pte); | |
240 | pgd_t (*make_pgd)(unsigned long pgd); | |
da181a8b RR |
241 | #endif |
242 | ||
93b1eab3 JF |
243 | #ifdef CONFIG_HIGHPTE |
244 | void *(*kmap_atomic_pte)(struct page *page, enum km_type type); | |
245 | #endif | |
8965c1c0 JF |
246 | |
247 | struct pv_lazy_ops lazy_mode; | |
93b1eab3 | 248 | }; |
9226d125 | 249 | |
93b1eab3 JF |
250 | /* This contains all the paravirt structures: we get a convenient |
251 | * number for each function using the offset which we use to indicate | |
252 | * what to patch. */ | |
253 | struct paravirt_patch_template | |
254 | { | |
255 | struct pv_init_ops pv_init_ops; | |
93b1eab3 JF |
256 | struct pv_time_ops pv_time_ops; |
257 | struct pv_cpu_ops pv_cpu_ops; | |
258 | struct pv_irq_ops pv_irq_ops; | |
259 | struct pv_apic_ops pv_apic_ops; | |
260 | struct pv_mmu_ops pv_mmu_ops; | |
d3561b7f RR |
261 | }; |
262 | ||
93b1eab3 JF |
263 | extern struct pv_info pv_info; |
264 | extern struct pv_init_ops pv_init_ops; | |
93b1eab3 JF |
265 | extern struct pv_time_ops pv_time_ops; |
266 | extern struct pv_cpu_ops pv_cpu_ops; | |
267 | extern struct pv_irq_ops pv_irq_ops; | |
268 | extern struct pv_apic_ops pv_apic_ops; | |
269 | extern struct pv_mmu_ops pv_mmu_ops; | |
d3561b7f | 270 | |
d5822035 | 271 | #define PARAVIRT_PATCH(x) \ |
93b1eab3 | 272 | (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) |
d5822035 | 273 | |
93b1eab3 JF |
274 | #define paravirt_type(op) \ |
275 | [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ | |
276 | [paravirt_opptr] "m" (op) | |
d5822035 JF |
277 | #define paravirt_clobber(clobber) \ |
278 | [paravirt_clobber] "i" (clobber) | |
279 | ||
294688c0 JF |
280 | /* |
281 | * Generate some code, and mark it as patchable by the | |
282 | * apply_paravirt() alternate instruction patcher. | |
283 | */ | |
d5822035 JF |
284 | #define _paravirt_alt(insn_string, type, clobber) \ |
285 | "771:\n\t" insn_string "\n" "772:\n" \ | |
286 | ".pushsection .parainstructions,\"a\"\n" \ | |
658be9d3 GOC |
287 | _ASM_ALIGN "\n" \ |
288 | _ASM_PTR " 771b\n" \ | |
d5822035 JF |
289 | " .byte " type "\n" \ |
290 | " .byte 772b-771b\n" \ | |
291 | " .short " clobber "\n" \ | |
292 | ".popsection\n" | |
293 | ||
294688c0 | 294 | /* Generate patchable code, with the default asm parameters. */ |
f8822f42 | 295 | #define paravirt_alt(insn_string) \ |
d5822035 JF |
296 | _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") |
297 | ||
63f70270 JF |
298 | unsigned paravirt_patch_nop(void); |
299 | unsigned paravirt_patch_ignore(unsigned len); | |
ab144f5e AK |
300 | unsigned paravirt_patch_call(void *insnbuf, |
301 | const void *target, u16 tgt_clobbers, | |
302 | unsigned long addr, u16 site_clobbers, | |
63f70270 | 303 | unsigned len); |
93b1eab3 | 304 | unsigned paravirt_patch_jmp(void *insnbuf, const void *target, |
ab144f5e AK |
305 | unsigned long addr, unsigned len); |
306 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, | |
307 | unsigned long addr, unsigned len); | |
63f70270 | 308 | |
ab144f5e | 309 | unsigned paravirt_patch_insns(void *insnbuf, unsigned len, |
63f70270 JF |
310 | const char *start, const char *end); |
311 | ||
d572929c | 312 | int paravirt_disable_iospace(void); |
63f70270 | 313 | |
294688c0 JF |
314 | /* |
315 | * This generates an indirect call based on the operation type number. | |
316 | * The type number, computed in PARAVIRT_PATCH, is derived from the | |
93b1eab3 JF |
317 | * offset into the paravirt_patch_template structure, and can therefore be |
318 | * freely converted back into a structure offset. | |
294688c0 | 319 | */ |
93b1eab3 | 320 | #define PARAVIRT_CALL "call *%[paravirt_opptr];" |
294688c0 JF |
321 | |
322 | /* | |
93b1eab3 JF |
323 | * These macros are intended to wrap calls through one of the paravirt |
324 | * ops structs, so that they can be later identified and patched at | |
294688c0 JF |
325 | * runtime. |
326 | * | |
327 | * Normally, a call to a pv_op function is a simple indirect call: | |
a4746364 | 328 | * (pv_op_struct.operations)(args...). |
294688c0 JF |
329 | * |
330 | * Unfortunately, this is a relatively slow operation for modern CPUs, | |
331 | * because it cannot necessarily determine what the destination | |
332 | * address is. In this case, the address is a runtime constant, so at | |
333 | * the very least we can patch the call to e a simple direct call, or | |
334 | * ideally, patch an inline implementation into the callsite. (Direct | |
335 | * calls are essentially free, because the call and return addresses | |
336 | * are completely predictable.) | |
337 | * | |
a4746364 | 338 | * For i386, these macros rely on the standard gcc "regparm(3)" calling |
294688c0 JF |
339 | * convention, in which the first three arguments are placed in %eax, |
340 | * %edx, %ecx (in that order), and the remaining arguments are placed | |
341 | * on the stack. All caller-save registers (eax,edx,ecx) are expected | |
342 | * to be modified (either clobbered or used for return values). | |
a4746364 GOC |
343 | * X86_64, on the other hand, already specifies a register-based calling |
344 | * conventions, returning at %rax, with parameteres going on %rdi, %rsi, | |
345 | * %rdx, and %rcx. Note that for this reason, x86_64 does not need any | |
346 | * special handling for dealing with 4 arguments, unlike i386. | |
347 | * However, x86_64 also have to clobber all caller saved registers, which | |
348 | * unfortunately, are quite a bit (r8 - r11) | |
294688c0 JF |
349 | * |
350 | * The call instruction itself is marked by placing its start address | |
351 | * and size into the .parainstructions section, so that | |
352 | * apply_paravirt() in arch/i386/kernel/alternative.c can do the | |
93b1eab3 | 353 | * appropriate patching under the control of the backend pv_init_ops |
294688c0 JF |
354 | * implementation. |
355 | * | |
356 | * Unfortunately there's no way to get gcc to generate the args setup | |
357 | * for the call, and then allow the call itself to be generated by an | |
358 | * inline asm. Because of this, we must do the complete arg setup and | |
359 | * return value handling from within these macros. This is fairly | |
360 | * cumbersome. | |
361 | * | |
362 | * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. | |
363 | * It could be extended to more arguments, but there would be little | |
364 | * to be gained from that. For each number of arguments, there are | |
365 | * the two VCALL and CALL variants for void and non-void functions. | |
366 | * | |
367 | * When there is a return value, the invoker of the macro must specify | |
368 | * the return type. The macro then uses sizeof() on that type to | |
369 | * determine whether its a 32 or 64 bit value, and places the return | |
370 | * in the right register(s) (just %eax for 32-bit, and %edx:%eax for | |
a4746364 GOC |
371 | * 64-bit). For x86_64 machines, it just returns at %rax regardless of |
372 | * the return value size. | |
294688c0 JF |
373 | * |
374 | * 64-bit arguments are passed as a pair of adjacent 32-bit arguments | |
a4746364 GOC |
375 | * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments |
376 | * in low,high order | |
294688c0 JF |
377 | * |
378 | * Small structures are passed and returned in registers. The macro | |
379 | * calling convention can't directly deal with this, so the wrapper | |
380 | * functions must do this. | |
381 | * | |
382 | * These PVOP_* macros are only defined within this header. This | |
383 | * means that all uses must be wrapped in inline functions. This also | |
384 | * makes sure the incoming and outgoing types are always correct. | |
385 | */ | |
a4746364 GOC |
386 | #ifdef CONFIG_X86_32 |
387 | #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx | |
388 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS | |
389 | #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ | |
390 | "=c" (__ecx) | |
391 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS | |
392 | #define EXTRA_CLOBBERS | |
393 | #define VEXTRA_CLOBBERS | |
394 | #else | |
395 | #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx | |
396 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax | |
397 | #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ | |
398 | "=S" (__esi), "=d" (__edx), \ | |
399 | "=c" (__ecx) | |
400 | ||
401 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) | |
402 | ||
403 | #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" | |
404 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" | |
405 | #endif | |
406 | ||
1a45b7aa | 407 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ |
f8822f42 | 408 | ({ \ |
1a45b7aa | 409 | rettype __ret; \ |
a4746364 GOC |
410 | PVOP_CALL_ARGS; \ |
411 | /* This is 32-bit specific, but is okay in 64-bit */ \ | |
412 | /* since this condition will never hold */ \ | |
1a45b7aa JF |
413 | if (sizeof(rettype) > sizeof(unsigned long)) { \ |
414 | asm volatile(pre \ | |
415 | paravirt_alt(PARAVIRT_CALL) \ | |
416 | post \ | |
a4746364 | 417 | : PVOP_CALL_CLOBBERS \ |
1a45b7aa JF |
418 | : paravirt_type(op), \ |
419 | paravirt_clobber(CLBR_ANY), \ | |
420 | ##__VA_ARGS__ \ | |
a4746364 | 421 | : "memory", "cc" EXTRA_CLOBBERS); \ |
1a45b7aa | 422 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ |
f8822f42 | 423 | } else { \ |
1a45b7aa | 424 | asm volatile(pre \ |
f8822f42 | 425 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa | 426 | post \ |
a4746364 | 427 | : PVOP_CALL_CLOBBERS \ |
1a45b7aa JF |
428 | : paravirt_type(op), \ |
429 | paravirt_clobber(CLBR_ANY), \ | |
430 | ##__VA_ARGS__ \ | |
a4746364 | 431 | : "memory", "cc" EXTRA_CLOBBERS); \ |
1a45b7aa | 432 | __ret = (rettype)__eax; \ |
f8822f42 JF |
433 | } \ |
434 | __ret; \ | |
435 | }) | |
1a45b7aa | 436 | #define __PVOP_VCALL(op, pre, post, ...) \ |
f8822f42 | 437 | ({ \ |
a4746364 | 438 | PVOP_VCALL_ARGS; \ |
1a45b7aa | 439 | asm volatile(pre \ |
f8822f42 | 440 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa | 441 | post \ |
a4746364 | 442 | : PVOP_VCALL_CLOBBERS \ |
1a45b7aa JF |
443 | : paravirt_type(op), \ |
444 | paravirt_clobber(CLBR_ANY), \ | |
445 | ##__VA_ARGS__ \ | |
a4746364 | 446 | : "memory", "cc" VEXTRA_CLOBBERS); \ |
f8822f42 JF |
447 | }) |
448 | ||
1a45b7aa JF |
449 | #define PVOP_CALL0(rettype, op) \ |
450 | __PVOP_CALL(rettype, op, "", "") | |
451 | #define PVOP_VCALL0(op) \ | |
452 | __PVOP_VCALL(op, "", "") | |
453 | ||
454 | #define PVOP_CALL1(rettype, op, arg1) \ | |
a4746364 | 455 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1))) |
1a45b7aa | 456 | #define PVOP_VCALL1(op, arg1) \ |
a4746364 | 457 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1))) |
1a45b7aa JF |
458 | |
459 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ | |
a4746364 GOC |
460 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ |
461 | "1" ((unsigned long)(arg2))) | |
1a45b7aa | 462 | #define PVOP_VCALL2(op, arg1, arg2) \ |
a4746364 GOC |
463 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ |
464 | "1" ((unsigned long)(arg2))) | |
1a45b7aa JF |
465 | |
466 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ | |
a4746364 GOC |
467 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ |
468 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) | |
1a45b7aa | 469 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ |
a4746364 GOC |
470 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ |
471 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) | |
1a45b7aa | 472 | |
a4746364 GOC |
473 | /* This is the only difference in x86_64. We can make it much simpler */ |
474 | #ifdef CONFIG_X86_32 | |
1a45b7aa JF |
475 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ |
476 | __PVOP_CALL(rettype, op, \ | |
477 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
478 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
479 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
480 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
481 | __PVOP_VCALL(op, \ | |
482 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
483 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
484 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
a4746364 GOC |
485 | #else |
486 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | |
487 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ | |
488 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ | |
489 | "3"((unsigned long)(arg4))) | |
490 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
491 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ | |
492 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ | |
493 | "3"((unsigned long)(arg4))) | |
494 | #endif | |
1a45b7aa | 495 | |
f8822f42 JF |
496 | static inline int paravirt_enabled(void) |
497 | { | |
93b1eab3 | 498 | return pv_info.paravirt_enabled; |
f8822f42 | 499 | } |
d3561b7f | 500 | |
faca6227 | 501 | static inline void load_sp0(struct tss_struct *tss, |
d3561b7f RR |
502 | struct thread_struct *thread) |
503 | { | |
faca6227 | 504 | PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread); |
d3561b7f RR |
505 | } |
506 | ||
93b1eab3 | 507 | #define ARCH_SETUP pv_init_ops.arch_setup(); |
d3561b7f RR |
508 | static inline unsigned long get_wallclock(void) |
509 | { | |
93b1eab3 | 510 | return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock); |
d3561b7f RR |
511 | } |
512 | ||
513 | static inline int set_wallclock(unsigned long nowtime) | |
514 | { | |
93b1eab3 | 515 | return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime); |
d3561b7f RR |
516 | } |
517 | ||
e30fab3a | 518 | static inline void (*choose_time_init(void))(void) |
d3561b7f | 519 | { |
93b1eab3 | 520 | return pv_time_ops.time_init; |
d3561b7f RR |
521 | } |
522 | ||
523 | /* The paravirtualized CPUID instruction. */ | |
524 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | |
525 | unsigned int *ecx, unsigned int *edx) | |
526 | { | |
93b1eab3 | 527 | PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx); |
d3561b7f RR |
528 | } |
529 | ||
530 | /* | |
531 | * These special macros can be used to get or set a debugging register | |
532 | */ | |
f8822f42 JF |
533 | static inline unsigned long paravirt_get_debugreg(int reg) |
534 | { | |
93b1eab3 | 535 | return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg); |
f8822f42 JF |
536 | } |
537 | #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg) | |
538 | static inline void set_debugreg(unsigned long val, int reg) | |
539 | { | |
93b1eab3 | 540 | PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val); |
f8822f42 | 541 | } |
d3561b7f | 542 | |
f8822f42 JF |
543 | static inline void clts(void) |
544 | { | |
93b1eab3 | 545 | PVOP_VCALL0(pv_cpu_ops.clts); |
f8822f42 | 546 | } |
d3561b7f | 547 | |
f8822f42 JF |
548 | static inline unsigned long read_cr0(void) |
549 | { | |
93b1eab3 | 550 | return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0); |
f8822f42 | 551 | } |
d3561b7f | 552 | |
f8822f42 JF |
553 | static inline void write_cr0(unsigned long x) |
554 | { | |
93b1eab3 | 555 | PVOP_VCALL1(pv_cpu_ops.write_cr0, x); |
f8822f42 JF |
556 | } |
557 | ||
558 | static inline unsigned long read_cr2(void) | |
559 | { | |
93b1eab3 | 560 | return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2); |
f8822f42 JF |
561 | } |
562 | ||
563 | static inline void write_cr2(unsigned long x) | |
564 | { | |
93b1eab3 | 565 | PVOP_VCALL1(pv_mmu_ops.write_cr2, x); |
f8822f42 JF |
566 | } |
567 | ||
568 | static inline unsigned long read_cr3(void) | |
569 | { | |
93b1eab3 | 570 | return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3); |
f8822f42 | 571 | } |
d3561b7f | 572 | |
f8822f42 JF |
573 | static inline void write_cr3(unsigned long x) |
574 | { | |
93b1eab3 | 575 | PVOP_VCALL1(pv_mmu_ops.write_cr3, x); |
f8822f42 | 576 | } |
d3561b7f | 577 | |
f8822f42 JF |
578 | static inline unsigned long read_cr4(void) |
579 | { | |
93b1eab3 | 580 | return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4); |
f8822f42 JF |
581 | } |
582 | static inline unsigned long read_cr4_safe(void) | |
583 | { | |
93b1eab3 | 584 | return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe); |
f8822f42 | 585 | } |
d3561b7f | 586 | |
f8822f42 JF |
587 | static inline void write_cr4(unsigned long x) |
588 | { | |
93b1eab3 | 589 | PVOP_VCALL1(pv_cpu_ops.write_cr4, x); |
f8822f42 | 590 | } |
3dc494e8 | 591 | |
d3561b7f RR |
592 | static inline void raw_safe_halt(void) |
593 | { | |
93b1eab3 | 594 | PVOP_VCALL0(pv_irq_ops.safe_halt); |
d3561b7f RR |
595 | } |
596 | ||
597 | static inline void halt(void) | |
598 | { | |
93b1eab3 | 599 | PVOP_VCALL0(pv_irq_ops.safe_halt); |
f8822f42 JF |
600 | } |
601 | ||
602 | static inline void wbinvd(void) | |
603 | { | |
93b1eab3 | 604 | PVOP_VCALL0(pv_cpu_ops.wbinvd); |
d3561b7f | 605 | } |
d3561b7f | 606 | |
93b1eab3 | 607 | #define get_kernel_rpl() (pv_info.kernel_rpl) |
d3561b7f | 608 | |
f8822f42 JF |
609 | static inline u64 paravirt_read_msr(unsigned msr, int *err) |
610 | { | |
93b1eab3 | 611 | return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err); |
f8822f42 JF |
612 | } |
613 | static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high) | |
614 | { | |
93b1eab3 | 615 | return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high); |
f8822f42 JF |
616 | } |
617 | ||
90a0a06a | 618 | /* These should all do BUG_ON(_err), but our headers are too tangled. */ |
f8822f42 JF |
619 | #define rdmsr(msr,val1,val2) do { \ |
620 | int _err; \ | |
621 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
622 | val1 = (u32)_l; \ | |
623 | val2 = _l >> 32; \ | |
d3561b7f RR |
624 | } while(0) |
625 | ||
f8822f42 JF |
626 | #define wrmsr(msr,val1,val2) do { \ |
627 | paravirt_write_msr(msr, val1, val2); \ | |
d3561b7f RR |
628 | } while(0) |
629 | ||
f8822f42 JF |
630 | #define rdmsrl(msr,val) do { \ |
631 | int _err; \ | |
632 | val = paravirt_read_msr(msr, &_err); \ | |
d3561b7f RR |
633 | } while(0) |
634 | ||
b9e3614f | 635 | #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32) |
f8822f42 | 636 | #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b) |
d3561b7f RR |
637 | |
638 | /* rdmsr with exception handling */ | |
f8822f42 JF |
639 | #define rdmsr_safe(msr,a,b) ({ \ |
640 | int _err; \ | |
641 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
642 | (*a) = (u32)_l; \ | |
643 | (*b) = _l >> 32; \ | |
d3561b7f RR |
644 | _err; }) |
645 | ||
f8822f42 JF |
646 | |
647 | static inline u64 paravirt_read_tsc(void) | |
648 | { | |
93b1eab3 | 649 | return PVOP_CALL0(u64, pv_cpu_ops.read_tsc); |
f8822f42 | 650 | } |
d3561b7f | 651 | |
f8822f42 JF |
652 | #define rdtscl(low) do { \ |
653 | u64 _l = paravirt_read_tsc(); \ | |
654 | low = (int)_l; \ | |
d3561b7f RR |
655 | } while(0) |
656 | ||
f8822f42 | 657 | #define rdtscll(val) (val = paravirt_read_tsc()) |
d3561b7f | 658 | |
688340ea JF |
659 | static inline unsigned long long paravirt_sched_clock(void) |
660 | { | |
93b1eab3 | 661 | return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock); |
688340ea | 662 | } |
93b1eab3 | 663 | #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz()) |
6cb9a835 | 664 | |
f8822f42 JF |
665 | static inline unsigned long long paravirt_read_pmc(int counter) |
666 | { | |
93b1eab3 | 667 | return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter); |
f8822f42 | 668 | } |
d3561b7f | 669 | |
f8822f42 JF |
670 | #define rdpmc(counter,low,high) do { \ |
671 | u64 _l = paravirt_read_pmc(counter); \ | |
672 | low = (u32)_l; \ | |
673 | high = _l >> 32; \ | |
674 | } while(0) | |
3dc494e8 | 675 | |
e5aaac44 GOC |
676 | static inline unsigned long long paravirt_rdtscp(unsigned int *aux) |
677 | { | |
678 | return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux); | |
679 | } | |
680 | ||
681 | #define rdtscp(low, high, aux) \ | |
682 | do { \ | |
683 | int __aux; \ | |
684 | unsigned long __val = paravirt_rdtscp(&__aux); \ | |
685 | (low) = (u32)__val; \ | |
686 | (high) = (u32)(__val >> 32); \ | |
687 | (aux) = __aux; \ | |
688 | } while (0) | |
689 | ||
690 | #define rdtscpll(val, aux) \ | |
691 | do { \ | |
692 | unsigned long __aux; \ | |
693 | val = paravirt_rdtscp(&__aux); \ | |
694 | (aux) = __aux; \ | |
695 | } while (0) | |
696 | ||
f8822f42 JF |
697 | static inline void load_TR_desc(void) |
698 | { | |
93b1eab3 | 699 | PVOP_VCALL0(pv_cpu_ops.load_tr_desc); |
f8822f42 | 700 | } |
6b68f01b | 701 | static inline void load_gdt(const struct desc_ptr *dtr) |
f8822f42 | 702 | { |
93b1eab3 | 703 | PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr); |
f8822f42 | 704 | } |
6b68f01b | 705 | static inline void load_idt(const struct desc_ptr *dtr) |
f8822f42 | 706 | { |
93b1eab3 | 707 | PVOP_VCALL1(pv_cpu_ops.load_idt, dtr); |
f8822f42 JF |
708 | } |
709 | static inline void set_ldt(const void *addr, unsigned entries) | |
710 | { | |
93b1eab3 | 711 | PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries); |
f8822f42 | 712 | } |
6b68f01b | 713 | static inline void store_gdt(struct desc_ptr *dtr) |
f8822f42 | 714 | { |
93b1eab3 | 715 | PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr); |
f8822f42 | 716 | } |
6b68f01b | 717 | static inline void store_idt(struct desc_ptr *dtr) |
f8822f42 | 718 | { |
93b1eab3 | 719 | PVOP_VCALL1(pv_cpu_ops.store_idt, dtr); |
f8822f42 JF |
720 | } |
721 | static inline unsigned long paravirt_store_tr(void) | |
722 | { | |
93b1eab3 | 723 | return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr); |
f8822f42 JF |
724 | } |
725 | #define store_tr(tr) ((tr) = paravirt_store_tr()) | |
726 | static inline void load_TLS(struct thread_struct *t, unsigned cpu) | |
727 | { | |
93b1eab3 | 728 | PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu); |
f8822f42 | 729 | } |
75b8bb3e GOC |
730 | |
731 | static inline void write_ldt_entry(struct desc_struct *dt, int entry, | |
732 | const void *desc) | |
f8822f42 | 733 | { |
75b8bb3e | 734 | PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc); |
f8822f42 | 735 | } |
014b15be GOC |
736 | |
737 | static inline void write_gdt_entry(struct desc_struct *dt, int entry, | |
738 | void *desc, int type) | |
f8822f42 | 739 | { |
014b15be | 740 | PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type); |
f8822f42 | 741 | } |
014b15be | 742 | |
8d947344 | 743 | static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) |
f8822f42 | 744 | { |
8d947344 | 745 | PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g); |
f8822f42 JF |
746 | } |
747 | static inline void set_iopl_mask(unsigned mask) | |
748 | { | |
93b1eab3 | 749 | PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask); |
f8822f42 | 750 | } |
3dc494e8 | 751 | |
d3561b7f RR |
752 | /* The paravirtualized I/O functions */ |
753 | static inline void slow_down_io(void) { | |
93b1eab3 | 754 | pv_cpu_ops.io_delay(); |
d3561b7f | 755 | #ifdef REALLY_SLOW_IO |
93b1eab3 JF |
756 | pv_cpu_ops.io_delay(); |
757 | pv_cpu_ops.io_delay(); | |
758 | pv_cpu_ops.io_delay(); | |
d3561b7f RR |
759 | #endif |
760 | } | |
761 | ||
13623d79 RR |
762 | #ifdef CONFIG_X86_LOCAL_APIC |
763 | /* | |
764 | * Basic functions accessing APICs. | |
765 | */ | |
42e0a9aa | 766 | static inline void apic_write(unsigned long reg, u32 v) |
13623d79 | 767 | { |
93b1eab3 | 768 | PVOP_VCALL2(pv_apic_ops.apic_write, reg, v); |
13623d79 RR |
769 | } |
770 | ||
42e0a9aa | 771 | static inline void apic_write_atomic(unsigned long reg, u32 v) |
13623d79 | 772 | { |
93b1eab3 | 773 | PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v); |
13623d79 RR |
774 | } |
775 | ||
42e0a9aa | 776 | static inline u32 apic_read(unsigned long reg) |
13623d79 | 777 | { |
93b1eab3 | 778 | return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg); |
13623d79 | 779 | } |
bbab4f3b ZA |
780 | |
781 | static inline void setup_boot_clock(void) | |
782 | { | |
93b1eab3 | 783 | PVOP_VCALL0(pv_apic_ops.setup_boot_clock); |
bbab4f3b ZA |
784 | } |
785 | ||
786 | static inline void setup_secondary_clock(void) | |
787 | { | |
93b1eab3 | 788 | PVOP_VCALL0(pv_apic_ops.setup_secondary_clock); |
bbab4f3b | 789 | } |
13623d79 RR |
790 | #endif |
791 | ||
6996d3b6 JF |
792 | static inline void paravirt_post_allocator_init(void) |
793 | { | |
93b1eab3 JF |
794 | if (pv_init_ops.post_allocator_init) |
795 | (*pv_init_ops.post_allocator_init)(); | |
6996d3b6 JF |
796 | } |
797 | ||
b239fb25 JF |
798 | static inline void paravirt_pagetable_setup_start(pgd_t *base) |
799 | { | |
93b1eab3 | 800 | (*pv_mmu_ops.pagetable_setup_start)(base); |
b239fb25 JF |
801 | } |
802 | ||
803 | static inline void paravirt_pagetable_setup_done(pgd_t *base) | |
804 | { | |
93b1eab3 | 805 | (*pv_mmu_ops.pagetable_setup_done)(base); |
b239fb25 | 806 | } |
3dc494e8 | 807 | |
ae5da273 ZA |
808 | #ifdef CONFIG_SMP |
809 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |
810 | unsigned long start_esp) | |
811 | { | |
93b1eab3 JF |
812 | PVOP_VCALL3(pv_apic_ops.startup_ipi_hook, |
813 | phys_apicid, start_eip, start_esp); | |
ae5da273 ZA |
814 | } |
815 | #endif | |
13623d79 | 816 | |
d6dd61c8 JF |
817 | static inline void paravirt_activate_mm(struct mm_struct *prev, |
818 | struct mm_struct *next) | |
819 | { | |
93b1eab3 | 820 | PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next); |
d6dd61c8 JF |
821 | } |
822 | ||
823 | static inline void arch_dup_mmap(struct mm_struct *oldmm, | |
824 | struct mm_struct *mm) | |
825 | { | |
93b1eab3 | 826 | PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm); |
d6dd61c8 JF |
827 | } |
828 | ||
829 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
830 | { | |
93b1eab3 | 831 | PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm); |
d6dd61c8 JF |
832 | } |
833 | ||
f8822f42 JF |
834 | static inline void __flush_tlb(void) |
835 | { | |
93b1eab3 | 836 | PVOP_VCALL0(pv_mmu_ops.flush_tlb_user); |
f8822f42 JF |
837 | } |
838 | static inline void __flush_tlb_global(void) | |
839 | { | |
93b1eab3 | 840 | PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel); |
f8822f42 JF |
841 | } |
842 | static inline void __flush_tlb_single(unsigned long addr) | |
843 | { | |
93b1eab3 | 844 | PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr); |
f8822f42 | 845 | } |
da181a8b | 846 | |
d4c10477 JF |
847 | static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, |
848 | unsigned long va) | |
849 | { | |
93b1eab3 | 850 | PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va); |
d4c10477 JF |
851 | } |
852 | ||
fdb4c338 | 853 | static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn) |
f8822f42 | 854 | { |
93b1eab3 | 855 | PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn); |
f8822f42 JF |
856 | } |
857 | static inline void paravirt_release_pt(unsigned pfn) | |
858 | { | |
93b1eab3 | 859 | PVOP_VCALL1(pv_mmu_ops.release_pt, pfn); |
f8822f42 | 860 | } |
c119ecce | 861 | |
f8822f42 JF |
862 | static inline void paravirt_alloc_pd(unsigned pfn) |
863 | { | |
93b1eab3 | 864 | PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn); |
f8822f42 | 865 | } |
c119ecce | 866 | |
f8822f42 JF |
867 | static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn, |
868 | unsigned start, unsigned count) | |
869 | { | |
93b1eab3 | 870 | PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count); |
f8822f42 JF |
871 | } |
872 | static inline void paravirt_release_pd(unsigned pfn) | |
da181a8b | 873 | { |
93b1eab3 | 874 | PVOP_VCALL1(pv_mmu_ops.release_pd, pfn); |
da181a8b RR |
875 | } |
876 | ||
ce6234b5 JF |
877 | #ifdef CONFIG_HIGHPTE |
878 | static inline void *kmap_atomic_pte(struct page *page, enum km_type type) | |
879 | { | |
880 | unsigned long ret; | |
93b1eab3 | 881 | ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type); |
ce6234b5 JF |
882 | return (void *)ret; |
883 | } | |
884 | #endif | |
885 | ||
f8822f42 JF |
886 | static inline void pte_update(struct mm_struct *mm, unsigned long addr, |
887 | pte_t *ptep) | |
da181a8b | 888 | { |
93b1eab3 | 889 | PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep); |
da181a8b RR |
890 | } |
891 | ||
f8822f42 JF |
892 | static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr, |
893 | pte_t *ptep) | |
da181a8b | 894 | { |
93b1eab3 | 895 | PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep); |
da181a8b RR |
896 | } |
897 | ||
f8822f42 JF |
898 | #ifdef CONFIG_X86_PAE |
899 | static inline pte_t __pte(unsigned long long val) | |
da181a8b | 900 | { |
93b1eab3 JF |
901 | unsigned long long ret = PVOP_CALL2(unsigned long long, |
902 | pv_mmu_ops.make_pte, | |
f8822f42 JF |
903 | val, val >> 32); |
904 | return (pte_t) { ret, ret >> 32 }; | |
da181a8b RR |
905 | } |
906 | ||
f8822f42 | 907 | static inline pmd_t __pmd(unsigned long long val) |
da181a8b | 908 | { |
93b1eab3 JF |
909 | return (pmd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pmd, |
910 | val, val >> 32) }; | |
f8822f42 JF |
911 | } |
912 | ||
913 | static inline pgd_t __pgd(unsigned long long val) | |
914 | { | |
93b1eab3 JF |
915 | return (pgd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pgd, |
916 | val, val >> 32) }; | |
f8822f42 JF |
917 | } |
918 | ||
919 | static inline unsigned long long pte_val(pte_t x) | |
920 | { | |
93b1eab3 JF |
921 | return PVOP_CALL2(unsigned long long, pv_mmu_ops.pte_val, |
922 | x.pte_low, x.pte_high); | |
f8822f42 JF |
923 | } |
924 | ||
925 | static inline unsigned long long pmd_val(pmd_t x) | |
926 | { | |
93b1eab3 JF |
927 | return PVOP_CALL2(unsigned long long, pv_mmu_ops.pmd_val, |
928 | x.pmd, x.pmd >> 32); | |
f8822f42 JF |
929 | } |
930 | ||
931 | static inline unsigned long long pgd_val(pgd_t x) | |
932 | { | |
93b1eab3 JF |
933 | return PVOP_CALL2(unsigned long long, pv_mmu_ops.pgd_val, |
934 | x.pgd, x.pgd >> 32); | |
f8822f42 JF |
935 | } |
936 | ||
937 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
938 | { | |
93b1eab3 | 939 | PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high); |
f8822f42 JF |
940 | } |
941 | ||
942 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
943 | pte_t *ptep, pte_t pteval) | |
944 | { | |
945 | /* 5 arg words */ | |
93b1eab3 | 946 | pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval); |
da181a8b RR |
947 | } |
948 | ||
da181a8b RR |
949 | static inline void set_pte_atomic(pte_t *ptep, pte_t pteval) |
950 | { | |
93b1eab3 JF |
951 | PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep, |
952 | pteval.pte_low, pteval.pte_high); | |
da181a8b RR |
953 | } |
954 | ||
f8822f42 JF |
955 | static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, |
956 | pte_t *ptep, pte_t pte) | |
da181a8b | 957 | { |
f8822f42 | 958 | /* 5 arg words */ |
93b1eab3 | 959 | pv_mmu_ops.set_pte_present(mm, addr, ptep, pte); |
da181a8b RR |
960 | } |
961 | ||
f8822f42 JF |
962 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) |
963 | { | |
93b1eab3 JF |
964 | PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, |
965 | pmdval.pmd, pmdval.pmd >> 32); | |
f8822f42 JF |
966 | } |
967 | ||
da181a8b RR |
968 | static inline void set_pud(pud_t *pudp, pud_t pudval) |
969 | { | |
93b1eab3 JF |
970 | PVOP_VCALL3(pv_mmu_ops.set_pud, pudp, |
971 | pudval.pgd.pgd, pudval.pgd.pgd >> 32); | |
da181a8b RR |
972 | } |
973 | ||
974 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
975 | { | |
93b1eab3 | 976 | PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep); |
da181a8b RR |
977 | } |
978 | ||
979 | static inline void pmd_clear(pmd_t *pmdp) | |
980 | { | |
93b1eab3 | 981 | PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp); |
f8822f42 JF |
982 | } |
983 | ||
f8822f42 | 984 | #else /* !CONFIG_X86_PAE */ |
4cdd9c89 | 985 | |
f8822f42 JF |
986 | static inline pte_t __pte(unsigned long val) |
987 | { | |
93b1eab3 | 988 | return (pte_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pte, val) }; |
da181a8b | 989 | } |
f8822f42 JF |
990 | |
991 | static inline pgd_t __pgd(unsigned long val) | |
992 | { | |
93b1eab3 | 993 | return (pgd_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pgd, val) }; |
f8822f42 JF |
994 | } |
995 | ||
996 | static inline unsigned long pte_val(pte_t x) | |
997 | { | |
93b1eab3 | 998 | return PVOP_CALL1(unsigned long, pv_mmu_ops.pte_val, x.pte_low); |
f8822f42 JF |
999 | } |
1000 | ||
1001 | static inline unsigned long pgd_val(pgd_t x) | |
1002 | { | |
93b1eab3 | 1003 | return PVOP_CALL1(unsigned long, pv_mmu_ops.pgd_val, x.pgd); |
f8822f42 JF |
1004 | } |
1005 | ||
1006 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
1007 | { | |
93b1eab3 | 1008 | PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low); |
f8822f42 JF |
1009 | } |
1010 | ||
1011 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
1012 | pte_t *ptep, pte_t pteval) | |
1013 | { | |
93b1eab3 | 1014 | PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low); |
f8822f42 JF |
1015 | } |
1016 | ||
1017 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
1018 | { | |
93b1eab3 | 1019 | PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd); |
f8822f42 | 1020 | } |
f8822f42 | 1021 | #endif /* CONFIG_X86_PAE */ |
da181a8b | 1022 | |
8965c1c0 JF |
1023 | /* Lazy mode for batching updates / context switch */ |
1024 | enum paravirt_lazy_mode { | |
1025 | PARAVIRT_LAZY_NONE, | |
1026 | PARAVIRT_LAZY_MMU, | |
1027 | PARAVIRT_LAZY_CPU, | |
1028 | }; | |
1029 | ||
1030 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void); | |
1031 | void paravirt_enter_lazy_cpu(void); | |
1032 | void paravirt_leave_lazy_cpu(void); | |
1033 | void paravirt_enter_lazy_mmu(void); | |
1034 | void paravirt_leave_lazy_mmu(void); | |
1035 | void paravirt_leave_lazy(enum paravirt_lazy_mode mode); | |
1036 | ||
9226d125 | 1037 | #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE |
f8822f42 JF |
1038 | static inline void arch_enter_lazy_cpu_mode(void) |
1039 | { | |
8965c1c0 | 1040 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter); |
f8822f42 JF |
1041 | } |
1042 | ||
1043 | static inline void arch_leave_lazy_cpu_mode(void) | |
1044 | { | |
8965c1c0 | 1045 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); |
f8822f42 JF |
1046 | } |
1047 | ||
1048 | static inline void arch_flush_lazy_cpu_mode(void) | |
1049 | { | |
8965c1c0 JF |
1050 | if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) { |
1051 | arch_leave_lazy_cpu_mode(); | |
1052 | arch_enter_lazy_cpu_mode(); | |
1053 | } | |
f8822f42 JF |
1054 | } |
1055 | ||
9226d125 ZA |
1056 | |
1057 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
f8822f42 JF |
1058 | static inline void arch_enter_lazy_mmu_mode(void) |
1059 | { | |
8965c1c0 | 1060 | PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter); |
f8822f42 JF |
1061 | } |
1062 | ||
1063 | static inline void arch_leave_lazy_mmu_mode(void) | |
1064 | { | |
8965c1c0 | 1065 | PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); |
f8822f42 JF |
1066 | } |
1067 | ||
1068 | static inline void arch_flush_lazy_mmu_mode(void) | |
1069 | { | |
8965c1c0 JF |
1070 | if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) { |
1071 | arch_leave_lazy_mmu_mode(); | |
1072 | arch_enter_lazy_mmu_mode(); | |
1073 | } | |
f8822f42 | 1074 | } |
9226d125 | 1075 | |
45876233 JF |
1076 | void _paravirt_nop(void); |
1077 | #define paravirt_nop ((void *)_paravirt_nop) | |
1078 | ||
139ec7c4 | 1079 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
98de032b | 1080 | struct paravirt_patch_site { |
139ec7c4 RR |
1081 | u8 *instr; /* original instructions */ |
1082 | u8 instrtype; /* type of this instruction */ | |
1083 | u8 len; /* length of original instruction */ | |
1084 | u16 clobbers; /* what registers you may clobber */ | |
1085 | }; | |
1086 | ||
98de032b JF |
1087 | extern struct paravirt_patch_site __parainstructions[], |
1088 | __parainstructions_end[]; | |
1089 | ||
2e47d3e6 GOC |
1090 | #ifdef CONFIG_X86_32 |
1091 | #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;" | |
1092 | #define PV_RESTORE_REGS "popl %%edx; popl %%ecx" | |
1093 | #define PV_FLAGS_ARG "0" | |
1094 | #define PV_EXTRA_CLOBBERS | |
1095 | #define PV_VEXTRA_CLOBBERS | |
1096 | #else | |
1097 | /* We save some registers, but all of them, that's too much. We clobber all | |
1098 | * caller saved registers but the argument parameter */ | |
1099 | #define PV_SAVE_REGS "pushq %%rdi;" | |
1100 | #define PV_RESTORE_REGS "popq %%rdi;" | |
1101 | #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx" | |
1102 | #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx" | |
1103 | #define PV_FLAGS_ARG "D" | |
1104 | #endif | |
1105 | ||
139ec7c4 RR |
1106 | static inline unsigned long __raw_local_save_flags(void) |
1107 | { | |
1108 | unsigned long f; | |
1109 | ||
2e47d3e6 | 1110 | asm volatile(paravirt_alt(PV_SAVE_REGS |
d5822035 | 1111 | PARAVIRT_CALL |
2e47d3e6 | 1112 | PV_RESTORE_REGS) |
d5822035 | 1113 | : "=a"(f) |
93b1eab3 | 1114 | : paravirt_type(pv_irq_ops.save_fl), |
42c24fa2 | 1115 | paravirt_clobber(CLBR_EAX) |
2e47d3e6 | 1116 | : "memory", "cc" PV_VEXTRA_CLOBBERS); |
139ec7c4 RR |
1117 | return f; |
1118 | } | |
1119 | ||
1120 | static inline void raw_local_irq_restore(unsigned long f) | |
1121 | { | |
2e47d3e6 | 1122 | asm volatile(paravirt_alt(PV_SAVE_REGS |
d5822035 | 1123 | PARAVIRT_CALL |
2e47d3e6 | 1124 | PV_RESTORE_REGS) |
d5822035 | 1125 | : "=a"(f) |
2e47d3e6 | 1126 | : PV_FLAGS_ARG(f), |
93b1eab3 | 1127 | paravirt_type(pv_irq_ops.restore_fl), |
d5822035 | 1128 | paravirt_clobber(CLBR_EAX) |
2e47d3e6 | 1129 | : "memory", "cc" PV_EXTRA_CLOBBERS); |
139ec7c4 RR |
1130 | } |
1131 | ||
1132 | static inline void raw_local_irq_disable(void) | |
1133 | { | |
2e47d3e6 | 1134 | asm volatile(paravirt_alt(PV_SAVE_REGS |
d5822035 | 1135 | PARAVIRT_CALL |
2e47d3e6 | 1136 | PV_RESTORE_REGS) |
d5822035 | 1137 | : |
93b1eab3 | 1138 | : paravirt_type(pv_irq_ops.irq_disable), |
d5822035 | 1139 | paravirt_clobber(CLBR_EAX) |
2e47d3e6 | 1140 | : "memory", "eax", "cc" PV_EXTRA_CLOBBERS); |
139ec7c4 RR |
1141 | } |
1142 | ||
1143 | static inline void raw_local_irq_enable(void) | |
1144 | { | |
2e47d3e6 | 1145 | asm volatile(paravirt_alt(PV_SAVE_REGS |
d5822035 | 1146 | PARAVIRT_CALL |
2e47d3e6 | 1147 | PV_RESTORE_REGS) |
d5822035 | 1148 | : |
93b1eab3 | 1149 | : paravirt_type(pv_irq_ops.irq_enable), |
d5822035 | 1150 | paravirt_clobber(CLBR_EAX) |
2e47d3e6 | 1151 | : "memory", "eax", "cc" PV_EXTRA_CLOBBERS); |
139ec7c4 RR |
1152 | } |
1153 | ||
1154 | static inline unsigned long __raw_local_irq_save(void) | |
1155 | { | |
1156 | unsigned long f; | |
1157 | ||
d5822035 JF |
1158 | f = __raw_local_save_flags(); |
1159 | raw_local_irq_disable(); | |
139ec7c4 RR |
1160 | return f; |
1161 | } | |
1162 | ||
294688c0 | 1163 | /* Make sure as little as possible of this mess escapes. */ |
d5822035 | 1164 | #undef PARAVIRT_CALL |
1a45b7aa JF |
1165 | #undef __PVOP_CALL |
1166 | #undef __PVOP_VCALL | |
f8822f42 JF |
1167 | #undef PVOP_VCALL0 |
1168 | #undef PVOP_CALL0 | |
1169 | #undef PVOP_VCALL1 | |
1170 | #undef PVOP_CALL1 | |
1171 | #undef PVOP_VCALL2 | |
1172 | #undef PVOP_CALL2 | |
1173 | #undef PVOP_VCALL3 | |
1174 | #undef PVOP_CALL3 | |
1175 | #undef PVOP_VCALL4 | |
1176 | #undef PVOP_CALL4 | |
139ec7c4 | 1177 | |
d3561b7f RR |
1178 | #else /* __ASSEMBLY__ */ |
1179 | ||
658be9d3 | 1180 | #define _PVSITE(ptype, clobbers, ops, word, algn) \ |
139ec7c4 RR |
1181 | 771:; \ |
1182 | ops; \ | |
1183 | 772:; \ | |
1184 | .pushsection .parainstructions,"a"; \ | |
658be9d3 GOC |
1185 | .align algn; \ |
1186 | word 771b; \ | |
139ec7c4 RR |
1187 | .byte ptype; \ |
1188 | .byte 772b-771b; \ | |
1189 | .short clobbers; \ | |
1190 | .popsection | |
1191 | ||
658be9d3 GOC |
1192 | |
1193 | #ifdef CONFIG_X86_64 | |
6057fc82 GOC |
1194 | #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx |
1195 | #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax | |
1196 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) | |
658be9d3 GOC |
1197 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) |
1198 | #else | |
6057fc82 GOC |
1199 | #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx |
1200 | #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax | |
1201 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) | |
658be9d3 GOC |
1202 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) |
1203 | #endif | |
1204 | ||
93b1eab3 JF |
1205 | #define INTERRUPT_RETURN \ |
1206 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \ | |
1207 | jmp *%cs:pv_cpu_ops+PV_CPU_iret) | |
d5822035 JF |
1208 | |
1209 | #define DISABLE_INTERRUPTS(clobbers) \ | |
93b1eab3 | 1210 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ |
6057fc82 | 1211 | PV_SAVE_REGS; \ |
93b1eab3 | 1212 | call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \ |
6057fc82 | 1213 | PV_RESTORE_REGS;) \ |
d5822035 JF |
1214 | |
1215 | #define ENABLE_INTERRUPTS(clobbers) \ | |
93b1eab3 | 1216 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ |
6057fc82 | 1217 | PV_SAVE_REGS; \ |
93b1eab3 | 1218 | call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \ |
6057fc82 | 1219 | PV_RESTORE_REGS;) |
d5822035 | 1220 | |
6abcd98f GOC |
1221 | #define ENABLE_INTERRUPTS_SYSCALL_RET \ |
1222 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\ | |
1223 | CLBR_NONE, \ | |
1224 | jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret) | |
139ec7c4 | 1225 | |
2e47d3e6 | 1226 | |
6057fc82 | 1227 | #ifdef CONFIG_X86_32 |
139ec7c4 | 1228 | #define GET_CR0_INTO_EAX \ |
42c24fa2 | 1229 | push %ecx; push %edx; \ |
93b1eab3 | 1230 | call *pv_cpu_ops+PV_CPU_read_cr0; \ |
42c24fa2 | 1231 | pop %edx; pop %ecx |
4a8c4c4e | 1232 | #else |
e801f864 GOC |
1233 | #define SWAPGS \ |
1234 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ | |
1235 | PV_SAVE_REGS; \ | |
1236 | call *pv_cpu_ops+PV_CPU_swapgs; \ | |
1237 | PV_RESTORE_REGS \ | |
1238 | ) | |
1239 | ||
4a8c4c4e GOC |
1240 | #define GET_CR2_INTO_RCX \ |
1241 | call *pv_mmu_ops+PV_MMU_read_cr2; \ | |
1242 | movq %rax, %rcx; \ | |
1243 | xorq %rax, %rax; | |
1244 | ||
6057fc82 | 1245 | #endif |
139ec7c4 | 1246 | |
d3561b7f RR |
1247 | #endif /* __ASSEMBLY__ */ |
1248 | #endif /* CONFIG_PARAVIRT */ | |
1249 | #endif /* __ASM_PARAVIRT_H */ |