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1da177e4 LT |
1 | /* $Id: parport.h,v 1.11 2001/05/11 07:54:24 davem Exp $ |
2 | * parport.h: sparc64 specific parport initialization and dma. | |
3 | * | |
4 | * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) | |
5 | */ | |
6 | ||
7 | #ifndef _ASM_SPARC64_PARPORT_H | |
8 | #define _ASM_SPARC64_PARPORT_H 1 | |
9 | ||
10 | #include <asm/ebus.h> | |
11 | #include <asm/isa.h> | |
12 | #include <asm/ns87303.h> | |
13 | ||
14 | #define PARPORT_PC_MAX_PORTS PARPORT_MAX | |
15 | ||
7fbacd52 AV |
16 | /* |
17 | * While sparc64 doesn't have an ISA DMA API, we provide something that looks | |
18 | * close enough to make parport_pc happy | |
19 | */ | |
20 | #define HAS_DMA | |
21 | ||
1da177e4 LT |
22 | static struct sparc_ebus_info { |
23 | struct ebus_dma_info info; | |
24 | unsigned int addr; | |
25 | unsigned int count; | |
26 | } sparc_ebus_dmas[PARPORT_PC_MAX_PORTS]; | |
27 | ||
28 | static __inline__ void enable_dma(unsigned int dmanr) | |
29 | { | |
e3e01d60 ED |
30 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); |
31 | ||
1da177e4 LT |
32 | if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, |
33 | sparc_ebus_dmas[dmanr].addr, | |
34 | sparc_ebus_dmas[dmanr].count)) | |
35 | BUG(); | |
1da177e4 LT |
36 | } |
37 | ||
38 | static __inline__ void disable_dma(unsigned int dmanr) | |
39 | { | |
40 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); | |
41 | } | |
42 | ||
43 | static __inline__ void clear_dma_ff(unsigned int dmanr) | |
44 | { | |
45 | /* nothing */ | |
46 | } | |
47 | ||
48 | static __inline__ void set_dma_mode(unsigned int dmanr, char mode) | |
49 | { | |
50 | ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); | |
51 | } | |
52 | ||
53 | static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int addr) | |
54 | { | |
55 | sparc_ebus_dmas[dmanr].addr = addr; | |
56 | } | |
57 | ||
58 | static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) | |
59 | { | |
60 | sparc_ebus_dmas[dmanr].count = count; | |
61 | } | |
62 | ||
63 | static __inline__ unsigned int get_dma_residue(unsigned int dmanr) | |
64 | { | |
65 | return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); | |
66 | } | |
67 | ||
68 | static int ebus_ecpp_p(struct linux_ebus_device *edev) | |
69 | { | |
690c8fd3 | 70 | if (!strcmp(edev->prom_node->name, "ecpp")) |
1da177e4 | 71 | return 1; |
690c8fd3 DM |
72 | if (!strcmp(edev->prom_node->name, "parallel")) { |
73 | char *compat; | |
74 | ||
75 | compat = of_get_property(edev->prom_node, | |
76 | "compatible", NULL); | |
77 | if (compat && | |
78 | (!strcmp(compat, "ecpp") || | |
79 | !strcmp(compat, "ns87317-ecpp") || | |
80 | !strcmp(compat + 13, "ecpp"))) | |
1da177e4 LT |
81 | return 1; |
82 | } | |
83 | return 0; | |
84 | } | |
85 | ||
86 | static int parport_isa_probe(int count) | |
87 | { | |
88 | struct sparc_isa_bridge *isa_br; | |
89 | struct sparc_isa_device *isa_dev; | |
90 | ||
91 | for_each_isa(isa_br) { | |
92 | for_each_isadev(isa_dev, isa_br) { | |
93 | struct sparc_isa_device *child; | |
94 | unsigned long base; | |
95 | ||
690c8fd3 | 96 | if (strcmp(isa_dev->prom_node->name, "dma")) |
1da177e4 LT |
97 | continue; |
98 | ||
99 | child = isa_dev->child; | |
100 | while (child) { | |
690c8fd3 | 101 | if (!strcmp(child->prom_node->name, "parallel")) |
1da177e4 LT |
102 | break; |
103 | child = child->next; | |
104 | } | |
105 | if (!child) | |
106 | continue; | |
107 | ||
108 | base = child->resource.start; | |
109 | ||
110 | /* No DMA, see commentary in | |
111 | * asm-sparc64/floppy.h:isa_floppy_init() | |
112 | */ | |
113 | if (parport_pc_probe_port(base, base + 0x400, | |
114 | child->irq, PARPORT_DMA_NOFIFO, | |
115 | child->bus->self)) | |
116 | count++; | |
117 | } | |
118 | } | |
119 | ||
120 | return count; | |
121 | } | |
122 | ||
123 | static int parport_pc_find_nonpci_ports (int autoirq, int autodma) | |
124 | { | |
125 | struct linux_ebus *ebus; | |
126 | struct linux_ebus_device *edev; | |
127 | int count = 0; | |
128 | ||
129 | for_each_ebus(ebus) { | |
130 | for_each_ebusdev(edev, ebus) { | |
131 | if (ebus_ecpp_p(edev)) { | |
132 | unsigned long base = edev->resource[0].start; | |
133 | unsigned long config = edev->resource[1].start; | |
134 | unsigned long d_base = edev->resource[2].start; | |
135 | unsigned long d_len; | |
136 | ||
137 | spin_lock_init(&sparc_ebus_dmas[count].info.lock); | |
138 | d_len = (edev->resource[2].end - | |
139 | d_base) + 1; | |
140 | sparc_ebus_dmas[count].info.regs = | |
141 | ioremap(d_base, d_len); | |
142 | if (!sparc_ebus_dmas[count].info.regs) | |
143 | continue; | |
144 | sparc_ebus_dmas[count].info.flags = 0; | |
145 | sparc_ebus_dmas[count].info.callback = NULL; | |
146 | sparc_ebus_dmas[count].info.client_cookie = NULL; | |
147 | sparc_ebus_dmas[count].info.irq = 0xdeadbeef; | |
148 | strcpy(sparc_ebus_dmas[count].info.name, "parport"); | |
149 | if (ebus_dma_register(&sparc_ebus_dmas[count].info)) | |
150 | continue; | |
151 | ebus_dma_irq_enable(&sparc_ebus_dmas[count].info, 1); | |
152 | ||
153 | /* Configure IRQ to Push Pull, Level Low */ | |
154 | /* Enable ECP, set bit 2 of the CTR first */ | |
155 | outb(0x04, base + 0x02); | |
156 | ns87303_modify(config, PCR, | |
157 | PCR_EPP_ENABLE | | |
158 | PCR_IRQ_ODRAIN, | |
159 | PCR_ECP_ENABLE | | |
160 | PCR_ECP_CLK_ENA | | |
161 | PCR_IRQ_POLAR); | |
162 | ||
163 | /* CTR bit 5 controls direction of port */ | |
164 | ns87303_modify(config, PTR, | |
165 | 0, PTR_LPT_REG_DIR); | |
166 | ||
167 | if (parport_pc_probe_port(base, base + 0x400, | |
168 | edev->irqs[0], | |
169 | count, ebus->self)) | |
170 | count++; | |
171 | } | |
172 | } | |
173 | } | |
174 | ||
175 | count = parport_isa_probe(count); | |
176 | ||
177 | return count; | |
178 | } | |
179 | ||
180 | #endif /* !(_ASM_SPARC64_PARPORT_H */ |