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1da177e4 LT |
1 | /* |
2 | * $Id: io.h,v 1.30 2001/12/21 01:23:21 davem Exp $ | |
3 | */ | |
4 | #ifndef __SPARC_IO_H | |
5 | #define __SPARC_IO_H | |
6 | ||
7 | #include <linux/kernel.h> | |
8 | #include <linux/types.h> | |
9 | #include <linux/ioport.h> /* struct resource */ | |
10 | ||
11 | #include <asm/page.h> /* IO address mapping routines need this */ | |
12 | #include <asm/system.h> | |
13 | ||
14 | #define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) | |
15 | ||
16 | static inline u32 flip_dword (u32 l) | |
17 | { | |
18 | return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); | |
19 | } | |
20 | ||
21 | static inline u16 flip_word (u16 w) | |
22 | { | |
23 | return ((w&0xff) << 8) | ((w>>8)&0xff); | |
24 | } | |
25 | ||
26 | #define mmiowb() | |
27 | ||
28 | /* | |
29 | * Memory mapped I/O to PCI | |
30 | */ | |
31 | ||
32 | static inline u8 __raw_readb(const volatile void __iomem *addr) | |
33 | { | |
34 | return *(__force volatile u8 *)addr; | |
35 | } | |
36 | ||
37 | static inline u16 __raw_readw(const volatile void __iomem *addr) | |
38 | { | |
39 | return *(__force volatile u16 *)addr; | |
40 | } | |
41 | ||
42 | static inline u32 __raw_readl(const volatile void __iomem *addr) | |
43 | { | |
44 | return *(__force volatile u32 *)addr; | |
45 | } | |
46 | ||
47 | static inline void __raw_writeb(u8 b, volatile void __iomem *addr) | |
48 | { | |
49 | *(__force volatile u8 *)addr = b; | |
50 | } | |
51 | ||
52 | static inline void __raw_writew(u16 w, volatile void __iomem *addr) | |
53 | { | |
54 | *(__force volatile u16 *)addr = w; | |
55 | } | |
56 | ||
57 | static inline void __raw_writel(u32 l, volatile void __iomem *addr) | |
58 | { | |
59 | *(__force volatile u32 *)addr = l; | |
60 | } | |
61 | ||
62 | static inline u8 __readb(const volatile void __iomem *addr) | |
63 | { | |
64 | return *(__force volatile u8 *)addr; | |
65 | } | |
66 | ||
67 | static inline u16 __readw(const volatile void __iomem *addr) | |
68 | { | |
69 | return flip_word(*(__force volatile u16 *)addr); | |
70 | } | |
71 | ||
72 | static inline u32 __readl(const volatile void __iomem *addr) | |
73 | { | |
74 | return flip_dword(*(__force volatile u32 *)addr); | |
75 | } | |
76 | ||
77 | static inline void __writeb(u8 b, volatile void __iomem *addr) | |
78 | { | |
79 | *(__force volatile u8 *)addr = b; | |
80 | } | |
81 | ||
82 | static inline void __writew(u16 w, volatile void __iomem *addr) | |
83 | { | |
84 | *(__force volatile u16 *)addr = flip_word(w); | |
85 | } | |
86 | ||
87 | static inline void __writel(u32 l, volatile void __iomem *addr) | |
88 | { | |
89 | *(__force volatile u32 *)addr = flip_dword(l); | |
90 | } | |
91 | ||
92 | #define readb(__addr) __readb(__addr) | |
93 | #define readw(__addr) __readw(__addr) | |
94 | #define readl(__addr) __readl(__addr) | |
95 | #define readb_relaxed(__addr) readb(__addr) | |
96 | #define readw_relaxed(__addr) readw(__addr) | |
97 | #define readl_relaxed(__addr) readl(__addr) | |
98 | ||
99 | #define writeb(__b, __addr) __writeb((__b),(__addr)) | |
100 | #define writew(__w, __addr) __writew((__w),(__addr)) | |
101 | #define writel(__l, __addr) __writel((__l),(__addr)) | |
102 | ||
103 | /* | |
104 | * I/O space operations | |
105 | * | |
106 | * Arrangement on a Sun is somewhat complicated. | |
107 | * | |
108 | * First of all, we want to use standard Linux drivers | |
109 | * for keyboard, PC serial, etc. These drivers think | |
110 | * they access I/O space and use inb/outb. | |
111 | * On the other hand, EBus bridge accepts PCI *memory* | |
112 | * cycles and converts them into ISA *I/O* cycles. | |
113 | * Ergo, we want inb & outb to generate PCI memory cycles. | |
114 | * | |
115 | * If we want to issue PCI *I/O* cycles, we do this | |
116 | * with a low 64K fixed window in PCIC. This window gets | |
117 | * mapped somewhere into virtual kernel space and we | |
118 | * can use inb/outb again. | |
119 | */ | |
120 | #define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr)) | |
121 | #define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr)) | |
122 | #define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr)) | |
123 | #define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr)) | |
124 | ||
125 | #define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) | |
126 | #define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) | |
127 | #define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr)) | |
128 | #define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr)) | |
129 | ||
130 | #define inb_p(__addr) inb(__addr) | |
131 | #define outb_p(__b, __addr) outb(__b, __addr) | |
132 | #define inw_p(__addr) inw(__addr) | |
133 | #define outw_p(__w, __addr) outw(__w, __addr) | |
134 | #define inl_p(__addr) inl(__addr) | |
135 | #define outl_p(__l, __addr) outl(__l, __addr) | |
136 | ||
137 | void outsb(unsigned long addr, const void *src, unsigned long cnt); | |
138 | void outsw(unsigned long addr, const void *src, unsigned long cnt); | |
139 | void outsl(unsigned long addr, const void *src, unsigned long cnt); | |
140 | void insb(unsigned long addr, void *dst, unsigned long count); | |
141 | void insw(unsigned long addr, void *dst, unsigned long count); | |
142 | void insl(unsigned long addr, void *dst, unsigned long count); | |
143 | ||
144 | #define IO_SPACE_LIMIT 0xffffffff | |
145 | ||
146 | /* | |
147 | * SBus accessors. | |
148 | * | |
149 | * SBus has only one, memory mapped, I/O space. | |
150 | * We do not need to flip bytes for SBus of course. | |
151 | */ | |
152 | static inline u8 _sbus_readb(const volatile void __iomem *addr) | |
153 | { | |
154 | return *(__force volatile u8 *)addr; | |
155 | } | |
156 | ||
157 | static inline u16 _sbus_readw(const volatile void __iomem *addr) | |
158 | { | |
159 | return *(__force volatile u16 *)addr; | |
160 | } | |
161 | ||
162 | static inline u32 _sbus_readl(const volatile void __iomem *addr) | |
163 | { | |
164 | return *(__force volatile u32 *)addr; | |
165 | } | |
166 | ||
167 | static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) | |
168 | { | |
169 | *(__force volatile u8 *)addr = b; | |
170 | } | |
171 | ||
172 | static inline void _sbus_writew(u16 w, volatile void __iomem *addr) | |
173 | { | |
174 | *(__force volatile u16 *)addr = w; | |
175 | } | |
176 | ||
177 | static inline void _sbus_writel(u32 l, volatile void __iomem *addr) | |
178 | { | |
179 | *(__force volatile u32 *)addr = l; | |
180 | } | |
181 | ||
182 | /* | |
183 | * The only reason for #define's is to hide casts to unsigned long. | |
184 | */ | |
185 | #define sbus_readb(__addr) _sbus_readb(__addr) | |
186 | #define sbus_readw(__addr) _sbus_readw(__addr) | |
187 | #define sbus_readl(__addr) _sbus_readl(__addr) | |
188 | #define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) | |
189 | #define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) | |
190 | #define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) | |
191 | ||
192 | static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n) | |
193 | { | |
194 | while(n--) { | |
195 | sbus_writeb(c, __dst); | |
196 | __dst++; | |
197 | } | |
198 | } | |
199 | ||
200 | static inline void | |
201 | _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) | |
202 | { | |
203 | volatile void __iomem *d = dst; | |
204 | ||
205 | while (n--) { | |
206 | writeb(c, d); | |
207 | d++; | |
208 | } | |
209 | } | |
210 | ||
211 | #define memset_io(d,c,sz) _memset_io(d,c,sz) | |
212 | ||
213 | static inline void | |
214 | _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) | |
215 | { | |
216 | char *d = dst; | |
217 | ||
218 | while (n--) { | |
219 | char tmp = readb(src); | |
220 | *d++ = tmp; | |
221 | src++; | |
222 | } | |
223 | } | |
224 | ||
225 | #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) | |
226 | ||
227 | static inline void | |
228 | _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) | |
229 | { | |
230 | const char *s = src; | |
231 | volatile void __iomem *d = dst; | |
232 | ||
233 | while (n--) { | |
234 | char tmp = *s++; | |
235 | writeb(tmp, d); | |
236 | d++; | |
237 | } | |
238 | } | |
239 | ||
240 | #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) | |
241 | ||
242 | #ifdef __KERNEL__ | |
243 | ||
244 | /* | |
245 | * Bus number may be embedded in the higher bits of the physical address. | |
246 | * This is why we have no bus number argument to ioremap(). | |
247 | */ | |
248 | extern void __iomem *ioremap(unsigned long offset, unsigned long size); | |
249 | #define ioremap_nocache(X,Y) ioremap((X),(Y)) | |
250 | extern void iounmap(volatile void __iomem *addr); | |
251 | ||
749805dc DM |
252 | #define ioread8(X) readb(X) |
253 | #define ioread16(X) readw(X) | |
254 | #define ioread32(X) readl(X) | |
255 | #define iowrite8(val,X) writeb(val,X) | |
256 | #define iowrite16(val,X) writew(val,X) | |
257 | #define iowrite32(val,X) writel(val,X) | |
258 | ||
fdba0f2d AV |
259 | static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) |
260 | { | |
261 | insb((unsigned long __force)port, buf, count); | |
262 | } | |
263 | static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) | |
264 | { | |
265 | insw((unsigned long __force)port, buf, count); | |
266 | } | |
267 | ||
268 | static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) | |
269 | { | |
270 | insl((unsigned long __force)port, buf, count); | |
271 | } | |
272 | ||
273 | static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) | |
274 | { | |
275 | outsb((unsigned long __force)port, buf, count); | |
276 | } | |
277 | ||
278 | static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) | |
279 | { | |
280 | outsw((unsigned long __force)port, buf, count); | |
281 | } | |
282 | ||
283 | static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) | |
284 | { | |
285 | outsl((unsigned long __force)port, buf, count); | |
286 | } | |
287 | ||
749805dc DM |
288 | /* Create a virtual mapping cookie for an IO port range */ |
289 | extern void __iomem *ioport_map(unsigned long port, unsigned int nr); | |
290 | extern void ioport_unmap(void __iomem *); | |
291 | ||
292 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | |
293 | struct pci_dev; | |
294 | extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); | |
295 | extern void pci_iounmap(struct pci_dev *dev, void __iomem *); | |
296 | ||
1da177e4 LT |
297 | /* |
298 | * Bus number may be in res->flags... somewhere. | |
299 | */ | |
300 | extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset, | |
301 | unsigned long size, char *name); | |
302 | extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size); | |
303 | ||
304 | ||
305 | /* | |
306 | * At the moment, we do not use CMOS_READ anywhere outside of rtc.c, | |
307 | * so rtc_port is static in it. This should not change unless a new | |
308 | * hardware pops up. | |
309 | */ | |
310 | #define RTC_PORT(x) (rtc_port + (x)) | |
311 | #define RTC_ALWAYS_BCD 0 | |
312 | ||
313 | /* Nothing to do */ | |
314 | /* P3: Only IDE DMA may need these. XXX Verify that it still does... */ | |
315 | ||
316 | #define dma_cache_inv(_start,_size) do { } while (0) | |
317 | #define dma_cache_wback(_start,_size) do { } while (0) | |
318 | #define dma_cache_wback_inv(_start,_size) do { } while (0) | |
319 | ||
320 | #endif | |
321 | ||
322 | #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 | |
323 | ||
324 | /* | |
325 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
326 | * access | |
327 | */ | |
328 | #define xlate_dev_mem_ptr(p) __va(p) | |
329 | ||
330 | /* | |
331 | * Convert a virtual cached pointer to an uncached pointer | |
332 | */ | |
333 | #define xlate_dev_kmem_ptr(p) p | |
334 | ||
335 | #endif /* !(__SPARC_IO_H) */ |