Commit | Line | Data |
---|---|---|
a09749dd JL |
1 | /* |
2 | * Platform defintions for Titan | |
3 | */ | |
4 | ||
5 | #ifndef _ASM_SH_TITAN_TITAN_H | |
6 | #define _ASM_SH_TITAN_TITAN_H | |
7 | ||
8 | #define __IO_PREFIX titan | |
9 | #include <asm/io_generic.h> | |
10 | ||
11 | /* IRQ assignments */ | |
12 | #define TITAN_IRQ_WAN 2 /* eth0 (WAN) */ | |
13 | #define TITAN_IRQ_LAN 5 /* eth1 (LAN) */ | |
14 | #define TITAN_IRQ_MPCIA 8 /* mPCI A */ | |
15 | #define TITAN_IRQ_MPCIB 11 /* mPCI B */ | |
16 | #define TITAN_IRQ_USB 11 /* USB */ | |
17 | ||
18 | /* | |
19 | * The external interrupt lines, these take up ints 0 - 15 inclusive | |
20 | * depending on the priority for the interrupt. In fact the priority | |
21 | * is the interrupt :-) | |
22 | */ | |
23 | #define IRL0_IRQ 0 | |
24 | #define IRL0_IPR_ADDR INTC_IPRD | |
25 | #define IRL0_IPR_POS 3 | |
26 | #define IRL0_PRIORITY 8 | |
27 | ||
28 | #define IRL1_IRQ 1 | |
29 | #define IRL1_IPR_ADDR INTC_IPRD | |
30 | #define IRL1_IPR_POS 2 | |
31 | #define IRL1_PRIORITY 8 | |
32 | ||
33 | #define IRL2_IRQ 2 | |
34 | #define IRL2_IPR_ADDR INTC_IPRD | |
35 | #define IRL2_IPR_POS 1 | |
36 | #define IRL2_PRIORITY 8 | |
37 | ||
38 | #define IRL3_IRQ 3 | |
39 | #define IRL3_IPR_ADDR INTC_IPRD | |
40 | #define IRL3_IPR_POS 0 | |
41 | #define IRL3_PRIORITY 8 | |
42 | ||
43 | #endif |