[linux-2.6-block.git] / include / asm-sh / processor.h

/*
 * include/asm-sh/processor.h
 *
 * Copyright (C) 1999, 2000  Niibe Yutaka
 * Copyright (C) 2002, 2003  Paul Mundt
 */

#ifndef __ASM_SH_PROCESSOR_H
#define __ASM_SH_PROCESSOR_H
#ifdef __KERNEL__

#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
#include <asm/cpu-features.h>

/*
 * Default implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; __asm__("mova	1f, %0\n1:":"=z" (pc)); pc; })

/* Core Processor Version Register */
#define CCN_PVR		0xff000030
#define CCN_CVR		0xff000040
#define CCN_PRR		0xff000044

/*
 *  CPU type and hardware bug flags. Kept separately for each CPU.
 *
 *  Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
 *  in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
 *  for parsing the subtype in get_cpu_subtype().
 */
enum cpu_type {
	/* SH-2 types */
	CPU_SH7619,

	/* SH-2A types */
	CPU_SH7206,

	/* SH-3 types */
	CPU_SH7705, CPU_SH7706, CPU_SH7707,
	CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
	CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
	CPU_SH7720, CPU_SH7729,

	/* SH-4 types */
	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
	CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,

	/* SH-4A types */
	CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,

	/* SH4AL-DSP types */
	CPU_SH7343, CPU_SH7722,

	/* Unknown subtype */
	CPU_SH_NONE
};

struct sh_cpuinfo {
	unsigned int type;
	unsigned long loops_per_jiffy;
	unsigned long asid_cache;

	struct cache_info icache;	/* Primary I-cache */
	struct cache_info dcache;	/* Primary D-cache */
	struct cache_info scache;	/* Secondary cache */

	unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));

extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]

/*
 * User space process size: 2GB.
 *
 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
 */
#define TASK_SIZE	0x7c000000UL

/* This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
 */
#define TASK_UNMAPPED_BASE	(TASK_SIZE / 3)

/*
 * Bit of SR register
 *
 * FD-bit:
 *     When it's set, it means the processor doesn't have right to use FPU,
 *     and it results exception when the floating operation is executed.
 *
 * IMASK-bit:
 *     Interrupt level mask
 */
#define SR_FD		0x00008000
#define SR_DSP		0x00001000
#define SR_IMASK	0x000000f0

/*
 * FPU structure and data
 */

struct sh_fpu_hard_struct {
	unsigned long fp_regs[16];
	unsigned long xfp_regs[16];
	unsigned long fpscr;
	unsigned long fpul;

	long status; /* software status information */
};

/* Dummy fpu emulator  */
struct sh_fpu_soft_struct {
	unsigned long fp_regs[16];
	unsigned long xfp_regs[16];
	unsigned long fpscr;
	unsigned long fpul;

	unsigned char lookahead;
	unsigned long entry_pc;
};

union sh_fpu_union {
	struct sh_fpu_hard_struct hard;
	struct sh_fpu_soft_struct soft;
};

struct thread_struct {
	/* Saved registers when thread is descheduled */
	unsigned long sp;
	unsigned long pc;

	/* Hardware debugging registers */
	unsigned long ubc_pc;

	/* floating point info */
	union sh_fpu_union fpu;
};

typedef struct {
	unsigned long seg;
} mm_segment_t;

/* Count of active tasks with UBC settings */
extern int ubc_usercnt;

#define INIT_THREAD  {						\
	.sp = sizeof(init_stack) + (long) &init_stack,		\
}

/*
 * Do necessary setup to start up a newly executed thread.
 */
#define start_thread(regs, new_pc, new_sp)	 \
	set_fs(USER_DS);			 \
	regs->pr = 0;				 \
	regs->sr = SR_FD;	/* User mode. */ \
	regs->pc = new_pc;			 \
	regs->regs[15] = new_sp

/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;

/* Free all resources held by a thread. */
extern void release_thread(struct task_struct *);

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

/*
 * create a kernel thread without removing it from tasklists
 */
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

/* Copy and release all segment info associated with a VM */
#define copy_segments(p, mm)	do { } while(0)
#define release_segments(mm)	do { } while(0)

/*
 * FPU lazy state save handling.
 */

static __inline__ void disable_fpu(void)
{
	unsigned long __dummy;

	/* Set FD flag in SR */
	__asm__ __volatile__("stc	sr, %0\n\t"
			     "or	%1, %0\n\t"
			     "ldc	%0, sr"
			     : "=&r" (__dummy)
			     : "r" (SR_FD));
}

static __inline__ void enable_fpu(void)
{
	unsigned long __dummy;

	/* Clear out FD flag in SR */
	__asm__ __volatile__("stc	sr, %0\n\t"
			     "and	%1, %0\n\t"
			     "ldc	%0, sr"
			     : "=&r" (__dummy)
			     : "r" (~SR_FD));
}

static __inline__ void release_fpu(struct pt_regs *regs)
{
	regs->sr |= SR_FD;
}

static __inline__ void grab_fpu(struct pt_regs *regs)
{
	regs->sr &= ~SR_FD;
}

extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);

#define unlazy_fpu(tsk, regs) do {			\
	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {	\
		save_fpu(tsk, regs);			\
	}						\
} while (0)

#define clear_fpu(tsk, regs) do {				\
	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {		\
		clear_tsk_thread_flag(tsk, TIF_USEDFPU);	\
		release_fpu(regs);				\
	}							\
} while (0)

/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
#define FPSCR_INIT  0x00080000

#define	FPSCR_CAUSE_MASK	0x0001f000	/* Cause bits */
#define	FPSCR_FLAG_MASK		0x0000007c	/* Flag bits */

/*
 * Return saved PC of a blocked thread.
 */
#define thread_saved_pc(tsk)	(tsk->thread.pc)

void show_trace(struct task_struct *tsk, unsigned long *sp,
		struct pt_regs *regs);
extern unsigned long get_wchan(struct task_struct *p);

#define KSTK_EIP(tsk)  (task_pt_regs(tsk)->pc)
#define KSTK_ESP(tsk)  (task_pt_regs(tsk)->regs[15])

#define cpu_sleep()	__asm__ __volatile__ ("sleep" : : : "memory")
#define cpu_relax()	barrier()

#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
    defined(CONFIG_CPU_SH4)
#define PREFETCH_STRIDE		L1_CACHE_BYTES
#define ARCH_HAS_PREFETCH
#define ARCH_HAS_PREFETCHW
static inline void prefetch(void *x)
{
	__asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
}

#define prefetchw(x)	prefetch(x)
#endif

#ifdef CONFIG_VSYSCALL
extern int vsyscall_init(void);
#else
#define vsyscall_init() do { } while (0)
#endif

/* arch/sh/kernel/setup.c */
const char *get_cpu_subtype(struct sh_cpuinfo *c);

#endif /* __KERNEL__ */
#endif /* __ASM_SH_PROCESSOR_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-sh/processor.h
	3	*
	4	* Copyright (C) 1999, 2000 Niibe Yutaka
	5	* Copyright (C) 2002, 2003 Paul Mundt
	6	*/
	7
	8	#ifndef __ASM_SH_PROCESSOR_H
	9	#define __ASM_SH_PROCESSOR_H
	10	#ifdef __KERNEL__
	11
f6dc8c5b	12	#include <linux/compiler.h>
1da177e4 LT	13	#include <asm/page.h>
	14	#include <asm/types.h>
	15	#include <asm/cache.h>
1da177e4	16	#include <asm/ptrace.h>
315bb968	17	#include <asm/cpu-features.h>
1da177e4 LT	18
	19	/*
	20	* Default implementation of macro that returns current
	21	* instruction pointer ("program counter").
	22	*/
	23	#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
	24
	25	/* Core Processor Version Register */
	26	#define CCN_PVR 0xff000030
	27	#define CCN_CVR 0xff000040
	28	#define CCN_PRR 0xff000044
	29
	30	/*
	31	* CPU type and hardware bug flags. Kept separately for each CPU.
	32	*
	33	* Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
de02797a	34	* in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
1da177e4 LT	35	* for parsing the subtype in get_cpu_subtype().
	36	*/
	37	enum cpu_type {
	38	/* SH-2 types */
b9601c5e	39	CPU_SH7619,
b229632a YS	40
	41	/* SH-2A types */
	42	CPU_SH7206,
1da177e4 LT	43
1da177e4 LT	44	/* SH-3 types */
e5723e0e PM	45	CPU_SH7705, CPU_SH7706, CPU_SH7707,
e5723e0e PM	46	CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
9465a54f	47	CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
3ea6bc3d	48	CPU_SH7720, CPU_SH7729,
1da177e4 LT	49
	50	/* SH-4 types */
	51	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
	52	CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
b552c7e8 PM	53
b552c7e8 PM	54	/* SH-4A types */
2b1bd1ac	55	CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
41504c39 PM	56
41504c39 PM	57	/* SH4AL-DSP types */
870e8a24	58	CPU_SH7343, CPU_SH7722,
1da177e4 LT	59
	60	/* Unknown subtype */
	61	CPU_SH_NONE
	62	};
	63
	64	struct sh_cpuinfo {
72c35543	65	unsigned int type;
1da177e4	66	unsigned long loops_per_jiffy;
aec5e0e1	67	unsigned long asid_cache;
1da177e4	68
72c35543 PM	69	struct cache_info icache; /* Primary I-cache */
	70	struct cache_info dcache; /* Primary D-cache */
	71	struct cache_info scache; /* Secondary cache */
1da177e4 LT	72
1da177e4 LT	73	unsigned long flags;
2278caa3	74	} __attribute__ ((aligned(L1_CACHE_BYTES)));
1da177e4	75
1da177e4	76	extern struct sh_cpuinfo cpu_data[];
2d4a73d5	77	#define boot_cpu_data cpu_data[0]
1da177e4	78	#define current_cpu_data cpu_data[smp_processor_id()]
2d4a73d5	79	#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
1da177e4 LT	80
	81	/*
	82	* User space process size: 2GB.
	83	*
	84	* Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
	85	*/
	86	#define TASK_SIZE 0x7c000000UL
	87
	88	/* This decides where the kernel will search for a free chunk of vm
	89	* space during mmap's.
	90	*/
	91	#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
	92
	93	/*
	94	* Bit of SR register
	95	*
	96	* FD-bit:
	97	* When it's set, it means the processor doesn't have right to use FPU,
	98	* and it results exception when the floating operation is executed.
	99	*
	100	* IMASK-bit:
	101	* Interrupt level mask
	102	*/
	103	#define SR_FD 0x00008000
	104	#define SR_DSP 0x00001000
	105	#define SR_IMASK 0x000000f0
	106
	107	/*
	108	* FPU structure and data
	109	*/
	110
	111	struct sh_fpu_hard_struct {
	112	unsigned long fp_regs[16];
	113	unsigned long xfp_regs[16];
	114	unsigned long fpscr;
	115	unsigned long fpul;
	116
	117	long status; /* software status information */
	118	};
	119
	120	/* Dummy fpu emulator */
	121	struct sh_fpu_soft_struct {
	122	unsigned long fp_regs[16];
	123	unsigned long xfp_regs[16];
	124	unsigned long fpscr;
	125	unsigned long fpul;
	126
	127	unsigned char lookahead;
	128	unsigned long entry_pc;
	129	};
	130
	131	union sh_fpu_union {
	132	struct sh_fpu_hard_struct hard;
	133	struct sh_fpu_soft_struct soft;
	134	};
	135
1da177e4	136	struct thread_struct {
b5a1bcbe	137	/* Saved registers when thread is descheduled */
1da177e4 LT	138	unsigned long sp;
	139	unsigned long pc;
	140
b5a1bcbe	141	/* Hardware debugging registers */
1da177e4 LT	142	unsigned long ubc_pc;
	143
	144	/* floating point info */
	145	union sh_fpu_union fpu;
	146	};
	147
2991be72 PM	148	typedef struct {
	149	unsigned long seg;
	150	} mm_segment_t;
	151
1da177e4 LT	152	/* Count of active tasks with UBC settings */
	153	extern int ubc_usercnt;
	154
	155	#define INIT_THREAD { \
b5a1bcbe	156	.sp = sizeof(init_stack) + (long) &init_stack, \
1da177e4 LT	157	}
	158
	159	/*
	160	* Do necessary setup to start up a newly executed thread.
	161	*/
	162	#define start_thread(regs, new_pc, new_sp) \
	163	set_fs(USER_DS); \
de02797a	164	regs->pr = 0; \
1da177e4 LT	165	regs->sr = SR_FD; /* User mode. */ \
	166	regs->pc = new_pc; \
	167	regs->regs[15] = new_sp
	168
	169	/* Forward declaration, a strange C thing */
	170	struct task_struct;
	171	struct mm_struct;
	172
	173	/* Free all resources held by a thread. */
	174	extern void release_thread(struct task_struct *);
	175
	176	/* Prepare to copy thread state - unlazy all lazy status */
	177	#define prepare_to_copy(tsk) do { } while (0)
	178
	179	/*
	180	* create a kernel thread without removing it from tasklists
	181	*/
	182	extern int kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
	183
	184	/* Copy and release all segment info associated with a VM */
	185	#define copy_segments(p, mm) do { } while(0)
	186	#define release_segments(mm) do { } while(0)
	187
	188	/*
	189	* FPU lazy state save handling.
	190	*/
	191
	192	static __inline__ void disable_fpu(void)
	193	{
	194	unsigned long __dummy;
	195
	196	/* Set FD flag in SR */
	197	__asm__ __volatile__("stc sr, %0\n\t"
	198	"or %1, %0\n\t"
	199	"ldc %0, sr"
	200	: "=&r" (__dummy)
	201	: "r" (SR_FD));
	202	}
	203
	204	static __inline__ void enable_fpu(void)
	205	{
	206	unsigned long __dummy;
	207
	208	/* Clear out FD flag in SR */
	209	__asm__ __volatile__("stc sr, %0\n\t"
	210	"and %1, %0\n\t"
	211	"ldc %0, sr"
	212	: "=&r" (__dummy)
	213	: "r" (~SR_FD));
	214	}
	215
	216	static __inline__ void release_fpu(struct pt_regs *regs)
	217	{
	218	regs->sr \|= SR_FD;
	219	}
	220
	221	static __inline__ void grab_fpu(struct pt_regs *regs)
	222	{
	223	regs->sr &= ~SR_FD;
	224	}
	225
1da177e4	226	extern void save_fpu(struct task_struct __tsk, struct pt_regs regs);
1da177e4	227
de02797a	228	#define unlazy_fpu(tsk, regs) do { \
1da177e4	229	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
de02797a	230	save_fpu(tsk, regs); \
1da177e4 LT	231	} \
	232	} while (0)
	233
de02797a PM	234	#define clear_fpu(tsk, regs) do { \
	235	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
	236	clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
	237	release_fpu(regs); \
1da177e4 LT	238	} \
	239	} while (0)
	240
	241	/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
	242	#define FPSCR_INIT 0x00080000
	243
	244	#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
	245	#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
	246
	247	/*
	248	* Return saved PC of a blocked thread.
	249	*/
	250	#define thread_saved_pc(tsk) (tsk->thread.pc)
	251
6b002230 PM	252	void show_trace(struct task_struct tsk, unsigned long sp,
6b002230 PM	253	struct pt_regs *regs);
1da177e4 LT	254	extern unsigned long get_wchan(struct task_struct *p);
1da177e4 LT	255
c9f0b1c1 SM	256	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
c9f0b1c1 SM	257	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
1da177e4 LT	258
1da177e4 LT	259	#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
f6dc8c5b	260	#define cpu_relax() barrier()
1da177e4	261
e86d6b66 PM	262	#if defined(CONFIG_CPU_SH2A) \|\| defined(CONFIG_CPU_SH3) \|\| \
	263	defined(CONFIG_CPU_SH4)
	264	#define PREFETCH_STRIDE L1_CACHE_BYTES
	265	#define ARCH_HAS_PREFETCH
	266	#define ARCH_HAS_PREFETCHW
	267	static inline void prefetch(void *x)
	268	{
	269	__asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
	270	}
	271
	272	#define prefetchw(x) prefetch(x)
	273	#endif
	274
19f9a34f PM	275	#ifdef CONFIG_VSYSCALL
	276	extern int vsyscall_init(void);
	277	#else
	278	#define vsyscall_init() do { } while (0)
	279	#endif
	280
11c19656 PM	281	/* arch/sh/kernel/setup.c */
	282	const char get_cpu_subtype(struct sh_cpuinfo c);
	283
1da177e4 LT	284	#endif /* __KERNEL__ */
1da177e4 LT	285	#endif /* __ASM_SH_PROCESSOR_H */