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| Commit | Line | Data |
|---|---|---|
| cdcc9708 PM |
1 | #ifndef __ASM_SH_MMU_CONTEXT_64_H |
| 2 | #define __ASM_SH_MMU_CONTEXT_64_H | |
| 3 | ||
| 4 | /* | |
| 5 | * sh64-specific mmu_context interface. | |
| 6 | * | |
| 7 | * Copyright (C) 2000, 2001 Paolo Alberelli | |
| 8 | * Copyright (C) 2003 - 2007 Paul Mundt | |
| 9 | * | |
| 10 | * This file is subject to the terms and conditions of the GNU General Public | |
| 11 | * License. See the file "COPYING" in the main directory of this archive | |
| 12 | * for more details. | |
| 13 | */ | |
| 14 | #include <asm/cpu/registers.h> | |
| 15 | #include <asm/cacheflush.h> | |
| 16 | ||
| 17 | #define SR_ASID_MASK 0xffffffffff00ffffULL | |
| 18 | #define SR_ASID_SHIFT 16 | |
| 19 | ||
| 20 | /* | |
| 21 | * Destroy context related info for an mm_struct that is about | |
| 22 | * to be put to rest. | |
| 23 | */ | |
| 24 | static inline void destroy_context(struct mm_struct *mm) | |
| 25 | { | |
| 26 | /* Well, at least free TLB entries */ | |
| 27 | flush_tlb_mm(mm); | |
| 28 | } | |
| 29 | ||
| 30 | static inline unsigned long get_asid(void) | |
| 31 | { | |
| 32 | unsigned long long sr; | |
| 33 | ||
| 34 | asm volatile ("getcon " __SR ", %0\n\t" | |
| 35 | : "=r" (sr)); | |
| 36 | ||
| 37 | sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK; | |
| 38 | return (unsigned long) sr; | |
| 39 | } | |
| 40 | ||
| 41 | /* Set ASID into SR */ | |
| 42 | static inline void set_asid(unsigned long asid) | |
| 43 | { | |
| 44 | unsigned long long sr, pc; | |
| 45 | ||
| 46 | asm volatile ("getcon " __SR ", %0" : "=r" (sr)); | |
| 47 | ||
| 48 | sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT); | |
| 49 | ||
| 50 | /* | |
| 51 | * It is possible that this function may be inlined and so to avoid | |
| 52 | * the assembler reporting duplicate symbols we make use of the | |
| 53 | * gas trick of generating symbols using numerics and forward | |
| 54 | * reference. | |
| 55 | */ | |
| 56 | asm volatile ("movi 1, %1\n\t" | |
| 57 | "shlli %1, 28, %1\n\t" | |
| 58 | "or %0, %1, %1\n\t" | |
| 59 | "putcon %1, " __SR "\n\t" | |
| 60 | "putcon %0, " __SSR "\n\t" | |
| 61 | "movi 1f, %1\n\t" | |
| 62 | "ori %1, 1 , %1\n\t" | |
| 63 | "putcon %1, " __SPC "\n\t" | |
| 64 | "rte\n" | |
| 65 | "1:\n\t" | |
| 66 | : "=r" (sr), "=r" (pc) : "0" (sr)); | |
| 67 | } | |
| 68 | ||
| 38350e0a PM |
69 | /* arch/sh/kernel/cpu/sh5/entry.S */ |
| 70 | extern unsigned long switch_and_save_asid(unsigned long new_asid); | |
| 71 | ||
| cdcc9708 PM |
72 | /* No spare register to twiddle, so use a software cache */ |
| 73 | extern pgd_t *mmu_pdtp_cache; | |
| 74 | ||
| 75 | #define set_TTB(pgd) (mmu_pdtp_cache = (pgd)) | |
| 76 | #define get_TTB() (mmu_pdtp_cache) | |
| 77 | ||
| 78 | #endif /* __ASM_SH_MMU_CONTEXT_64_H */ |