[linux-block.git] / include / asm-sh / irqflags_64.h

#ifndef __ASM_SH_IRQFLAGS_64_H
#define __ASM_SH_IRQFLAGS_64_H

#include <asm/cpu/registers.h>

#define SR_MASK_LL	0x00000000000000f0LL
#define SR_BL_LL	0x0000000010000000LL

static inline void raw_local_irq_enable(void)
{
	unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;

	__asm__ __volatile__("getcon	" __SR ", %0\n\t"
			     "and	%0, %1, %0\n\t"
			     "putcon	%0, " __SR "\n\t"
			     : "=&r" (__dummy0)
			     : "r" (__dummy1));
}

static inline void raw_local_irq_disable(void)
{
	unsigned long long __dummy0, __dummy1 = SR_MASK_LL;

	__asm__ __volatile__("getcon	" __SR ", %0\n\t"
			     "or	%0, %1, %0\n\t"
			     "putcon	%0, " __SR "\n\t"
			     : "=&r" (__dummy0)
			     : "r" (__dummy1));
}

static inline void set_bl_bit(void)
{
	unsigned long long __dummy0, __dummy1 = SR_BL_LL;

	__asm__ __volatile__("getcon	" __SR ", %0\n\t"
			     "or	%0, %1, %0\n\t"
			     "putcon	%0, " __SR "\n\t"
			     : "=&r" (__dummy0)
			     : "r" (__dummy1));

}

static inline void clear_bl_bit(void)
{
	unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;

	__asm__ __volatile__("getcon	" __SR ", %0\n\t"
			     "and	%0, %1, %0\n\t"
			     "putcon	%0, " __SR "\n\t"
			     : "=&r" (__dummy0)
			     : "r" (__dummy1));
}

static inline unsigned long __raw_local_save_flags(void)
{
	unsigned long long __dummy = SR_MASK_LL;
	unsigned long flags;

	__asm__ __volatile__ (
		"getcon	" __SR ", %0\n\t"
		"and	%0, %1, %0"
		: "=&r" (flags)
		: "r" (__dummy));

	return flags;
}

static inline unsigned long __raw_local_irq_save(void)
{
	unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
	unsigned long flags;

	__asm__ __volatile__ (
		"getcon	" __SR ", %1\n\t"
		"or	%1, r63, %0\n\t"
		"or	%1, %2, %1\n\t"
		"putcon	%1, " __SR "\n\t"
		"and	%0, %2, %0"
		: "=&r" (flags), "=&r" (__dummy0)
		: "r" (__dummy1));

	return flags;
}

#endif /* __ASM_SH_IRQFLAGS_64_H */
Commit	Line	Data
f64ee876 PM	1	#ifndef __ASM_SH_IRQFLAGS_64_H
	2	#define __ASM_SH_IRQFLAGS_64_H
	3
	4	#include <asm/cpu/registers.h>
	5
	6	#define SR_MASK_LL 0x00000000000000f0LL
	7	#define SR_BL_LL 0x0000000010000000LL
	8
	9	static inline void raw_local_irq_enable(void)
	10	{
	11	unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;
	12
	13	__asm__ __volatile__("getcon " __SR ", %0\n\t"
	14	"and %0, %1, %0\n\t"
	15	"putcon %0, " __SR "\n\t"
	16	: "=&r" (__dummy0)
	17	: "r" (__dummy1));
	18	}
	19
	20	static inline void raw_local_irq_disable(void)
	21	{
	22	unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
	23
	24	__asm__ __volatile__("getcon " __SR ", %0\n\t"
	25	"or %0, %1, %0\n\t"
	26	"putcon %0, " __SR "\n\t"
	27	: "=&r" (__dummy0)
	28	: "r" (__dummy1));
	29	}
	30
	31	static inline void set_bl_bit(void)
	32	{
	33	unsigned long long __dummy0, __dummy1 = SR_BL_LL;
	34
	35	__asm__ __volatile__("getcon " __SR ", %0\n\t"
	36	"or %0, %1, %0\n\t"
	37	"putcon %0, " __SR "\n\t"
	38	: "=&r" (__dummy0)
	39	: "r" (__dummy1));
	40
	41	}
	42
	43	static inline void clear_bl_bit(void)
	44	{
	45	unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
	46
	47	__asm__ __volatile__("getcon " __SR ", %0\n\t"
	48	"and %0, %1, %0\n\t"
	49	"putcon %0, " __SR "\n\t"
	50	: "=&r" (__dummy0)
	51	: "r" (__dummy1));
	52	}
	53
	54	static inline unsigned long __raw_local_save_flags(void)
	55	{
	56	unsigned long long __dummy = SR_MASK_LL;
	57	unsigned long flags;
	58
	59	__asm__ __volatile__ (
	60	"getcon " __SR ", %0\n\t"
	61	"and %0, %1, %0"
	62	: "=&r" (flags)
	63	: "r" (__dummy));
	64
65	return flags;
66	}
67
68	static inline unsigned long __raw_local_irq_save(void)
69	{
70	unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
71	unsigned long flags;
72
73	__asm__ __volatile__ (
74	"getcon " __SR ", %1\n\t"
75	"or %1, r63, %0\n\t"
76	"or %1, %2, %1\n\t"
77	"putcon %1, " __SR "\n\t"
78	"and %0, %2, %0"
79	: "=&r" (flags), "=&r" (__dummy0)
80	: "r" (__dummy1));
81
82	return flags;
83	}
84
85	#endif /* __ASM_SH_IRQFLAGS_64_H */