[linux-2.6-block.git] / include / asm-sh / dma.h

/*
 * include/asm-sh/dma.h
 *
 * Copyright (C) 2003, 2004  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#ifndef __ASM_SH_DMA_H
#define __ASM_SH_DMA_H
#ifdef __KERNEL__

#include <linux/spinlock.h>
#include <linux/wait.h>
#include <linux/sysdev.h>
#include <linux/device.h>
#include <asm/cpu/dma.h>
#include <asm/semaphore.h>

/* The maximum address that we can perform a DMA transfer to on this platform */
/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
   occurrence should be flagged as an error.  */
/* But... */
/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
#define MAX_DMA_ADDRESS		(PAGE_OFFSET+0x10000000)

#ifdef CONFIG_NR_DMA_CHANNELS
#  define MAX_DMA_CHANNELS	(CONFIG_NR_DMA_CHANNELS)
#else
#  define MAX_DMA_CHANNELS	(CONFIG_NR_ONCHIP_DMA_CHANNELS)
#endif

/*
 * Read and write modes can mean drastically different things depending on the
 * channel configuration. Consult your DMAC documentation and module
 * implementation for further clues.
 */
#define DMA_MODE_READ		0x00
#define DMA_MODE_WRITE		0x01
#define DMA_MODE_MASK		0x01

#define DMA_AUTOINIT		0x10

/*
 * DMAC (dma_info) flags
 */
enum {
	DMAC_CHANNELS_CONFIGURED	= 0x00,
	DMAC_CHANNELS_TEI_CAPABLE	= 0x01,
};

/*
 * DMA channel capabilities / flags
 */
enum {
	DMA_TEI_CAPABLE			= 0x01,
	DMA_CONFIGURED			= 0x02,
};

extern spinlock_t dma_spin_lock;

struct dma_channel;

struct dma_ops {
	int (*request)(struct dma_channel *chan);
	void (*free)(struct dma_channel *chan);

	int (*get_residue)(struct dma_channel *chan);
	int (*xfer)(struct dma_channel *chan);
	void (*configure)(struct dma_channel *chan, unsigned long flags);
};

struct dma_channel {
	char dev_id[16];

	unsigned int chan;		/* Physical channel number */
	unsigned int vchan;		/* Virtual channel number */
	unsigned int mode;
	unsigned int count;

	unsigned long sar;
	unsigned long dar;

	unsigned long flags;
	atomic_t busy;

	struct semaphore sem;
	wait_queue_head_t wait_queue;

	struct sys_device dev;
};

struct dma_info {
	struct platform_device *pdev;

	const char *name;
	unsigned int nr_channels;
	unsigned long flags;

	struct dma_ops *ops;
	struct dma_channel *channels;

	struct list_head list;
};

#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)

/* arch/sh/drivers/dma/dma-api.c */
extern int dma_xfer(unsigned int chan, unsigned long from,
		    unsigned long to, size_t size, unsigned int mode);

#define dma_write(chan, from, to, size)	\
	dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
#define dma_write_page(chan, from, to)	\
	dma_write(chan, from, to, PAGE_SIZE)

#define dma_read(chan, from, to, size)	\
	dma_xfer(chan, from, to, size, DMA_MODE_READ)
#define dma_read_page(chan, from, to)	\
	dma_read(chan, from, to, PAGE_SIZE)

extern int request_dma(unsigned int chan, const char *dev_id);
extern void free_dma(unsigned int chan);
extern int get_dma_residue(unsigned int chan);
extern struct dma_info *get_dma_info(unsigned int chan);
extern struct dma_channel *get_dma_channel(unsigned int chan);
extern void dma_wait_for_completion(unsigned int chan);
extern void dma_configure_channel(unsigned int chan, unsigned long flags);

extern int register_dmac(struct dma_info *info);
extern void unregister_dmac(struct dma_info *info);

#ifdef CONFIG_SYSFS
/* arch/sh/drivers/dma/dma-sysfs.c */
extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
#else
#define dma_create_sysfs_file(channel, info)		do { } while (0)
#define dma_remove_sysfs_file(channel, info)		do { } while (0)
#endif

#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy	(0)
#endif

#endif /* __KERNEL__ */
#endif /* __ASM_SH_DMA_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-sh/dma.h
	3	*
	4	* Copyright (C) 2003, 2004 Paul Mundt
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10	#ifndef __ASM_SH_DMA_H
	11	#define __ASM_SH_DMA_H
	12	#ifdef __KERNEL__
	13
1da177e4 LT	14	#include <linux/spinlock.h>
	15	#include <linux/wait.h>
	16	#include <linux/sysdev.h>
0d831770	17	#include <linux/device.h>
1da177e4 LT	18	#include <asm/cpu/dma.h>
	19	#include <asm/semaphore.h>
	20
	21	/* The maximum address that we can perform a DMA transfer to on this platform */
	22	/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
	23	occurrence should be flagged as an error. */
	24	/* But... */
	25	/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
	26	#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
	27
	28	#ifdef CONFIG_NR_DMA_CHANNELS
	29	# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
	30	#else
	31	# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
	32	#endif
	33
	34	/*
	35	* Read and write modes can mean drastically different things depending on the
	36	* channel configuration. Consult your DMAC documentation and module
	37	* implementation for further clues.
	38	*/
	39	#define DMA_MODE_READ 0x00
	40	#define DMA_MODE_WRITE 0x01
	41	#define DMA_MODE_MASK 0x01
	42
	43	#define DMA_AUTOINIT 0x10
	44
	45	/*
	46	* DMAC (dma_info) flags
	47	*/
	48	enum {
	49	DMAC_CHANNELS_CONFIGURED = 0x00,
	50	DMAC_CHANNELS_TEI_CAPABLE = 0x01,
	51	};
	52
	53	/*
	54	* DMA channel capabilities / flags
	55	*/
	56	enum {
1da177e4	57	DMA_TEI_CAPABLE = 0x01,
0d831770	58	DMA_CONFIGURED = 0x02,
1da177e4 LT	59	};
	60
	61	extern spinlock_t dma_spin_lock;
	62
	63	struct dma_channel;
	64
	65	struct dma_ops {
	66	int (request)(struct dma_channel chan);
	67	void (free)(struct dma_channel chan);
	68
	69	int (get_residue)(struct dma_channel chan);
	70	int (xfer)(struct dma_channel chan);
	71	void (configure)(struct dma_channel chan, unsigned long flags);
	72	};
	73
	74	struct dma_channel {
	75	char dev_id[16];
	76
0d831770 PM	77	unsigned int chan; /* Physical channel number */
0d831770 PM	78	unsigned int vchan; /* Virtual channel number */
1da177e4 LT	79	unsigned int mode;
	80	unsigned int count;
	81
	82	unsigned long sar;
	83	unsigned long dar;
	84
	85	unsigned long flags;
	86	atomic_t busy;
	87
	88	struct semaphore sem;
	89	wait_queue_head_t wait_queue;
	90
	91	struct sys_device dev;
	92	};
	93
	94	struct dma_info {
0d831770 PM	95	struct platform_device *pdev;
0d831770 PM	96
1da177e4 LT	97	const char *name;
	98	unsigned int nr_channels;
	99	unsigned long flags;
	100
	101	struct dma_ops *ops;
	102	struct dma_channel *channels;
	103
	104	struct list_head list;
	105	};
	106
	107	#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
	108
	109	/* arch/sh/drivers/dma/dma-api.c */
	110	extern int dma_xfer(unsigned int chan, unsigned long from,
	111	unsigned long to, size_t size, unsigned int mode);
	112
	113	#define dma_write(chan, from, to, size) \
	114	dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
	115	#define dma_write_page(chan, from, to) \
	116	dma_write(chan, from, to, PAGE_SIZE)
	117
	118	#define dma_read(chan, from, to, size) \
	119	dma_xfer(chan, from, to, size, DMA_MODE_READ)
	120	#define dma_read_page(chan, from, to) \
	121	dma_read(chan, from, to, PAGE_SIZE)
	122
	123	extern int request_dma(unsigned int chan, const char *dev_id);
	124	extern void free_dma(unsigned int chan);
	125	extern int get_dma_residue(unsigned int chan);
	126	extern struct dma_info *get_dma_info(unsigned int chan);
	127	extern struct dma_channel *get_dma_channel(unsigned int chan);
	128	extern void dma_wait_for_completion(unsigned int chan);
	129	extern void dma_configure_channel(unsigned int chan, unsigned long flags);
	130
	131	extern int register_dmac(struct dma_info *info);
	132	extern void unregister_dmac(struct dma_info *info);
	133
	134	#ifdef CONFIG_SYSFS
	135	/* arch/sh/drivers/dma/dma-sysfs.c */
0d831770 PM	136	extern int dma_create_sysfs_files(struct dma_channel , struct dma_info );
	137	extern void dma_remove_sysfs_files(struct dma_channel , struct dma_info );
	138	#else
	139	#define dma_create_sysfs_file(channel, info) do { } while (0)
	140	#define dma_remove_sysfs_file(channel, info) do { } while (0)
1da177e4 LT	141	#endif
	142
	143	#ifdef CONFIG_PCI
	144	extern int isa_dma_bridge_buggy;
	145	#else
	146	#define isa_dma_bridge_buggy (0)
	147	#endif
	148
	149	#endif /* __KERNEL__ */
	150	#endif /* __ASM_SH_DMA_H */