[linux-2.6-block.git] / include / asm-sh / cache.h

/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
 *
 * include/asm-sh/cache.h
 *
 * Copyright 1999 (C) Niibe Yutaka
 * Copyright 2002, 2003 (C) Paul Mundt
 */
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
#ifdef __KERNEL__

#include <linux/init.h>
#include <asm/cpu/cache.h>

#define SH_CACHE_VALID		1
#define SH_CACHE_UPDATED	2
#define SH_CACHE_COMBINED	4
#define SH_CACHE_ASSOC		8

#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)

#define __read_mostly __attribute__((__section__(".data.read_mostly")))

#ifndef __ASSEMBLY__
struct cache_info {
	unsigned int ways;		/* Number of cache ways */
	unsigned int sets;		/* Number of cache sets */
	unsigned int linesz;		/* Cache line size (bytes) */

	unsigned int way_size;		/* sets * line size */

	/*
	 * way_incr is the address offset for accessing the next way
	 * in memory mapped cache array ops.
	 */
	unsigned int way_incr;
	unsigned int entry_shift;
	unsigned int entry_mask;

	/*
	 * Compute a mask which selects the address bits which overlap between
	 * 1. those used to select the cache set during indexing
	 * 2. those in the physical page number.
	 */
	unsigned int alias_mask;

	unsigned int n_aliases;		/* Number of aliases */

	unsigned long flags;
};

int __init detect_cpu_and_cache_system(void);

#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHE_H */
Commit	Line	Data
1da177e4 LT	1	/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
	2	*
	3	* include/asm-sh/cache.h
	4	*
	5	* Copyright 1999 (C) Niibe Yutaka
	6	* Copyright 2002, 2003 (C) Paul Mundt
	7	*/
	8	#ifndef __ASM_SH_CACHE_H
	9	#define __ASM_SH_CACHE_H
	10	#ifdef __KERNEL__
	11
357d5946	12	#include <linux/init.h>
1da177e4	13	#include <asm/cpu/cache.h>
1da177e4 LT	14
	15	#define SH_CACHE_VALID 1
	16	#define SH_CACHE_UPDATED 2
	17	#define SH_CACHE_COMBINED 4
	18	#define SH_CACHE_ASSOC 8
	19
	20	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
1da177e4	21
121fc47d PM	22	#define __read_mostly __attribute__((__section__(".data.read_mostly")))
121fc47d PM	23
87e29cac	24	#ifndef __ASSEMBLY__
1da177e4	25	struct cache_info {
b638d0b9 RC	26	unsigned int ways; /* Number of cache ways */
	27	unsigned int sets; /* Number of cache sets */
	28	unsigned int linesz; /* Cache line size (bytes) */
1da177e4	29
b638d0b9	30	unsigned int way_size; /* sets * line size */
1da177e4	31
b638d0b9 RC	32	/*
	33	* way_incr is the address offset for accessing the next way
	34	* in memory mapped cache array ops.
	35	*/
	36	unsigned int way_incr;
1da177e4 LT	37	unsigned int entry_shift;
	38	unsigned int entry_mask;
	39
b638d0b9 RC	40	/*
	41	* Compute a mask which selects the address bits which overlap between
	42	* 1. those used to select the cache set during indexing
	43	* 2. those in the physical page number.
	44	*/
	45	unsigned int alias_mask;
	46
	47	unsigned int n_aliases; /* Number of aliases */
	48
1da177e4 LT	49	unsigned long flags;
1da177e4 LT	50	};
357d5946 PM	51
	52	int __init detect_cpu_and_cache_system(void);
	53
87e29cac	54	#endif /* __ASSEMBLY__ */
1da177e4 LT	55	#endif /* __KERNEL__ */
1da177e4 LT	56	#endif /* __ASM_SH_CACHE_H */