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1da177e4 LT |
1 | /* |
2 | * include/asm-s390/spinlock.h | |
3 | * | |
4 | * S390 version | |
5 | * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) | |
7 | * | |
8 | * Derived from "include/asm-i386/spinlock.h" | |
9 | */ | |
10 | ||
11 | #ifndef __ASM_SPINLOCK_H | |
12 | #define __ASM_SPINLOCK_H | |
13 | ||
3c1fcfe2 MS |
14 | #include <linux/smp.h> |
15 | ||
42e47eeb MS |
16 | #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) |
17 | ||
94c12cc7 MS |
18 | static inline int |
19 | _raw_compare_and_swap(volatile unsigned int *lock, | |
20 | unsigned int old, unsigned int new) | |
21 | { | |
22 | asm volatile( | |
23 | " cs %0,%3,%1" | |
24 | : "=d" (old), "=Q" (*lock) | |
25 | : "0" (old), "d" (new), "Q" (*lock) | |
26 | : "cc", "memory" ); | |
27 | return old; | |
28 | } | |
29 | ||
30 | #else /* __GNUC__ */ | |
31 | ||
951f22d5 MS |
32 | static inline int |
33 | _raw_compare_and_swap(volatile unsigned int *lock, | |
34 | unsigned int old, unsigned int new) | |
35 | { | |
94c12cc7 MS |
36 | asm volatile( |
37 | " cs %0,%3,0(%4)" | |
38 | : "=d" (old), "=m" (*lock) | |
39 | : "0" (old), "d" (new), "a" (lock), "m" (*lock) | |
40 | : "cc", "memory" ); | |
951f22d5 MS |
41 | return old; |
42 | } | |
1da177e4 | 43 | |
94c12cc7 MS |
44 | #endif /* __GNUC__ */ |
45 | ||
1da177e4 LT |
46 | /* |
47 | * Simple spin lock operations. There are two variants, one clears IRQ's | |
48 | * on the local processor, one does not. | |
49 | * | |
50 | * We make no fairness assumptions. They have a cost. | |
fb1c8f93 IM |
51 | * |
52 | * (the type definitions are in asm/spinlock_types.h) | |
1da177e4 LT |
53 | */ |
54 | ||
3c1fcfe2 | 55 | #define __raw_spin_is_locked(x) ((x)->owner_cpu != 0) |
fb1c8f93 IM |
56 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) |
57 | #define __raw_spin_unlock_wait(lock) \ | |
3c1fcfe2 MS |
58 | do { while (__raw_spin_is_locked(lock)) \ |
59 | _raw_spin_relax(lock); } while (0) | |
1da177e4 | 60 | |
3b4beb31 HC |
61 | extern void _raw_spin_lock_wait(raw_spinlock_t *); |
62 | extern int _raw_spin_trylock_retry(raw_spinlock_t *); | |
3c1fcfe2 | 63 | extern void _raw_spin_relax(raw_spinlock_t *lock); |
951f22d5 | 64 | |
fb1c8f93 | 65 | static inline void __raw_spin_lock(raw_spinlock_t *lp) |
1da177e4 | 66 | { |
3c1fcfe2 MS |
67 | int old; |
68 | ||
69 | old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id()); | |
3b4beb31 | 70 | if (likely(old == 0)) |
3c1fcfe2 | 71 | return; |
3b4beb31 | 72 | _raw_spin_lock_wait(lp); |
1da177e4 LT |
73 | } |
74 | ||
fb1c8f93 | 75 | static inline int __raw_spin_trylock(raw_spinlock_t *lp) |
1da177e4 | 76 | { |
3c1fcfe2 | 77 | int old; |
951f22d5 | 78 | |
3c1fcfe2 | 79 | old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id()); |
3b4beb31 | 80 | if (likely(old == 0)) |
951f22d5 | 81 | return 1; |
3b4beb31 | 82 | return _raw_spin_trylock_retry(lp); |
1da177e4 LT |
83 | } |
84 | ||
fb1c8f93 | 85 | static inline void __raw_spin_unlock(raw_spinlock_t *lp) |
1da177e4 | 86 | { |
3c1fcfe2 | 87 | _raw_compare_and_swap(&lp->owner_cpu, lp->owner_cpu, 0); |
1da177e4 LT |
88 | } |
89 | ||
90 | /* | |
91 | * Read-write spinlocks, allowing multiple readers | |
92 | * but only one writer. | |
93 | * | |
94 | * NOTE! it is quite common to have readers in interrupts | |
95 | * but no interrupt writers. For those circumstances we | |
96 | * can "mix" irq-safe locks - any writer needs to get a | |
97 | * irq-safe write-lock, but readers can get non-irqsafe | |
98 | * read-locks. | |
99 | */ | |
1da177e4 LT |
100 | |
101 | /** | |
102 | * read_can_lock - would read_trylock() succeed? | |
103 | * @lock: the rwlock in question. | |
104 | */ | |
fb1c8f93 | 105 | #define __raw_read_can_lock(x) ((int)(x)->lock >= 0) |
1da177e4 LT |
106 | |
107 | /** | |
108 | * write_can_lock - would write_trylock() succeed? | |
109 | * @lock: the rwlock in question. | |
110 | */ | |
fb1c8f93 | 111 | #define __raw_write_can_lock(x) ((x)->lock == 0) |
1da177e4 | 112 | |
fb1c8f93 IM |
113 | extern void _raw_read_lock_wait(raw_rwlock_t *lp); |
114 | extern int _raw_read_trylock_retry(raw_rwlock_t *lp); | |
115 | extern void _raw_write_lock_wait(raw_rwlock_t *lp); | |
116 | extern int _raw_write_trylock_retry(raw_rwlock_t *lp); | |
951f22d5 | 117 | |
fb1c8f93 | 118 | static inline void __raw_read_lock(raw_rwlock_t *rw) |
951f22d5 MS |
119 | { |
120 | unsigned int old; | |
121 | old = rw->lock & 0x7fffffffU; | |
122 | if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old) | |
123 | _raw_read_lock_wait(rw); | |
124 | } | |
125 | ||
fb1c8f93 | 126 | static inline void __raw_read_unlock(raw_rwlock_t *rw) |
951f22d5 MS |
127 | { |
128 | unsigned int old, cmp; | |
129 | ||
130 | old = rw->lock; | |
131 | do { | |
132 | cmp = old; | |
133 | old = _raw_compare_and_swap(&rw->lock, old, old - 1); | |
134 | } while (cmp != old); | |
135 | } | |
136 | ||
fb1c8f93 | 137 | static inline void __raw_write_lock(raw_rwlock_t *rw) |
951f22d5 MS |
138 | { |
139 | if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0)) | |
140 | _raw_write_lock_wait(rw); | |
141 | } | |
142 | ||
fb1c8f93 | 143 | static inline void __raw_write_unlock(raw_rwlock_t *rw) |
951f22d5 MS |
144 | { |
145 | _raw_compare_and_swap(&rw->lock, 0x80000000, 0); | |
146 | } | |
147 | ||
fb1c8f93 | 148 | static inline int __raw_read_trylock(raw_rwlock_t *rw) |
951f22d5 MS |
149 | { |
150 | unsigned int old; | |
151 | old = rw->lock & 0x7fffffffU; | |
152 | if (likely(_raw_compare_and_swap(&rw->lock, old, old + 1) == old)) | |
153 | return 1; | |
154 | return _raw_read_trylock_retry(rw); | |
155 | } | |
156 | ||
fb1c8f93 | 157 | static inline int __raw_write_trylock(raw_rwlock_t *rw) |
1da177e4 | 158 | { |
951f22d5 MS |
159 | if (likely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0)) |
160 | return 1; | |
161 | return _raw_write_trylock_retry(rw); | |
1da177e4 LT |
162 | } |
163 | ||
ef6edc97 MS |
164 | #define _raw_read_relax(lock) cpu_relax() |
165 | #define _raw_write_relax(lock) cpu_relax() | |
166 | ||
1da177e4 | 167 | #endif /* __ASM_SPINLOCK_H */ |