[linux-2.6-block.git] / include / asm-ppc64 / ptrace.h

#ifndef _PPC64_PTRACE_H
#define _PPC64_PTRACE_H

/*
 * Copyright (C) 2001 PPC64 Team, IBM Corp
 *
 * This struct defines the way the registers are stored on the
 * kernel stack during a system call or other kernel entry.
 *
 * this should only contain volatile regs
 * since we can keep non-volatile in the thread_struct
 * should set this up when only volatiles are saved
 * by intr code.
 *
 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
 * that the overall structure is a multiple of 16 bytes in length.
 *
 * Note that the offsets of the fields in this struct correspond with
 * the PT_* values below.  This simplifies arch/ppc64/kernel/ptrace.c.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef __ASSEMBLY__

struct pt_regs {
	unsigned long gpr[32];
	unsigned long nip;
	unsigned long msr;
	unsigned long orig_gpr3; /* Used for restarting system calls */
	unsigned long ctr;
	unsigned long link;
	unsigned long xer;
	unsigned long ccr;
	unsigned long softe;	/* Soft enabled/disabled */
	unsigned long trap;	/* Reason for being here */
	unsigned long dar;	/* Fault registers */
	unsigned long dsisr;
	unsigned long result;	/* Result of a system call */
};

struct pt_regs32 {
	unsigned int gpr[32];
	unsigned int nip;
	unsigned int msr;
	unsigned int orig_gpr3;	/* Used for restarting system calls */
	unsigned int ctr;
	unsigned int link;
	unsigned int xer;
	unsigned int ccr;
	unsigned int mq;	/* 601 only (not used at present) */
	unsigned int trap;	/* Reason for being here */
	unsigned int dar;	/* Fault registers */
	unsigned int dsisr;
	unsigned int result;	/* Result of a system call */
};

#ifdef __KERNEL__

#define instruction_pointer(regs) ((regs)->nip)

#ifdef CONFIG_SMP
extern unsigned long profile_pc(struct pt_regs *regs);
#else
#define profile_pc(regs) instruction_pointer(regs)
#endif

#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)

#define force_successful_syscall_return()   \
		(current_thread_info()->syscall_noerror = 1)

/*
 * We use the least-significant bit of the trap field to indicate
 * whether we have saved the full set of registers, or only a
 * partial set.  A 1 there means the partial set.
 */
#define FULL_REGS(regs)		(((regs)->trap & 1) == 0)
#define TRAP(regs)		((regs)->trap & ~0xF)
#define CHECK_FULL_REGS(regs)	BUG_ON(regs->trap & 1)

#endif /* __KERNEL__ */

#endif /* __ASSEMBLY__ */

#define STACK_FRAME_OVERHEAD	112	/* size of minimum stack frame */

/* Size of dummy stack frame allocated when calling signal handler. */
#define __SIGNAL_FRAMESIZE	128
#define __SIGNAL_FRAMESIZE32	64

/*
 * Offsets used by 'ptrace' system call interface.
 */
#define PT_R0	0
#define PT_R1	1
#define PT_R2	2
#define PT_R3	3
#define PT_R4	4
#define PT_R5	5
#define PT_R6	6
#define PT_R7	7
#define PT_R8	8
#define PT_R9	9
#define PT_R10	10
#define PT_R11	11
#define PT_R12	12
#define PT_R13	13
#define PT_R14	14
#define PT_R15	15
#define PT_R16	16
#define PT_R17	17
#define PT_R18	18
#define PT_R19	19
#define PT_R20	20
#define PT_R21	21
#define PT_R22	22
#define PT_R23	23
#define PT_R24	24
#define PT_R25	25
#define PT_R26	26
#define PT_R27	27
#define PT_R28	28
#define PT_R29	29
#define PT_R30	30
#define PT_R31	31

#define PT_NIP	32
#define PT_MSR	33
#ifdef __KERNEL__
#define PT_ORIG_R3 34
#endif
#define PT_CTR	35
#define PT_LNK	36
#define PT_XER	37
#define PT_CCR	38
#define PT_SOFTE 39
#define PT_TRAP	40
#define PT_DAR	41
#define PT_DSISR 42
#define PT_RESULT 43

#define PT_FPR0	48

/*
 * Kernel and userspace will both use this PT_FPSCR value.  32-bit apps will
 * have visibility to the asm-ppc/ptrace.h header instead of this one.
 */
#define PT_FPSCR (PT_FPR0 + 32)	/* each FP reg occupies 1 slot in 64-bit space */

#ifdef __KERNEL__
#define PT_FPSCR32 (PT_FPR0 + 2*32 + 1)	/* each FP reg occupies 2 32-bit userspace slots */
#endif

#define PT_VR0 82	/* each Vector reg occupies 2 slots in 64-bit */
#define PT_VSCR (PT_VR0 + 32*2 + 1)
#define PT_VRSAVE (PT_VR0 + 33*2)

#ifdef __KERNEL__
#define PT_VR0_32 164	/* each Vector reg occupies 4 slots in 32-bit */
#define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
#define PT_VRSAVE_32 (PT_VR0 + 33*4)
#endif

/*
 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 
 * The transfer totals 34 quadword.  Quadwords 0-31 contain the 
 * corresponding vector registers.  Quadword 32 contains the vscr as the 
 * last word (offset 12) within that quadword.  Quadword 33 contains the 
 * vrsave as the first word (offset 0) within the quadword.
 *
 * This definition of the VMX state is compatible with the current PPC32 
 * ptrace interface.  This allows signal handling and ptrace to use the same 
 * structures.  This also simplifies the implementation of a bi-arch 
 * (combined (32- and 64-bit) gdb.
 */
#define PTRACE_GETVRREGS	18
#define PTRACE_SETVRREGS	19

/*
 * While we dont have 64bit book E processors, we need to reserve the
 * relevant ptrace calls for 32bit compatibility.
 */
#if 0
#define PTRACE_GETEVRREGS       20
#define PTRACE_SETEVRREGS       21
#endif

/*
 * Get or set a debug register. The first 16 are DABR registers and the
 * second 16 are IABR registers.
 */
#define PTRACE_GET_DEBUGREG	25
#define PTRACE_SET_DEBUGREG	26

/* Additional PTRACE requests implemented on PowerPC. */
#define PPC_PTRACE_GETREGS	0x99	/* Get GPRs 0 - 31 */
#define PPC_PTRACE_SETREGS	0x98	/* Set GPRs 0 - 31 */
#define PPC_PTRACE_GETFPREGS	0x97	/* Get FPRs 0 - 31 */
#define PPC_PTRACE_SETFPREGS	0x96	/* Set FPRs 0 - 31 */

/* Calls to trace a 64bit program from a 32bit program */
#define PPC_PTRACE_PEEKTEXT_3264 0x95
#define PPC_PTRACE_PEEKDATA_3264 0x94
#define PPC_PTRACE_POKETEXT_3264 0x93
#define PPC_PTRACE_POKEDATA_3264 0x92
#define PPC_PTRACE_PEEKUSR_3264  0x91
#define PPC_PTRACE_POKEUSR_3264  0x90

#endif /* _PPC64_PTRACE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _PPC64_PTRACE_H
	2	#define _PPC64_PTRACE_H
	3
	4	/*
	5	* Copyright (C) 2001 PPC64 Team, IBM Corp
	6	*
	7	* This struct defines the way the registers are stored on the
	8	* kernel stack during a system call or other kernel entry.
	9	*
	10	* this should only contain volatile regs
	11	* since we can keep non-volatile in the thread_struct
	12	* should set this up when only volatiles are saved
	13	* by intr code.
	14	*
	15	* Since this is going on the stack, CARE MUST BE TAKEN to insure
	16	* that the overall structure is a multiple of 16 bytes in length.
	17	*
	18	* Note that the offsets of the fields in this struct correspond with
	19	* the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c.
	20	*
	21	* This program is free software; you can redistribute it and/or
	22	* modify it under the terms of the GNU General Public License
	23	* as published by the Free Software Foundation; either version
	24	* 2 of the License, or (at your option) any later version.
	25	*/
	26
	27	#ifndef __ASSEMBLY__
a0987224	28
1da177e4	29	struct pt_regs {
a0987224 AB	30	unsigned long gpr[32];
	31	unsigned long nip;
	32	unsigned long msr;
	33	unsigned long orig_gpr3; /* Used for restarting system calls */
	34	unsigned long ctr;
	35	unsigned long link;
	36	unsigned long xer;
	37	unsigned long ccr;
	38	unsigned long softe; /* Soft enabled/disabled */
	39	unsigned long trap; /* Reason for being here */
	40	unsigned long dar; /* Fault registers */
	41	unsigned long dsisr;
	42	unsigned long result; /* Result of a system call */
1da177e4 LT	43	};
1da177e4 LT	44
1da177e4	45	struct pt_regs32 {
a0987224 AB	46	unsigned int gpr[32];
	47	unsigned int nip;
	48	unsigned int msr;
	49	unsigned int orig_gpr3; /* Used for restarting system calls */
	50	unsigned int ctr;
	51	unsigned int link;
	52	unsigned int xer;
	53	unsigned int ccr;
	54	unsigned int mq; /* 601 only (not used at present) */
	55	unsigned int trap; /* Reason for being here */
	56	unsigned int dar; /* Fault registers */
	57	unsigned int dsisr;
	58	unsigned int result; /* Result of a system call */
1da177e4 LT	59	};
1da177e4 LT	60
a0987224 AB	61	#ifdef __KERNEL__
a0987224 AB	62
1da177e4	63	#define instruction_pointer(regs) ((regs)->nip)
a0987224	64
1da177e4 LT	65	#ifdef CONFIG_SMP
	66	extern unsigned long profile_pc(struct pt_regs *regs);
	67	#else
	68	#define profile_pc(regs) instruction_pointer(regs)
	69	#endif
	70
1da177e4 LT	71	#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
	72
	73	#define force_successful_syscall_return() \
	74	(current_thread_info()->syscall_noerror = 1)
	75
	76	/*
	77	* We use the least-significant bit of the trap field to indicate
	78	* whether we have saved the full set of registers, or only a
	79	* partial set. A 1 there means the partial set.
	80	*/
	81	#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
	82	#define TRAP(regs) ((regs)->trap & ~0xF)
	83	#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
	84
a0987224 AB	85	#endif /* __KERNEL__ */
	86
	87	#endif /* __ASSEMBLY__ */
	88
	89	#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
	90
	91	/* Size of dummy stack frame allocated when calling signal handler. */
	92	#define __SIGNAL_FRAMESIZE 128
	93	#define __SIGNAL_FRAMESIZE32 64
	94
1da177e4 LT	95	/*
	96	* Offsets used by 'ptrace' system call interface.
	97	*/
	98	#define PT_R0 0
	99	#define PT_R1 1
	100	#define PT_R2 2
	101	#define PT_R3 3
	102	#define PT_R4 4
	103	#define PT_R5 5
	104	#define PT_R6 6
	105	#define PT_R7 7
	106	#define PT_R8 8
	107	#define PT_R9 9
	108	#define PT_R10 10
	109	#define PT_R11 11
	110	#define PT_R12 12
	111	#define PT_R13 13
	112	#define PT_R14 14
	113	#define PT_R15 15
	114	#define PT_R16 16
	115	#define PT_R17 17
	116	#define PT_R18 18
	117	#define PT_R19 19
	118	#define PT_R20 20
	119	#define PT_R21 21
	120	#define PT_R22 22
	121	#define PT_R23 23
	122	#define PT_R24 24
	123	#define PT_R25 25
	124	#define PT_R26 26
	125	#define PT_R27 27
	126	#define PT_R28 28
	127	#define PT_R29 29
	128	#define PT_R30 30
	129	#define PT_R31 31
	130
	131	#define PT_NIP 32
	132	#define PT_MSR 33
	133	#ifdef __KERNEL__
	134	#define PT_ORIG_R3 34
	135	#endif
	136	#define PT_CTR 35
	137	#define PT_LNK 36
	138	#define PT_XER 37
	139	#define PT_CCR 38
	140	#define PT_SOFTE 39
a0987224 AB	141	#define PT_TRAP 40
	142	#define PT_DAR 41
	143	#define PT_DSISR 42
1da177e4 LT	144	#define PT_RESULT 43
	145
	146	#define PT_FPR0 48
	147
a0987224 AB	148	/*
	149	* Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will
	150	* have visibility to the asm-ppc/ptrace.h header instead of this one.
1da177e4	151	*/
a0987224	152	#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
1da177e4 LT	153
1da177e4 LT	154	#ifdef __KERNEL__
a0987224	155	#define PT_FPSCR32 (PT_FPR0 + 232 + 1) / each FP reg occupies 2 32-bit userspace slots */
1da177e4 LT	156	#endif
	157
	158	#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
	159	#define PT_VSCR (PT_VR0 + 32*2 + 1)
	160	#define PT_VRSAVE (PT_VR0 + 33*2)
	161
	162	#ifdef __KERNEL__
	163	#define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
	164	#define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
	165	#define PT_VRSAVE_32 (PT_VR0 + 33*4)
	166	#endif
	167
	168	/*
	169	* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
	170	* The transfer totals 34 quadword. Quadwords 0-31 contain the
	171	* corresponding vector registers. Quadword 32 contains the vscr as the
	172	* last word (offset 12) within that quadword. Quadword 33 contains the
	173	* vrsave as the first word (offset 0) within the quadword.
	174	*
	175	* This definition of the VMX state is compatible with the current PPC32
	176	* ptrace interface. This allows signal handling and ptrace to use the same
	177	* structures. This also simplifies the implementation of a bi-arch
	178	* (combined (32- and 64-bit) gdb.
	179	*/
	180	#define PTRACE_GETVRREGS 18
	181	#define PTRACE_SETVRREGS 19
	182
a0987224 AB	183	/*
	184	* While we dont have 64bit book E processors, we need to reserve the
	185	* relevant ptrace calls for 32bit compatibility.
	186	*/
	187	#if 0
	188	#define PTRACE_GETEVRREGS 20
	189	#define PTRACE_SETEVRREGS 21
	190	#endif
1da177e4	191
a94d3085 AB	192	/*
	193	* Get or set a debug register. The first 16 are DABR registers and the
	194	* second 16 are IABR registers.
	195	*/
	196	#define PTRACE_GET_DEBUGREG 25
	197	#define PTRACE_SET_DEBUGREG 26
	198
a0987224 AB	199	/* Additional PTRACE requests implemented on PowerPC. */
	200	#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
	201	#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
	202	#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
	203	#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
	204
	205	/* Calls to trace a 64bit program from a 32bit program */
	206	#define PPC_PTRACE_PEEKTEXT_3264 0x95
	207	#define PPC_PTRACE_PEEKDATA_3264 0x94
	208	#define PPC_PTRACE_POKETEXT_3264 0x93
	209	#define PPC_PTRACE_POKEDATA_3264 0x92
	210	#define PPC_PTRACE_PEEKUSR_3264 0x91
	211	#define PPC_PTRACE_POKEUSR_3264 0x90
1da177e4 LT	212
1da177e4 LT	213	#endif /* _PPC64_PTRACE_H */