[linux-2.6-block.git] / include / asm-powerpc / oprofile_impl.h

/*
 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * Based on alpha version.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
#define _ASM_POWERPC_OPROFILE_IMPL_H
#ifdef __KERNEL__

#define OP_MAX_COUNTER 8

/* Per-counter configuration as set via oprofilefs.  */
struct op_counter_config {
#ifdef __powerpc64__
	unsigned long valid;
#endif
	unsigned long enabled;
	unsigned long event;
	unsigned long count;
	/* Classic doesn't support per-counter user/kernel selection */
	unsigned long kernel;
	unsigned long user;
	unsigned long unit_mask;
};

/* System-wide configuration as set via oprofilefs.  */
struct op_system_config {
#ifdef CONFIG_PPC64
	unsigned long mmcr0;
	unsigned long mmcr1;
	unsigned long mmcra;
#endif
	unsigned long enable_kernel;
	unsigned long enable_user;
#ifdef CONFIG_PPC64
	unsigned long backtrace_spinlocks;
#endif
};

/* Per-arch configuration */
struct op_powerpc_model {
	void (*reg_setup) (struct op_counter_config *,
			   struct op_system_config *,
			   int num_counters);
	void (*cpu_setup) (void *);
	void (*start) (struct op_counter_config *);
	void (*stop) (void);
	void (*handle_interrupt) (struct pt_regs *,
				  struct op_counter_config *);
	int num_counters;
};

#ifdef CONFIG_FSL_BOOKE
extern struct op_powerpc_model op_model_fsl_booke;
#else /* Otherwise, it's classic */

#ifdef CONFIG_PPC64
extern struct op_powerpc_model op_model_rs64;
extern struct op_powerpc_model op_model_power4;

#else /* Otherwise, CONFIG_PPC32 */
extern struct op_powerpc_model op_model_7450;
#endif

/* All the classic PPC parts use these */
static inline unsigned int ctr_read(unsigned int i)
{
	switch(i) {
	case 0:
		return mfspr(SPRN_PMC1);
	case 1:
		return mfspr(SPRN_PMC2);
	case 2:
		return mfspr(SPRN_PMC3);
	case 3:
		return mfspr(SPRN_PMC4);
	case 4:
		return mfspr(SPRN_PMC5);
	case 5:
		return mfspr(SPRN_PMC6);

/* No PPC32 chip has more than 6 so far */
#ifdef CONFIG_PPC64
	case 6:
		return mfspr(SPRN_PMC7);
	case 7:
		return mfspr(SPRN_PMC8);
#endif
	default:
		return 0;
	}
}

static inline void ctr_write(unsigned int i, unsigned int val)
{
	switch(i) {
	case 0:
		mtspr(SPRN_PMC1, val);
		break;
	case 1:
		mtspr(SPRN_PMC2, val);
		break;
	case 2:
		mtspr(SPRN_PMC3, val);
		break;
	case 3:
		mtspr(SPRN_PMC4, val);
		break;
	case 4:
		mtspr(SPRN_PMC5, val);
		break;
	case 5:
		mtspr(SPRN_PMC6, val);
		break;

/* No PPC32 chip has more than 6, yet */
#ifdef CONFIG_PPC64
	case 6:
		mtspr(SPRN_PMC7, val);
		break;
	case 7:
		mtspr(SPRN_PMC8, val);
		break;
#endif
	default:
		break;
	}
}
#endif /* !CONFIG_FSL_BOOKE */

#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
	3	*
	4	* Based on alpha version.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
654810ec SR	12	#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
654810ec SR	13	#define _ASM_POWERPC_OPROFILE_IMPL_H
88ced031	14	#ifdef __KERNEL__
1da177e4 LT	15
	16	#define OP_MAX_COUNTER 8
	17
	18	/* Per-counter configuration as set via oprofilefs. */
	19	struct op_counter_config {
654810ec	20	#ifdef __powerpc64__
1da177e4	21	unsigned long valid;
654810ec	22	#endif
1da177e4 LT	23	unsigned long enabled;
	24	unsigned long event;
	25	unsigned long count;
555d97ac	26	/* Classic doesn't support per-counter user/kernel selection */
1da177e4	27	unsigned long kernel;
1da177e4 LT	28	unsigned long user;
	29	unsigned long unit_mask;
	30	};
	31
	32	/* System-wide configuration as set via oprofilefs. */
	33	struct op_system_config {
555d97ac	34	#ifdef CONFIG_PPC64
1da177e4 LT	35	unsigned long mmcr0;
	36	unsigned long mmcr1;
	37	unsigned long mmcra;
654810ec	38	#endif
1da177e4 LT	39	unsigned long enable_kernel;
1da177e4 LT	40	unsigned long enable_user;
555d97ac	41	#ifdef CONFIG_PPC64
1da177e4	42	unsigned long backtrace_spinlocks;
654810ec	43	#endif
1da177e4 LT	44	};
	45
	46	/* Per-arch configuration */
a3e48c10	47	struct op_powerpc_model {
1da177e4 LT	48	void (reg_setup) (struct op_counter_config ,
	49	struct op_system_config *,
	50	int num_counters);
	51	void (cpu_setup) (void );
	52	void (start) (struct op_counter_config );
	53	void (*stop) (void);
	54	void (handle_interrupt) (struct pt_regs ,
	55	struct op_counter_config *);
	56	int num_counters;
	57	};
	58
555d97ac AF	59	#ifdef CONFIG_FSL_BOOKE
	60	extern struct op_powerpc_model op_model_fsl_booke;
	61	#else /* Otherwise, it's classic */
	62
	63	#ifdef CONFIG_PPC64
a3e48c10 SR	64	extern struct op_powerpc_model op_model_rs64;
a3e48c10 SR	65	extern struct op_powerpc_model op_model_power4;
dca85932	66
555d97ac AF	67	#else /* Otherwise, CONFIG_PPC32 */
	68	extern struct op_powerpc_model op_model_7450;
	69	#endif
	70
	71	/* All the classic PPC parts use these */
1da177e4 LT	72	static inline unsigned int ctr_read(unsigned int i)
	73	{
	74	switch(i) {
	75	case 0:
	76	return mfspr(SPRN_PMC1);
	77	case 1:
	78	return mfspr(SPRN_PMC2);
	79	case 2:
	80	return mfspr(SPRN_PMC3);
	81	case 3:
	82	return mfspr(SPRN_PMC4);
	83	case 4:
	84	return mfspr(SPRN_PMC5);
	85	case 5:
	86	return mfspr(SPRN_PMC6);
555d97ac AF	87
	88	/* No PPC32 chip has more than 6 so far */
	89	#ifdef CONFIG_PPC64
1da177e4 LT	90	case 6:
	91	return mfspr(SPRN_PMC7);
	92	case 7:
	93	return mfspr(SPRN_PMC8);
555d97ac	94	#endif
1da177e4 LT	95	default:
	96	return 0;
	97	}
	98	}
	99
	100	static inline void ctr_write(unsigned int i, unsigned int val)
	101	{
	102	switch(i) {
	103	case 0:
	104	mtspr(SPRN_PMC1, val);
	105	break;
	106	case 1:
	107	mtspr(SPRN_PMC2, val);
	108	break;
	109	case 2:
	110	mtspr(SPRN_PMC3, val);
	111	break;
	112	case 3:
	113	mtspr(SPRN_PMC4, val);
	114	break;
	115	case 4:
	116	mtspr(SPRN_PMC5, val);
	117	break;
	118	case 5:
	119	mtspr(SPRN_PMC6, val);
	120	break;
555d97ac AF	121
	122	/* No PPC32 chip has more than 6, yet */
	123	#ifdef CONFIG_PPC64
1da177e4 LT	124	case 6:
	125	mtspr(SPRN_PMC7, val);
	126	break;
	127	case 7:
	128	mtspr(SPRN_PMC8, val);
	129	break;
555d97ac	130	#endif
1da177e4 LT	131	default:
	132	break;
	133	}
	134	}
555d97ac	135	#endif /* !CONFIG_FSL_BOOKE */
1da177e4	136
88ced031	137	#endif /* __KERNEL__ */
654810ec	138	#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */