[linux-block.git] / include / asm-powerpc / io.h

#ifndef _ASM_POWERPC_IO_H
#define _ASM_POWERPC_IO_H
#ifdef __KERNEL__

/* 
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

/* Check of existence of legacy devices */
extern int check_legacy_ioport(unsigned long base_port);
#define PNPBIOS_BASE	0xf000	/* only relevant for PReP */

#ifndef CONFIG_PPC64
#include <asm-ppc/io.h>
#else

#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/byteorder.h>
#include <asm/paca.h>
#include <asm/synch.h>
#include <asm/delay.h>

#include <asm-generic/iomap.h>

#define SIO_CONFIG_RA	0x398
#define SIO_CONFIG_RD	0x399

#define SLOW_DOWN_IO

extern unsigned long isa_io_base;
extern unsigned long pci_io_base;

#ifdef CONFIG_PPC_ISERIES

extern int in_8(const volatile unsigned char __iomem *addr);
extern void out_8(volatile unsigned char __iomem *addr, int val);
extern int in_le16(const volatile unsigned short __iomem *addr);
extern int in_be16(const volatile unsigned short __iomem *addr);
extern void out_le16(volatile unsigned short __iomem *addr, int val);
extern void out_be16(volatile unsigned short __iomem *addr, int val);
extern unsigned in_le32(const volatile unsigned __iomem *addr);
extern unsigned in_be32(const volatile unsigned __iomem *addr);
extern void out_le32(volatile unsigned __iomem *addr, int val);
extern void out_be32(volatile unsigned __iomem *addr, int val);
extern unsigned long in_le64(const volatile unsigned long __iomem *addr);
extern unsigned long in_be64(const volatile unsigned long __iomem *addr);
extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val);
extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val);

extern unsigned char __raw_readb(const volatile void __iomem *addr);
extern unsigned short __raw_readw(const volatile void __iomem *addr);
extern unsigned int __raw_readl(const volatile void __iomem *addr);
extern unsigned long __raw_readq(const volatile void __iomem *addr);
extern void __raw_writeb(unsigned char v, volatile void __iomem *addr);
extern void __raw_writew(unsigned short v, volatile void __iomem *addr);
extern void __raw_writel(unsigned int v, volatile void __iomem *addr);
extern void __raw_writeq(unsigned long v, volatile void __iomem *addr);

extern void memset_io(volatile void __iomem *addr, int c, unsigned long n);
extern void memcpy_fromio(void *dest, const volatile void __iomem *src,
                                 unsigned long n);
extern void memcpy_toio(volatile void __iomem *dest, const void *src,
                                 unsigned long n);

#else /* CONFIG_PPC_ISERIES */

#define in_8(addr)		__in_8((addr))
#define out_8(addr, val)	__out_8((addr), (val))
#define in_le16(addr)		__in_le16((addr))
#define in_be16(addr)		__in_be16((addr))
#define out_le16(addr, val)	__out_le16((addr), (val))
#define out_be16(addr, val)	__out_be16((addr), (val))
#define in_le32(addr)		__in_le32((addr))
#define in_be32(addr)		__in_be32((addr))
#define out_le32(addr, val)	__out_le32((addr), (val))
#define out_be32(addr, val)	__out_be32((addr), (val))
#define in_le64(addr)		__in_le64((addr))
#define in_be64(addr)		__in_be64((addr))
#define out_le64(addr, val)	__out_le64((addr), (val))
#define out_be64(addr, val)	__out_be64((addr), (val))

static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
	return *(volatile unsigned char __force *)addr;
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *)addr;
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *)addr;
}
static inline unsigned long __raw_readq(const volatile void __iomem *addr)
{
	return *(volatile unsigned long __force *)addr;
}
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *)addr = v;
}
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *)addr = v;
}
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *)addr = v;
}
static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
{
	*(volatile unsigned long __force *)addr = v;
}
#define memset_io(a,b,c)	eeh_memset_io((a),(b),(c))
#define memcpy_fromio(a,b,c)	eeh_memcpy_fromio((a),(b),(c))
#define memcpy_toio(a,b,c)	eeh_memcpy_toio((a),(b),(c))

#endif /* CONFIG_PPC_ISERIES */

/*
 * The insw/outsw/insl/outsl macros don't do byte-swapping.
 * They are only used in practice for transferring buffers which
 * are arrays of bytes, and byte-swapping is not appropriate in
 * that case.  - paulus */
#define insb(port, buf, ns)	eeh_insb((port), (buf), (ns))
#define insw(port, buf, ns)	eeh_insw_ns((port), (buf), (ns))
#define insl(port, buf, nl)	eeh_insl_ns((port), (buf), (nl))

#define outsb(port, buf, ns)  _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
#define outsw(port, buf, ns)  _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
#define outsl(port, buf, nl)  _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))

#define readb(addr)		eeh_readb(addr)
#define readw(addr)		eeh_readw(addr)
#define readl(addr)		eeh_readl(addr)
#define readq(addr)		eeh_readq(addr)
#define writeb(data, addr)	eeh_writeb((data), (addr))
#define writew(data, addr)	eeh_writew((data), (addr))
#define writel(data, addr)	eeh_writel((data), (addr))
#define writeq(data, addr)	eeh_writeq((data), (addr))
#define inb(port)		eeh_inb((unsigned long)port)
#define outb(val, port)		eeh_outb(val, (unsigned long)port)
#define inw(port)		eeh_inw((unsigned long)port)
#define outw(val, port)		eeh_outw(val, (unsigned long)port)
#define inl(port)		eeh_inl((unsigned long)port)
#define outl(val, port)		eeh_outl(val, (unsigned long)port)

#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define readq_relaxed(addr) readq(addr)

extern void _insb(volatile u8 __iomem *port, void *buf, long count);
extern void _outsb(volatile u8 __iomem *port, const void *buf, long count);
extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count);
extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count);
extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count);
extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count);

static inline void mmiowb(void)
{
	unsigned long tmp;

	__asm__ __volatile__("sync; li %0,0; stb %0,%1(13)"
	: "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync))
	: "memory");
}

/*
 * output pause versions need a delay at least for the
 * w83c105 ide controller in a p610.
 */
#define inb_p(port)             inb(port)
#define outb_p(val, port)       (udelay(1), outb((val), (port)))
#define inw_p(port)             inw(port)
#define outw_p(val, port)       (udelay(1), outw((val), (port)))
#define inl_p(port)             inl(port)
#define outl_p(val, port)       (udelay(1), outl((val), (port)))


#define IO_SPACE_LIMIT ~(0UL)


extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
		     	      unsigned long size, unsigned long flags);
extern void __iomem *__ioremap(unsigned long address, unsigned long size,
		       unsigned long flags);

/**
 * ioremap     -   map bus memory into CPU space
 * @address:   bus address of the memory
 * @size:      size of the resource to map
 *
 * ioremap performs a platform specific sequence of operations to
 * make bus memory CPU accessible via the readb/readw/readl/writeb/
 * writew/writel functions and the other mmio helpers. The returned
 * address is not guaranteed to be usable directly as a virtual
 * address.
 */
extern void __iomem *ioremap(unsigned long address, unsigned long size);

#define ioremap_nocache(addr, size)	ioremap((addr), (size))
extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
extern void iounmap(volatile void __iomem *addr);
extern void __iomem * reserve_phb_iospace(unsigned long size);

/**
 *	virt_to_phys	-	map virtual addresses to physical
 *	@address: address to remap
 *
 *	The returned physical address is the physical (CPU) mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses directly mapped or allocated via kmalloc.
 *
 *	This function does not give bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */
static inline unsigned long virt_to_phys(volatile void * address)
{
	return __pa((unsigned long)address);
}

/**
 *	phys_to_virt	-	map physical address to virtual
 *	@address: address to remap
 *
 *	The returned virtual address is a current CPU mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses that have a kernel mapping
 *
 *	This function does not handle bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */
static inline void * phys_to_virt(unsigned long address)
{
	return (void *)__va(address);
}

/*
 * Change "struct page" to physical address.
 */
#define page_to_phys(page)	(page_to_pfn(page) << PAGE_SHIFT)

/* We do NOT want virtual merging, it would put too much pressure on
 * our iommu allocator. Instead, we want drivers to be smart enough
 * to coalesce sglists that happen to have been mapped in a contiguous
 * way by the iommu
 */
#define BIO_VMERGE_BOUNDARY	0

static inline void iosync(void)
{
        __asm__ __volatile__ ("sync" : : : "memory");
}

/* Enforce in-order execution of data I/O. 
 * No distinction between read/write on PPC; use eieio for all three.
 */
#define iobarrier_rw() eieio()
#define iobarrier_r()  eieio()
#define iobarrier_w()  eieio()

/*
 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
 * These routines do not perform EEH-related I/O address translation,
 * and should not be used directly by device drivers.  Use inb/readb
 * instead.
 */
static inline int __in_8(const volatile unsigned char __iomem *addr)
{
	int ret;

	__asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
			     : "=r" (ret) : "m" (*addr));
	return ret;
}

static inline void __out_8(volatile unsigned char __iomem *addr, int val)
{
	__asm__ __volatile__("sync; stb%U0%X0 %1,%0"
			     : "=m" (*addr) : "r" (val));
	get_paca()->io_sync = 1;
}

static inline int __in_le16(const volatile unsigned short __iomem *addr)
{
	int ret;

	__asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync"
			     : "=r" (ret) : "r" (addr), "m" (*addr));
	return ret;
}

static inline int __in_be16(const volatile unsigned short __iomem *addr)
{
	int ret;

	__asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
			     : "=r" (ret) : "m" (*addr));
	return ret;
}

static inline void __out_le16(volatile unsigned short __iomem *addr, int val)
{
	__asm__ __volatile__("sync; sthbrx %1,0,%2"
			     : "=m" (*addr) : "r" (val), "r" (addr));
	get_paca()->io_sync = 1;
}

static inline void __out_be16(volatile unsigned short __iomem *addr, int val)
{
	__asm__ __volatile__("sync; sth%U0%X0 %1,%0"
			     : "=m" (*addr) : "r" (val));
	get_paca()->io_sync = 1;
}

static inline unsigned __in_le32(const volatile unsigned __iomem *addr)
{
	unsigned ret;

	__asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync"
			     : "=r" (ret) : "r" (addr), "m" (*addr));
	return ret;
}

static inline unsigned __in_be32(const volatile unsigned __iomem *addr)
{
	unsigned ret;

	__asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
			     : "=r" (ret) : "m" (*addr));
	return ret;
}

static inline void __out_le32(volatile unsigned __iomem *addr, int val)
{
	__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr)
			     : "r" (val), "r" (addr));
	get_paca()->io_sync = 1;
}

static inline void __out_be32(volatile unsigned __iomem *addr, int val)
{
	__asm__ __volatile__("sync; stw%U0%X0 %1,%0"
			     : "=m" (*addr) : "r" (val));
	get_paca()->io_sync = 1;
}

static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr)
{
	unsigned long tmp, ret;

	__asm__ __volatile__(
			     "sync\n"
			     "ld %1,0(%2)\n"
			     "twi 0,%1,0\n"
			     "isync\n"
			     "rldimi %0,%1,5*8,1*8\n"
			     "rldimi %0,%1,3*8,2*8\n"
			     "rldimi %0,%1,1*8,3*8\n"
			     "rldimi %0,%1,7*8,4*8\n"
			     "rldicl %1,%1,32,0\n"
			     "rlwimi %0,%1,8,8,31\n"
			     "rlwimi %0,%1,24,16,23\n"
			     : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
	return ret;
}

static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr)
{
	unsigned long ret;

	__asm__ __volatile__("sync; ld%U1%X1 %0,%1; twi 0,%0,0; isync"
			     : "=r" (ret) : "m" (*addr));
	return ret;
}

static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val)
{
	unsigned long tmp;

	__asm__ __volatile__(
			     "rldimi %0,%1,5*8,1*8\n"
			     "rldimi %0,%1,3*8,2*8\n"
			     "rldimi %0,%1,1*8,3*8\n"
			     "rldimi %0,%1,7*8,4*8\n"
			     "rldicl %1,%1,32,0\n"
			     "rlwimi %0,%1,8,8,31\n"
			     "rlwimi %0,%1,24,16,23\n"
			     "sync\n"
			     "std %0,0(%3)"
			     : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
	get_paca()->io_sync = 1;
}

static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val)
{
	__asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
	get_paca()->io_sync = 1;
}

#include <asm/eeh.h>

/* Nothing to do */

#define dma_cache_inv(_start,_size)		do { } while (0)
#define dma_cache_wback(_start,_size)		do { } while (0)
#define dma_cache_wback_inv(_start,_size)	do { } while (0)


/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

#endif /* __KERNEL__ */

#endif /* CONFIG_PPC64 */
#endif /* _ASM_POWERPC_IO_H */
Commit	Line	Data
047ea784 PM	1	#ifndef _ASM_POWERPC_IO_H
047ea784 PM	2	#define _ASM_POWERPC_IO_H
88ced031	3	#ifdef __KERNEL__
1da177e4 LT	4
	5	/*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
1269277a DW	12	/* Check of existence of legacy devices */
1269277a DW	13	extern int check_legacy_ioport(unsigned long base_port);
30cbc222	14	#define PNPBIOS_BASE 0xf000 /* only relevant for PReP */
1269277a	15
047ea784 PM	16	#ifndef CONFIG_PPC64
	17	#include <asm-ppc/io.h>
	18	#else
	19
1da177e4 LT	20	#include <linux/compiler.h>
	21	#include <asm/page.h>
	22	#include <asm/byteorder.h>
f007cacf	23	#include <asm/paca.h>
feaf7cf1	24	#include <asm/synch.h>
1da177e4 LT	25	#include <asm/delay.h>
	26
	27	#include <asm-generic/iomap.h>
	28
1da177e4 LT	29	#define SIO_CONFIG_RA 0x398
	30	#define SIO_CONFIG_RD 0x399
	31
	32	#define SLOW_DOWN_IO
	33
	34	extern unsigned long isa_io_base;
	35	extern unsigned long pci_io_base;
1da177e4 LT	36
1da177e4 LT	37	#ifdef CONFIG_PPC_ISERIES
fa053d2f	38
caf81329 SR	39	extern int in_8(const volatile unsigned char __iomem *addr);
	40	extern void out_8(volatile unsigned char __iomem *addr, int val);
	41	extern int in_le16(const volatile unsigned short __iomem *addr);
	42	extern int in_be16(const volatile unsigned short __iomem *addr);
	43	extern void out_le16(volatile unsigned short __iomem *addr, int val);
	44	extern void out_be16(volatile unsigned short __iomem *addr, int val);
	45	extern unsigned in_le32(const volatile unsigned __iomem *addr);
	46	extern unsigned in_be32(const volatile unsigned __iomem *addr);
	47	extern void out_le32(volatile unsigned __iomem *addr, int val);
	48	extern void out_be32(volatile unsigned __iomem *addr, int val);
	49	extern unsigned long in_le64(const volatile unsigned long __iomem *addr);
	50	extern unsigned long in_be64(const volatile unsigned long __iomem *addr);
	51	extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val);
	52	extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val);
	53
	54	extern unsigned char __raw_readb(const volatile void __iomem *addr);
	55	extern unsigned short __raw_readw(const volatile void __iomem *addr);
	56	extern unsigned int __raw_readl(const volatile void __iomem *addr);
	57	extern unsigned long __raw_readq(const volatile void __iomem *addr);
	58	extern void __raw_writeb(unsigned char v, volatile void __iomem *addr);
	59	extern void __raw_writew(unsigned short v, volatile void __iomem *addr);
	60	extern void __raw_writel(unsigned int v, volatile void __iomem *addr);
	61	extern void __raw_writeq(unsigned long v, volatile void __iomem *addr);
	62
	63	extern void memset_io(volatile void __iomem *addr, int c, unsigned long n);
	64	extern void memcpy_fromio(void dest, const volatile void __iomem src,
	65	unsigned long n);
	66	extern void memcpy_toio(volatile void __iomem dest, const void src,
	67	unsigned long n);
	68
	69	#else /* CONFIG_PPC_ISERIES */
	70
	71	#define in_8(addr) __in_8((addr))
	72	#define out_8(addr, val) __out_8((addr), (val))
	73	#define in_le16(addr) __in_le16((addr))
	74	#define in_be16(addr) __in_be16((addr))
	75	#define out_le16(addr, val) __out_le16((addr), (val))
	76	#define out_be16(addr, val) __out_be16((addr), (val))
	77	#define in_le32(addr) __in_le32((addr))
	78	#define in_be32(addr) __in_be32((addr))
	79	#define out_le32(addr, val) __out_le32((addr), (val))
	80	#define out_be32(addr, val) __out_be32((addr), (val))
	81	#define in_le64(addr) __in_le64((addr))
	82	#define in_be64(addr) __in_be64((addr))
	83	#define out_le64(addr, val) __out_le64((addr), (val))
	84	#define out_be64(addr, val) __out_be64((addr), (val))
1da177e4 LT	85
	86	static inline unsigned char __raw_readb(const volatile void __iomem *addr)
	87	{
	88	return (volatile unsigned char __force )addr;
	89	}
	90	static inline unsigned short __raw_readw(const volatile void __iomem *addr)
	91	{
	92	return (volatile unsigned short __force )addr;
	93	}
	94	static inline unsigned int __raw_readl(const volatile void __iomem *addr)
	95	{
	96	return (volatile unsigned int __force )addr;
	97	}
	98	static inline unsigned long __raw_readq(const volatile void __iomem *addr)
	99	{
	100	return (volatile unsigned long __force )addr;
	101	}
	102	static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
	103	{
	104	(volatile unsigned char __force )addr = v;
	105	}
	106	static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
	107	{
	108	(volatile unsigned short __force )addr = v;
	109	}
	110	static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
	111	{
	112	(volatile unsigned int __force )addr = v;
	113	}
	114	static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
	115	{
	116	(volatile unsigned long __force )addr = v;
	117	}
1da177e4 LT	118	#define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
	119	#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
	120	#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
caf81329 SR	121
caf81329 SR	122	#endif /* CONFIG_PPC_ISERIES */
1da177e4 LT	123
	124	/*
	125	* The insw/outsw/insl/outsl macros don't do byte-swapping.
	126	* They are only used in practice for transferring buffers which
	127	* are arrays of bytes, and byte-swapping is not appropriate in
	128	* that case. - paulus */
	129	#define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
	130	#define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
	131	#define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
1da177e4	132
6c9afc65 Z	133	#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
	134	#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
	135	#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
1da177e4	136
caf81329 SR	137	#define readb(addr) eeh_readb(addr)
	138	#define readw(addr) eeh_readw(addr)
	139	#define readl(addr) eeh_readl(addr)
	140	#define readq(addr) eeh_readq(addr)
	141	#define writeb(data, addr) eeh_writeb((data), (addr))
	142	#define writew(data, addr) eeh_writew((data), (addr))
	143	#define writel(data, addr) eeh_writel((data), (addr))
	144	#define writeq(data, addr) eeh_writeq((data), (addr))
	145	#define inb(port) eeh_inb((unsigned long)port)
	146	#define outb(val, port) eeh_outb(val, (unsigned long)port)
	147	#define inw(port) eeh_inw((unsigned long)port)
	148	#define outw(val, port) eeh_outw(val, (unsigned long)port)
	149	#define inl(port) eeh_inl((unsigned long)port)
	150	#define outl(val, port) eeh_outl(val, (unsigned long)port)
	151
1da177e4 LT	152	#define readb_relaxed(addr) readb(addr)
	153	#define readw_relaxed(addr) readw(addr)
	154	#define readl_relaxed(addr) readl(addr)
	155	#define readq_relaxed(addr) readq(addr)
	156
5adcaf50 SR	157	extern void _insb(volatile u8 __iomem port, void buf, long count);
	158	extern void _outsb(volatile u8 __iomem port, const void buf, long count);
	159	extern void _insw_ns(volatile u16 __iomem port, void buf, long count);
	160	extern void _outsw_ns(volatile u16 __iomem port, const void buf, long count);
	161	extern void _insl_ns(volatile u32 __iomem port, void buf, long count);
	162	extern void _outsl_ns(volatile u32 __iomem port, const void buf, long count);
1da177e4	163
f007cacf PM	164	static inline void mmiowb(void)
f007cacf PM	165	{
292f86f0 HD	166	unsigned long tmp;
	167
	168	__asm__ __volatile__("sync; li %0,0; stb %0,%1(13)"
	169	: "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync))
	170	: "memory");
f007cacf	171	}
1da177e4 LT	172
	173	/*
	174	* output pause versions need a delay at least for the
	175	* w83c105 ide controller in a p610.
	176	*/
	177	#define inb_p(port) inb(port)
	178	#define outb_p(val, port) (udelay(1), outb((val), (port)))
	179	#define inw_p(port) inw(port)
	180	#define outw_p(val, port) (udelay(1), outw((val), (port)))
	181	#define inl_p(port) inl(port)
	182	#define outl_p(val, port) (udelay(1), outl((val), (port)))
	183
1da177e4 LT	184
	185	#define IO_SPACE_LIMIT ~(0UL)
	186
	187
1da177e4 LT	188	extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
	189	unsigned long size, unsigned long flags);
	190	extern void __iomem *__ioremap(unsigned long address, unsigned long size,
	191	unsigned long flags);
	192
	193	/**
	194	* ioremap - map bus memory into CPU space
	195	* @address: bus address of the memory
	196	* @size: size of the resource to map
	197	*
	198	* ioremap performs a platform specific sequence of operations to
	199	* make bus memory CPU accessible via the readb/readw/readl/writeb/
	200	* writew/writel functions and the other mmio helpers. The returned
	201	* address is not guaranteed to be usable directly as a virtual
	202	* address.
	203	*/
	204	extern void __iomem *ioremap(unsigned long address, unsigned long size);
	205
	206	#define ioremap_nocache(addr, size) ioremap((addr), (size))
	207	extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
	208	extern void iounmap(volatile void __iomem *addr);
	209	extern void __iomem * reserve_phb_iospace(unsigned long size);
	210
	211	/**
	212	* virt_to_phys - map virtual addresses to physical
	213	* @address: address to remap
	214	*
	215	* The returned physical address is the physical (CPU) mapping for
	216	* the memory address given. It is only valid to use this function on
	217	* addresses directly mapped or allocated via kmalloc.
	218	*
	219	* This function does not give bus mappings for DMA transfers. In
	220	* almost all conceivable cases a device driver should not be using
	221	* this function
	222	*/
	223	static inline unsigned long virt_to_phys(volatile void * address)
	224	{
	225	return __pa((unsigned long)address);
	226	}
	227
	228	/**
	229	* phys_to_virt - map physical address to virtual
	230	* @address: address to remap
	231	*
	232	* The returned virtual address is a current CPU mapping for
	233	* the memory address given. It is only valid to use this function on
	234	* addresses that have a kernel mapping
	235	*
	236	* This function does not handle bus mappings for DMA transfers. In
	237	* almost all conceivable cases a device driver should not be using
	238	* this function
	239	*/
	240	static inline void * phys_to_virt(unsigned long address)
	241	{
	242	return (void *)__va(address);
	243	}
	244
	245	/*
	246	* Change "struct page" to physical address.
	247	*/
	248	#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
	249
	250	/* We do NOT want virtual merging, it would put too much pressure on
	251	* our iommu allocator. Instead, we want drivers to be smart enough
252	* to coalesce sglists that happen to have been mapped in a contiguous
253	* way by the iommu
254	*/
255	#define BIO_VMERGE_BOUNDARY 0
256
1da177e4 LT	257	static inline void iosync(void)
	258	{
	259	__asm__ __volatile__ ("sync" : : : "memory");
	260	}
	261
	262	/* Enforce in-order execution of data I/O.
	263	* No distinction between read/write on PPC; use eieio for all three.
	264	*/
	265	#define iobarrier_rw() eieio()
	266	#define iobarrier_r() eieio()
	267	#define iobarrier_w() eieio()
	268
	269	/*
	270	* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
	271	* These routines do not perform EEH-related I/O address translation,
	272	* and should not be used directly by device drivers. Use inb/readb
	273	* instead.
	274	*/
caf81329	275	static inline int __in_8(const volatile unsigned char __iomem *addr)
1da177e4 LT	276	{
	277	int ret;
	278
f007cacf	279	__asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
1da177e4 LT	280	: "=r" (ret) : "m" (*addr));
	281	return ret;
	282	}
	283
caf81329	284	static inline void __out_8(volatile unsigned char __iomem *addr, int val)
1da177e4	285	{
f007cacf	286	__asm__ __volatile__("sync; stb%U0%X0 %1,%0"
1da177e4	287	: "=m" (*addr) : "r" (val));
f007cacf	288	get_paca()->io_sync = 1;
1da177e4 LT	289	}
1da177e4 LT	290
caf81329	291	static inline int __in_le16(const volatile unsigned short __iomem *addr)
1da177e4 LT	292	{
	293	int ret;
	294
f007cacf	295	__asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync"
1da177e4 LT	296	: "=r" (ret) : "r" (addr), "m" (*addr));
	297	return ret;
	298	}
	299
caf81329	300	static inline int __in_be16(const volatile unsigned short __iomem *addr)
1da177e4 LT	301	{
	302	int ret;
	303
f007cacf	304	__asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
1da177e4 LT	305	: "=r" (ret) : "m" (*addr));
	306	return ret;
	307	}
	308
caf81329	309	static inline void __out_le16(volatile unsigned short __iomem *addr, int val)
1da177e4	310	{
f007cacf	311	__asm__ __volatile__("sync; sthbrx %1,0,%2"
1da177e4	312	: "=m" (*addr) : "r" (val), "r" (addr));
f007cacf	313	get_paca()->io_sync = 1;
1da177e4 LT	314	}
1da177e4 LT	315
caf81329	316	static inline void __out_be16(volatile unsigned short __iomem *addr, int val)
1da177e4	317	{
f007cacf	318	__asm__ __volatile__("sync; sth%U0%X0 %1,%0"
1da177e4	319	: "=m" (*addr) : "r" (val));
f007cacf	320	get_paca()->io_sync = 1;
1da177e4 LT	321	}
1da177e4 LT	322
caf81329	323	static inline unsigned __in_le32(const volatile unsigned __iomem *addr)
1da177e4 LT	324	{
	325	unsigned ret;
	326
f007cacf	327	__asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync"
1da177e4 LT	328	: "=r" (ret) : "r" (addr), "m" (*addr));
	329	return ret;
	330	}
	331
caf81329	332	static inline unsigned __in_be32(const volatile unsigned __iomem *addr)
1da177e4 LT	333	{
	334	unsigned ret;
	335
f007cacf	336	__asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
1da177e4 LT	337	: "=r" (ret) : "m" (*addr));
	338	return ret;
	339	}
	340
caf81329	341	static inline void __out_le32(volatile unsigned __iomem *addr, int val)
1da177e4	342	{
f007cacf	343	__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr)
1da177e4	344	: "r" (val), "r" (addr));
f007cacf	345	get_paca()->io_sync = 1;
1da177e4 LT	346	}
1da177e4 LT	347
caf81329	348	static inline void __out_be32(volatile unsigned __iomem *addr, int val)
1da177e4	349	{
f007cacf	350	__asm__ __volatile__("sync; stw%U0%X0 %1,%0"
1da177e4	351	: "=m" (*addr) : "r" (val));
f007cacf	352	get_paca()->io_sync = 1;
1da177e4 LT	353	}
1da177e4 LT	354
caf81329	355	static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr)
1da177e4 LT	356	{
	357	unsigned long tmp, ret;
	358
	359	__asm__ __volatile__(
f007cacf	360	"sync\n"
1da177e4 LT	361	"ld %1,0(%2)\n"
	362	"twi 0,%1,0\n"
	363	"isync\n"
	364	"rldimi %0,%1,58,18\n"
	365	"rldimi %0,%1,38,28\n"
	366	"rldimi %0,%1,18,38\n"
	367	"rldimi %0,%1,78,48\n"
	368	"rldicl %1,%1,32,0\n"
	369	"rlwimi %0,%1,8,8,31\n"
	370	"rlwimi %0,%1,24,16,23\n"
	371	: "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
	372	return ret;
	373	}
	374
caf81329	375	static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr)
1da177e4 LT	376	{
	377	unsigned long ret;
	378
f007cacf	379	__asm__ __volatile__("sync; ld%U1%X1 %0,%1; twi 0,%0,0; isync"
1da177e4 LT	380	: "=r" (ret) : "m" (*addr));
	381	return ret;
	382	}
	383
caf81329	384	static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val)
1da177e4 LT	385	{
	386	unsigned long tmp;
	387
	388	__asm__ __volatile__(
	389	"rldimi %0,%1,58,18\n"
	390	"rldimi %0,%1,38,28\n"
	391	"rldimi %0,%1,18,38\n"
	392	"rldimi %0,%1,78,48\n"
	393	"rldicl %1,%1,32,0\n"
	394	"rlwimi %0,%1,8,8,31\n"
	395	"rlwimi %0,%1,24,16,23\n"
f007cacf PM	396	"sync\n"
f007cacf PM	397	"std %0,0(%3)"
1da177e4	398	: "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
f007cacf	399	get_paca()->io_sync = 1;
1da177e4 LT	400	}
1da177e4 LT	401
caf81329	402	static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val)
1da177e4	403	{
f007cacf PM	404	__asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
f007cacf PM	405	get_paca()->io_sync = 1;
1da177e4 LT	406	}
1da177e4 LT	407
1da177e4	408	#include <asm/eeh.h>
1da177e4	409
1da177e4 LT	410	/* Nothing to do */
	411
	412	#define dma_cache_inv(_start,_size) do { } while (0)
	413	#define dma_cache_wback(_start,_size) do { } while (0)
	414	#define dma_cache_wback_inv(_start,_size) do { } while (0)
	415
1da177e4 LT	416
	417	/*
	418	* Convert a physical pointer to a virtual kernel pointer for /dev/mem
	419	* access
	420	*/
	421	#define xlate_dev_mem_ptr(p) __va(p)
	422
	423	/*
	424	* Convert a virtual cached pointer to an uncached pointer
	425	*/
	426	#define xlate_dev_kmem_ptr(p) p
	427
	428	#endif /* __KERNEL__ */
	429
047ea784 PM	430	#endif /* CONFIG_PPC64 */
047ea784 PM	431	#endif /* _ASM_POWERPC_IO_H */