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4068d93c KM |
1 | /* |
2 | * include/asm-parisc/prefetch.h | |
3 | * | |
4 | * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book. | |
5 | * In addition, many implementations do hardware prefetching of both | |
6 | * instructions and data. | |
7 | * | |
8 | * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load | |
9 | * to gr0 but not in a way that Linux can use. If the load would cause an | |
10 | * interruption (eg due to prefetching 0), it is suppressed on PA2.0 | |
11 | * processors, but not on 7300LC. | |
12 | * | |
13 | */ | |
14 | ||
15 | #ifndef __ASM_PARISC_PREFETCH_H | |
16 | #define __ASM_PARISC_PREFETCH_H | |
17 | ||
18 | #ifndef __ASSEMBLY__ | |
19 | #ifdef CONFIG_PREFETCH | |
20 | ||
21 | #define ARCH_HAS_PREFETCH | |
22 | extern inline void prefetch(const void *addr) | |
23 | { | |
24 | __asm__("ldw 0(%0), %%r0" : : "r" (addr)); | |
25 | } | |
26 | ||
32104b29 KM |
27 | /* LDD is a PA2.0 addition. */ |
28 | #ifdef CONFIG_PA20 | |
4068d93c KM |
29 | #define ARCH_HAS_PREFETCHW |
30 | extern inline void prefetchw(const void *addr) | |
31 | { | |
32 | __asm__("ldd 0(%0), %%r0" : : "r" (addr)); | |
33 | } | |
32104b29 | 34 | #endif /* CONFIG_PA20 */ |
4068d93c KM |
35 | |
36 | #endif /* CONFIG_PREFETCH */ | |
37 | #endif /* __ASSEMBLY__ */ | |
38 | ||
39 | #endif /* __ASM_PARISC_PROCESSOR_H */ |