[linux-2.6-block.git] / include / asm-mips / serial.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1999 by Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#ifndef _ASM_SERIAL_H
#define _ASM_SERIAL_H


/*
 * This assumes you have a 1.8432 MHz clock for your UART.
 *
 * It'd be nice if someone built a serial card with a 24.576 MHz
 * clock, since the 16550A is capable of handling a top speed of 1.5
 * megabits/second; but this requires the faster clock.
 */
#define BASE_BAUD (1843200 / 16)

/* Standard COM flags (except for COM4, because of the 8514 problem) */
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
#else
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
#endif

#ifdef CONFIG_MACH_JAZZ
#include <asm/jazz.h>

#ifndef CONFIG_OLIVETTI_M700
   /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
      exactly which ones ... XXX */
#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
#else
/* but the M700 isn't such a strange beast */
#define JAZZ_BASE_BAUD BASE_BAUD
#endif

#define _JAZZ_SERIAL_INIT(int, base)					\
	{ .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,	\
	  .iomem_base = (u8 *) base, .iomem_reg_shift = 0,			\
	  .io_type = SERIAL_IO_MEM }
#define JAZZ_SERIAL_PORT_DEFNS						\
	_JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE),		\
	_JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
#else
#define JAZZ_SERIAL_PORT_DEFNS
#endif

#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
#define STD_SERIAL_PORT_DEFNS			\
	/* UART CLK   PORT IRQ     FLAGS        */			\
	{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },	/* ttyS0 */	\
	{ 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS },	/* ttyS1 */	\
	{ 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },	/* ttyS2 */	\
	{ 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS },	/* ttyS3 */

#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
#define STD_SERIAL_PORT_DEFNS
#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */

#ifdef CONFIG_MOMENCO_OCELOT_3
#define OCELOT_3_BASE_BAUD	( 20000000 / 16 )
#define OCELOT_3_SERIAL_IRQ	6
#define OCELOT_3_SERIAL_BASE	(signed)0xfd000020

#define _OCELOT_3_SERIAL_INIT(int, base)				\
	{ .baud_base = OCELOT_3_BASE_BAUD, irq: int, 			\
	  .flags = STD_COM_FLAGS,						\
	  .iomem_base = (u8 *) base, iomem_reg_shift: 2,			\
	  io_type: SERIAL_IO_MEM }

#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS				\
	_OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
#else
#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
#endif

#ifdef CONFIG_MOMENCO_OCELOT
/* Ordinary NS16552 duart with a 20MHz crystal.  */
#define OCELOT_BASE_BAUD ( 20000000 / 16 )

#define OCELOT_SERIAL1_IRQ	4
#define OCELOT_SERIAL1_BASE	0xe0001020

#define _OCELOT_SERIAL_INIT(int, base)					\
	{ .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,	\
	  .iomem_base = (u8 *) base, .iomem_reg_shift = 2,			\
	  .io_type = SERIAL_IO_MEM }
#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS				\
	_OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
#else
#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
#endif

#ifdef CONFIG_DDB5477
#include <asm/ddb5xxx/ddb5477.h>
#define DDB5477_SERIAL_PORT_DEFNS                                       \
        { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, 		\
	  .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, 	\
	  .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},		\
        { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, 		\
	  .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, 	\
	  .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
#else
#define DDB5477_SERIAL_PORT_DEFNS
#endif

#ifdef CONFIG_SGI_IP32
/*
 * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
 * They are initialized in ip32_setup
 */
#define IP32_SERIAL_PORT_DEFNS				\
        {},{},
#else
#define IP32_SERIAL_PORT_DEFNS
#endif /* CONFIG_SGI_IP32 */

#define SERIAL_PORT_DFNS				\
	DDB5477_SERIAL_PORT_DEFNS			\
	IP32_SERIAL_PORT_DEFNS                          \
	JAZZ_SERIAL_PORT_DEFNS				\
	STD_SERIAL_PORT_DEFNS				\
	MOMENCO_OCELOT_SERIAL_PORT_DEFNS		\
	MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS

#endif /* _ASM_SERIAL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1999 by Ralf Baechle
	7	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	8	*/
	9	#ifndef _ASM_SERIAL_H
	10	#define _ASM_SERIAL_H
	11
1da177e4 LT	12
	13	/*
	14	* This assumes you have a 1.8432 MHz clock for your UART.
	15	*
	16	* It'd be nice if someone built a serial card with a 24.576 MHz
	17	* clock, since the 16550A is capable of handling a top speed of 1.5
	18	* megabits/second; but this requires the faster clock.
	19	*/
	20	#define BASE_BAUD (1843200 / 16)
	21
	22	/* Standard COM flags (except for COM4, because of the 8514 problem) */
	23	#ifdef CONFIG_SERIAL_DETECT_IRQ
	24	#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF \| ASYNC_SKIP_TEST \| ASYNC_AUTO_IRQ)
	25	#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF \| ASYNC_AUTO_IRQ)
	26	#else
	27	#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF \| ASYNC_SKIP_TEST)
	28	#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
	29	#endif
	30
1da177e4 LT	31	#ifdef CONFIG_MACH_JAZZ
	32	#include <asm/jazz.h>
	33
	34	#ifndef CONFIG_OLIVETTI_M700
	35	/* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
	36	exactly which ones ... XXX */
	37	#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
	38	#else
	39	/* but the M700 isn't such a strange beast */
	40	#define JAZZ_BASE_BAUD BASE_BAUD
	41	#endif
	42
	43	#define _JAZZ_SERIAL_INIT(int, base) \
	44	{ .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
	45	.iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
	46	.io_type = SERIAL_IO_MEM }
	47	#define JAZZ_SERIAL_PORT_DEFNS \
	48	_JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
	49	_JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
	50	#else
	51	#define JAZZ_SERIAL_PORT_DEFNS
	52	#endif
	53
1da177e4 LT	54	#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
	55	#define STD_SERIAL_PORT_DEFNS \
	56	/* UART CLK PORT IRQ FLAGS */ \
	57	{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
	58	{ 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
	59	{ 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
	60	{ 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
	61
1da177e4 LT	62	#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
1da177e4 LT	63	#define STD_SERIAL_PORT_DEFNS
1da177e4 LT	64	#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
1da177e4 LT	65
1da177e4 LT	66	#ifdef CONFIG_MOMENCO_OCELOT_3
	67	#define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
	68	#define OCELOT_3_SERIAL_IRQ 6
	69	#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
	70
	71	#define _OCELOT_3_SERIAL_INIT(int, base) \
0f04afb5 RB	72	{ .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
	73	.flags = STD_COM_FLAGS, \
	74	.iomem_base = (u8 *) base, iomem_reg_shift: 2, \
1da177e4 LT	75	io_type: SERIAL_IO_MEM }
	76
	77	#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
	78	_OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
	79	#else
	80	#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
	81	#endif
	82
	83	#ifdef CONFIG_MOMENCO_OCELOT
	84	/* Ordinary NS16552 duart with a 20MHz crystal. */
	85	#define OCELOT_BASE_BAUD ( 20000000 / 16 )
	86
	87	#define OCELOT_SERIAL1_IRQ 4
	88	#define OCELOT_SERIAL1_BASE 0xe0001020
	89
	90	#define _OCELOT_SERIAL_INIT(int, base) \
	91	{ .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
	92	.iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
	93	.io_type = SERIAL_IO_MEM }
	94	#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
	95	_OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
	96	#else
	97	#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
	98	#endif
	99
1da177e4 LT	100	#ifdef CONFIG_DDB5477
	101	#include <asm/ddb5xxx/ddb5477.h>
	102	#define DDB5477_SERIAL_PORT_DEFNS \
	103	{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
	104	.flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
	105	.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
	106	{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
	107	.flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
	108	.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
	109	#else
	110	#define DDB5477_SERIAL_PORT_DEFNS
	111	#endif
	112
	113	#ifdef CONFIG_SGI_IP32
	114	/*
	115	* The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
	116	* They are initialized in ip32_setup
	117	*/
	118	#define IP32_SERIAL_PORT_DEFNS \
	119	{},{},
	120	#else
	121	#define IP32_SERIAL_PORT_DEFNS
	122	#endif /* CONFIG_SGI_IP32 */
	123
	124	#define SERIAL_PORT_DFNS \
1da177e4	125	DDB5477_SERIAL_PORT_DEFNS \
1da177e4	126	IP32_SERIAL_PORT_DEFNS \
1da177e4 LT	127	JAZZ_SERIAL_PORT_DEFNS \
1da177e4 LT	128	STD_SERIAL_PORT_DEFNS \
1da177e4	129	MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
335bd9df	130	MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
1da177e4 LT	131
1da177e4 LT	132	#endif /* _ASM_SERIAL_H */