[linux-2.6-block.git] / include / asm-mips / processor.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 Waldorf GMBH
 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
 * Copyright (C) 1996 Paul M. Antoine
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#ifndef _ASM_PROCESSOR_H
#define _ASM_PROCESSOR_H

#include <linux/config.h>
#include <linux/cpumask.h>
#include <linux/threads.h>

#include <asm/cachectl.h>
#include <asm/cpu.h>
#include <asm/cpu-info.h>
#include <asm/mipsregs.h>
#include <asm/prefetch.h>
#include <asm/system.h>

/*
 * Return current * instruction pointer ("program counter").
 */
#define current_text_addr() ({ __label__ _l; _l: &&_l;})

/*
 * System setup and hardware flags..
 */
extern void (*cpu_wait)(void);

extern unsigned int vced_count, vcei_count;

#ifdef CONFIG_32BIT
/*
 * User space process size: 2GB. This is hardcoded into a few places,
 * so don't change it unless you know what you are doing.
 */
#define TASK_SIZE	0x7fff8000UL

/*
 * This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
 */
#define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 3))
#endif

#ifdef CONFIG_64BIT
/*
 * User space process size: 1TB. This is hardcoded into a few places,
 * so don't change it unless you know what you are doing.  TASK_SIZE
 * is limited to 1TB by the R4000 architecture; R10000 and better can
 * support 16TB; the architectural reserve for future expansion is
 * 8192EB ...
 */
#define TASK_SIZE32	0x7fff8000UL
#define TASK_SIZE	0x10000000000UL

/*
 * This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
 */
#define TASK_UNMAPPED_BASE	((current->thread.mflags & MF_32BIT_ADDR) ? \
	PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
#endif

#define NUM_FPU_REGS	32

typedef __u64 fpureg_t;

struct mips_fpu_hard_struct {
	fpureg_t	fpr[NUM_FPU_REGS];
	unsigned int	fcr31;
};

/*
 * It would be nice to add some more fields for emulator statistics, but there
 * are a number of fixed offsets in offset.h and elsewhere that would have to
 * be recalculated by hand.  So the additional information will be private to
 * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
 */

struct mips_fpu_soft_struct {
	fpureg_t	fpr[NUM_FPU_REGS];
	unsigned int	fcr31;
};

union mips_fpu_union {
        struct mips_fpu_hard_struct hard;
        struct mips_fpu_soft_struct soft;
};

#define INIT_FPU { \
	{{0,},} \
}

#define NUM_DSP_REGS   6

typedef __u32 dspreg_t;

struct mips_dsp_state {
	dspreg_t        dspr[NUM_DSP_REGS];
	unsigned int    dspcontrol;
};

#define INIT_DSP {{0,},}

#define INIT_CPUMASK { \
	{0,} \
}

typedef struct {
	unsigned long seg;
} mm_segment_t;

#define ARCH_MIN_TASKALIGN	8

struct mips_abi;

/*
 * If you change thread_struct remember to change the #defines below too!
 */
struct thread_struct {
	/* Saved main processor registers. */
	unsigned long reg16;
	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
	unsigned long reg29, reg30, reg31;

	/* Saved cp0 stuff. */
	unsigned long cp0_status;

	/* Saved fpu/fpu emulator stuff. */
	union mips_fpu_union fpu;

	/* Saved state of the DSP ASE, if available. */
	struct mips_dsp_state dsp;

	/* Other stuff associated with the thread. */
	unsigned long cp0_badvaddr;	/* Last user fault */
	unsigned long cp0_baduaddr;	/* Last kernel fault accessing USEG */
	unsigned long error_code;
	unsigned long trap_no;
#define MF_FIXADE	1		/* Fix address errors in software */
#define MF_LOGADE	2		/* Log address errors to syslog */
#define MF_32BIT_REGS	4		/* also implies 16/32 fprs */
#define MF_32BIT_ADDR	8		/* 32-bit address space (o32/n32) */
#define MF_FPUBOUND	0x10		/* thread bound to FPU-full CPU set */
	unsigned long mflags;
	unsigned long irix_trampoline;  /* Wheee... */
	unsigned long irix_oldctx;
	struct mips_abi *abi;
};

#define MF_ABI_MASK	(MF_32BIT_REGS | MF_32BIT_ADDR)
#define MF_O32		(MF_32BIT_REGS | MF_32BIT_ADDR)
#define MF_N32		MF_32BIT_ADDR
#define MF_N64		0

#define INIT_THREAD  { \
        /* \
         * saved main processor registers \
         */ \
	0, 0, 0, 0, 0, 0, 0, 0, \
	               0, 0, 0, \
	/* \
	 * saved cp0 stuff \
	 */ \
	0, \
	/* \
	 * saved fpu/fpu emulator stuff \
	 */ \
	INIT_FPU, \
	/* \
	 * saved dsp/dsp emulator stuff \
	 */ \
	INIT_DSP, \
	/* \
	 * Other stuff associated with the process \
	 */ \
	0, 0, 0, 0, \
	/* \
	 * For now the default is to fix address errors \
	 */ \
	MF_FIXADE, 0, 0 \
}

struct task_struct;

/* Free all resources held by a thread. */
#define release_thread(thread) do { } while(0)

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

extern unsigned long thread_saved_pc(struct task_struct *tsk);

/*
 * Do necessary setup to start up a newly executed thread.
 */
extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);

unsigned long get_wchan(struct task_struct *p);

#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)

#define cpu_relax()	barrier()

/*
 * Return_address is a replacement for __builtin_return_address(count)
 * which on certain architectures cannot reasonably be implemented in GCC
 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
 * Note that __builtin_return_address(x>=1) is forbidden because GCC
 * aborts compilation on some CPUs.  It's simply not possible to unwind
 * some CPU's stackframes.
 *
 * __builtin_return_address works only for non-leaf functions.  We avoid the
 * overhead of a function call by forcing the compiler to save the return
 * address register on the stack.
 */
#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})

#ifdef CONFIG_CPU_HAS_PREFETCH

#define ARCH_HAS_PREFETCH

extern inline void prefetch(const void *addr)
{
	__asm__ __volatile__(
	"	.set	mips4		\n"
	"	pref	%0, (%1)	\n"
	"	.set	mips0		\n"
	:
	: "i" (Pref_Load), "r" (addr));
}

#endif

#endif /* _ASM_PROCESSOR_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 Waldorf GMBH
	7	* Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
	8	* Copyright (C) 1996 Paul M. Antoine
	9	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	10	*/
	11	#ifndef _ASM_PROCESSOR_H
	12	#define _ASM_PROCESSOR_H
	13
	14	#include <linux/config.h>
41c594ab	15	#include <linux/cpumask.h>
1da177e4 LT	16	#include <linux/threads.h>
	17
	18	#include <asm/cachectl.h>
	19	#include <asm/cpu.h>
	20	#include <asm/cpu-info.h>
	21	#include <asm/mipsregs.h>
	22	#include <asm/prefetch.h>
	23	#include <asm/system.h>
	24
	25	/*
	26	* Return current * instruction pointer ("program counter").
	27	*/
	28	#define current_text_addr() ({ __label__ _l; _l: &&_l;})
	29
	30	/*
	31	* System setup and hardware flags..
	32	*/
	33	extern void (*cpu_wait)(void);
	34
	35	extern unsigned int vced_count, vcei_count;
	36
875d43e7	37	#ifdef CONFIG_32BIT
1da177e4 LT	38	/*
	39	* User space process size: 2GB. This is hardcoded into a few places,
	40	* so don't change it unless you know what you are doing.
	41	*/
	42	#define TASK_SIZE 0x7fff8000UL
	43
	44	/*
	45	* This decides where the kernel will search for a free chunk of vm
	46	* space during mmap's.
	47	*/
	48	#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
	49	#endif
	50
875d43e7	51	#ifdef CONFIG_64BIT
1da177e4 LT	52	/*
	53	* User space process size: 1TB. This is hardcoded into a few places,
	54	* so don't change it unless you know what you are doing. TASK_SIZE
	55	* is limited to 1TB by the R4000 architecture; R10000 and better can
	56	* support 16TB; the architectural reserve for future expansion is
	57	* 8192EB ...
	58	*/
	59	#define TASK_SIZE32 0x7fff8000UL
	60	#define TASK_SIZE 0x10000000000UL
	61
	62	/*
	63	* This decides where the kernel will search for a free chunk of vm
	64	* space during mmap's.
	65	*/
	66	#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
	67	PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
	68	#endif
	69
	70	#define NUM_FPU_REGS 32
	71
	72	typedef __u64 fpureg_t;
	73
	74	struct mips_fpu_hard_struct {
	75	fpureg_t fpr[NUM_FPU_REGS];
	76	unsigned int fcr31;
	77	};
	78
	79	/*
	80	* It would be nice to add some more fields for emulator statistics, but there
	81	* are a number of fixed offsets in offset.h and elsewhere that would have to
	82	* be recalculated by hand. So the additional information will be private to
	83	* the FPU emulator for now. See asm-mips/fpu_emulator.h.
	84	*/
	85
	86	struct mips_fpu_soft_struct {
	87	fpureg_t fpr[NUM_FPU_REGS];
	88	unsigned int fcr31;
	89	};
	90
	91	union mips_fpu_union {
	92	struct mips_fpu_hard_struct hard;
	93	struct mips_fpu_soft_struct soft;
	94	};
	95
	96	#define INIT_FPU { \
	97	{{0,},} \
	98	}
	99
e50c0a8f RB	100	#define NUM_DSP_REGS 6
	101
	102	typedef __u32 dspreg_t;
	103
	104	struct mips_dsp_state {
	105	dspreg_t dspr[NUM_DSP_REGS];
	106	unsigned int dspcontrol;
e50c0a8f RB	107	};
	108
	109	#define INIT_DSP {{0,},}
	110
41c594ab RB	111	#define INIT_CPUMASK { \
	112	{0,} \
	113	}
	114
1da177e4 LT	115	typedef struct {
	116	unsigned long seg;
	117	} mm_segment_t;
	118
	119	#define ARCH_MIN_TASKALIGN 8
	120
e50c0a8f RB	121	struct mips_abi;
e50c0a8f RB	122
1da177e4 LT	123	/*
	124	* If you change thread_struct remember to change the #defines below too!
	125	*/
	126	struct thread_struct {
	127	/* Saved main processor registers. */
	128	unsigned long reg16;
	129	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
	130	unsigned long reg29, reg30, reg31;
	131
	132	/* Saved cp0 stuff. */
	133	unsigned long cp0_status;
	134
	135	/* Saved fpu/fpu emulator stuff. */
	136	union mips_fpu_union fpu;
	137
e50c0a8f RB	138	/* Saved state of the DSP ASE, if available. */
	139	struct mips_dsp_state dsp;
	140
1da177e4 LT	141	/* Other stuff associated with the thread. */
	142	unsigned long cp0_badvaddr; /* Last user fault */
	143	unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
	144	unsigned long error_code;
	145	unsigned long trap_no;
	146	#define MF_FIXADE 1 /* Fix address errors in software */
	147	#define MF_LOGADE 2 /* Log address errors to syslog */
	148	#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
	149	#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
41c594ab	150	#define MF_FPUBOUND 0x10 /* thread bound to FPU-full CPU set */
1da177e4 LT	151	unsigned long mflags;
	152	unsigned long irix_trampoline; /* Wheee... */
	153	unsigned long irix_oldctx;
e50c0a8f	154	struct mips_abi *abi;
1da177e4 LT	155	};
	156
	157	#define MF_ABI_MASK (MF_32BIT_REGS \| MF_32BIT_ADDR)
	158	#define MF_O32 (MF_32BIT_REGS \| MF_32BIT_ADDR)
	159	#define MF_N32 MF_32BIT_ADDR
	160	#define MF_N64 0
	161
	162	#define INIT_THREAD { \
	163	/* \
	164	* saved main processor registers \
	165	*/ \
	166	0, 0, 0, 0, 0, 0, 0, 0, \
	167	0, 0, 0, \
	168	/* \
	169	* saved cp0 stuff \
	170	*/ \
	171	0, \
	172	/* \
	173	* saved fpu/fpu emulator stuff \
	174	*/ \
	175	INIT_FPU, \
e50c0a8f RB	176	/* \
	177	* saved dsp/dsp emulator stuff \
	178	*/ \
	179	INIT_DSP, \
1da177e4 LT	180	/* \
	181	* Other stuff associated with the process \
	182	*/ \
	183	0, 0, 0, 0, \
	184	/* \
	185	* For now the default is to fix address errors \
	186	*/ \
	187	MF_FIXADE, 0, 0 \
	188	}
	189
	190	struct task_struct;
	191
	192	/* Free all resources held by a thread. */
	193	#define release_thread(thread) do { } while(0)
	194
	195	/* Prepare to copy thread state - unlazy all lazy status */
	196	#define prepare_to_copy(tsk) do { } while (0)
	197
	198	extern long kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
	199
	200	extern unsigned long thread_saved_pc(struct task_struct *tsk);
	201
	202	/*
	203	* Do necessary setup to start up a newly executed thread.
	204	*/
	205	extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
	206
	207	unsigned long get_wchan(struct task_struct *p);
	208
75bb07e7	209	#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
40bc9c67 AV	210	#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
	211	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
	212	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
	213	#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
1da177e4 LT	214
	215	#define cpu_relax() barrier()
	216
	217	/*
	218	* Return_address is a replacement for __builtin_return_address(count)
	219	* which on certain architectures cannot reasonably be implemented in GCC
	220	* (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
	221	* Note that __builtin_return_address(x>=1) is forbidden because GCC
	222	* aborts compilation on some CPUs. It's simply not possible to unwind
	223	* some CPU's stackframes.
	224	*
	225	* __builtin_return_address works only for non-leaf functions. We avoid the
	226	* overhead of a function call by forcing the compiler to save the return
	227	* address register on the stack.
	228	*/
	229	#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
	230
	231	#ifdef CONFIG_CPU_HAS_PREFETCH
	232
	233	#define ARCH_HAS_PREFETCH
	234
	235	extern inline void prefetch(const void *addr)
	236	{
	237	__asm__ __volatile__(
	238	" .set mips4 \n"
	239	" pref %0, (%1) \n"
	240	" .set mips0 \n"
	241	:
	242	: "i" (Pref_Load), "r" (addr));
	243	}
	244
	245	#endif
	246
	247	#endif /* _ASM_PROCESSOR_H */