projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #ifndef _M68K_BVME6000HW_H_ |
| 2 | #define _M68K_BVME6000HW_H_ | |
| 3 | ||
| 4 | #include <asm/irq.h> | |
| 5 | ||
| 6 | /* | |
| 7 | * PIT structure | |
| 8 | */ | |
| 9 | ||
| 10 | #define BVME_PIT_BASE 0xffa00000 | |
| 11 | ||
| 12 | typedef struct { | |
| 13 | unsigned char | |
| 14 | pad_a[3], pgcr, | |
| 15 | pad_b[3], psrr, | |
| 16 | pad_c[3], paddr, | |
| 17 | pad_d[3], pbddr, | |
| 18 | pad_e[3], pcddr, | |
| 19 | pad_f[3], pivr, | |
| 20 | pad_g[3], pacr, | |
| 21 | pad_h[3], pbcr, | |
| 22 | pad_i[3], padr, | |
| 23 | pad_j[3], pbdr, | |
| 24 | pad_k[3], paar, | |
| 25 | pad_l[3], pbar, | |
| 26 | pad_m[3], pcdr, | |
| 27 | pad_n[3], psr, | |
| 28 | pad_o[3], res1, | |
| 29 | pad_p[3], res2, | |
| 30 | pad_q[3], tcr, | |
| 31 | pad_r[3], tivr, | |
| 32 | pad_s[3], res3, | |
| 33 | pad_t[3], cprh, | |
| 34 | pad_u[3], cprm, | |
| 35 | pad_v[3], cprl, | |
| 36 | pad_w[3], res4, | |
| 37 | pad_x[3], crh, | |
| 38 | pad_y[3], crm, | |
| 39 | pad_z[3], crl, | |
| 40 | pad_A[3], tsr, | |
| 41 | pad_B[3], res5; | |
| 42 | } PitRegs_t, *PitRegsPtr; | |
| 43 | ||
| 44 | #define bvmepit ((*(volatile PitRegsPtr)(BVME_PIT_BASE))) | |
| 45 | ||
| 46 | #define BVME_RTC_BASE 0xff900000 | |
| 47 | ||
| 48 | typedef struct { | |
| 49 | unsigned char | |
| 50 | pad_a[3], msr, | |
| 51 | pad_b[3], t0cr_rtmr, | |
| 52 | pad_c[3], t1cr_omr, | |
| 53 | pad_d[3], pfr_icr0, | |
| 54 | pad_e[3], irr_icr1, | |
| 55 | pad_f[3], bcd_tenms, | |
| 56 | pad_g[3], bcd_sec, | |
| 57 | pad_h[3], bcd_min, | |
| 58 | pad_i[3], bcd_hr, | |
| 59 | pad_j[3], bcd_dom, | |
| 60 | pad_k[3], bcd_mth, | |
| 61 | pad_l[3], bcd_year, | |
| 62 | pad_m[3], bcd_ujcc, | |
| 63 | pad_n[3], bcd_hjcc, | |
| 64 | pad_o[3], bcd_dow, | |
| 65 | pad_p[3], t0lsb, | |
| 66 | pad_q[3], t0msb, | |
| 67 | pad_r[3], t1lsb, | |
| 68 | pad_s[3], t1msb, | |
| 69 | pad_t[3], cmp_sec, | |
| 70 | pad_u[3], cmp_min, | |
| 71 | pad_v[3], cmp_hr, | |
| 72 | pad_w[3], cmp_dom, | |
| 73 | pad_x[3], cmp_mth, | |
| 74 | pad_y[3], cmp_dow, | |
| 75 | pad_z[3], sav_sec, | |
| 76 | pad_A[3], sav_min, | |
| 77 | pad_B[3], sav_hr, | |
| 78 | pad_C[3], sav_dom, | |
| 79 | pad_D[3], sav_mth, | |
| 80 | pad_E[3], ram, | |
| 81 | pad_F[3], test; | |
| 82 | } RtcRegs_t, *RtcPtr_t; | |
| 83 | ||
| 84 | ||
| 85 | #define BVME_I596_BASE 0xff100000 | |
| 86 | ||
| 87 | #define BVME_ETHIRQ_REG 0xff20000b | |
| 88 | ||
| 89 | #define BVME_LOCAL_IRQ_STAT 0xff20000f | |
| 90 | ||
| 91 | #define BVME_ETHERR 0x02 | |
| 92 | #define BVME_ABORT_STATUS 0x08 | |
| 93 | ||
| 94 | #define BVME_NCR53C710_BASE 0xff000000 | |
| 95 | ||
| 96 | #define BVME_SCC_A_ADDR 0xffb0000b | |
| 97 | #define BVME_SCC_B_ADDR 0xffb00003 | |
| 98 | #define BVME_SCC_RTxC 7372800 | |
| 99 | ||
| 100 | #define BVME_CONFIG_REG 0xff500003 | |
| 101 | ||
| 102 | #define config_reg_ptr (volatile unsigned char *)BVME_CONFIG_REG | |
| 103 | ||
| 104 | #define BVME_CONFIG_SW1 0x08 | |
| 105 | #define BVME_CONFIG_SW2 0x04 | |
| 106 | #define BVME_CONFIG_SW3 0x02 | |
| 107 | #define BVME_CONFIG_SW4 0x01 | |
| 108 | ||
| 109 | ||
| 110 | #define BVME_IRQ_TYPE_PRIO 0 | |
| 111 | ||
| 200a3d35 RZ |
112 | #define BVME_IRQ_PRN (IRQ_USER+20) |
| 113 | #define BVME_IRQ_TIMER (IRQ_USER+25) | |
| 114 | #define BVME_IRQ_I596 IRQ_AUTO_2 | |
| 115 | #define BVME_IRQ_SCSI IRQ_AUTO_3 | |
| 116 | #define BVME_IRQ_RTC IRQ_AUTO_6 | |
| 117 | #define BVME_IRQ_ABORT IRQ_AUTO_7 | |
| 1da177e4 LT |
118 | |
| 119 | /* SCC interrupts */ | |
| 200a3d35 RZ |
120 | #define BVME_IRQ_SCC_BASE IRQ_USER |
| 121 | #define BVME_IRQ_SCCB_TX IRQ_USER | |
| 122 | #define BVME_IRQ_SCCB_STAT (IRQ_USER+2) | |
| 123 | #define BVME_IRQ_SCCB_RX (IRQ_USER+4) | |
| 124 | #define BVME_IRQ_SCCB_SPCOND (IRQ_USER+6) | |
| 125 | #define BVME_IRQ_SCCA_TX (IRQ_USER+8) | |
| 126 | #define BVME_IRQ_SCCA_STAT (IRQ_USER+10) | |
| 127 | #define BVME_IRQ_SCCA_RX (IRQ_USER+12) | |
| 128 | #define BVME_IRQ_SCCA_SPCOND (IRQ_USER+14) | |
| 1da177e4 LT |
129 | |
| 130 | /* Address control registers */ | |
| 131 | ||
| 132 | #define BVME_ACR_A32VBA 0xff400003 | |
| 133 | #define BVME_ACR_A32MSK 0xff410003 | |
| 134 | #define BVME_ACR_A24VBA 0xff420003 | |
| 135 | #define BVME_ACR_A24MSK 0xff430003 | |
| 136 | #define BVME_ACR_A16VBA 0xff440003 | |
| 137 | #define BVME_ACR_A32LBA 0xff450003 | |
| 138 | #define BVME_ACR_A24LBA 0xff460003 | |
| 139 | #define BVME_ACR_ADDRCTL 0xff470003 | |
| 140 | ||
| 141 | #define bvme_acr_a32vba *(volatile unsigned char *)BVME_ACR_A32VBA | |
| 142 | #define bvme_acr_a32msk *(volatile unsigned char *)BVME_ACR_A32MSK | |
| 143 | #define bvme_acr_a24vba *(volatile unsigned char *)BVME_ACR_A24VBA | |
| 144 | #define bvme_acr_a24msk *(volatile unsigned char *)BVME_ACR_A24MSK | |
| 145 | #define bvme_acr_a16vba *(volatile unsigned char *)BVME_ACR_A16VBA | |
| 146 | #define bvme_acr_a32lba *(volatile unsigned char *)BVME_ACR_A32LBA | |
| 147 | #define bvme_acr_a24lba *(volatile unsigned char *)BVME_ACR_A24LBA | |
| 148 | #define bvme_acr_addrctl *(volatile unsigned char *)BVME_ACR_ADDRCTL | |
| 149 | ||
| 150 | #endif |