Merge branch 'master' into 83xx
[linux-block.git] / include / asm-ia64 / sn / sn_sal.h
CommitLineData
1da177e4
LT
1#ifndef _ASM_IA64_SN_SN_SAL_H
2#define _ASM_IA64_SN_SN_SAL_H
3
4/*
5 * System Abstraction Layer definitions for IA64
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
308a8782 11 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved.
1da177e4
LT
12 */
13
14
1da177e4
LT
15#include <asm/sal.h>
16#include <asm/sn/sn_cpuid.h>
17#include <asm/sn/arch.h>
18#include <asm/sn/geo.h>
19#include <asm/sn/nodepda.h>
20#include <asm/sn/shub_mmr.h>
21
22// SGI Specific Calls
23#define SN_SAL_POD_MODE 0x02000001
24#define SN_SAL_SYSTEM_RESET 0x02000002
25#define SN_SAL_PROBE 0x02000003
26#define SN_SAL_GET_MASTER_NASID 0x02000004
27#define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
28#define SN_SAL_LOG_CE 0x02000006
29#define SN_SAL_REGISTER_CE 0x02000007
30#define SN_SAL_GET_PARTITION_ADDR 0x02000009
31#define SN_SAL_XP_ADDR_REGION 0x0200000f
32#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
33#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
34#define SN_SAL_PRINT_ERROR 0x02000012
35#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
36#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
1da177e4 37#define SN_SAL_GET_SAPIC_INFO 0x0200001d
bf1cf98f 38#define SN_SAL_GET_SN_INFO 0x0200001e
1da177e4
LT
39#define SN_SAL_CONSOLE_PUTC 0x02000021
40#define SN_SAL_CONSOLE_GETC 0x02000022
41#define SN_SAL_CONSOLE_PUTS 0x02000023
42#define SN_SAL_CONSOLE_GETS 0x02000024
43#define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
44#define SN_SAL_CONSOLE_POLL 0x02000026
45#define SN_SAL_CONSOLE_INTR 0x02000027
46#define SN_SAL_CONSOLE_PUTB 0x02000028
47#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
48#define SN_SAL_CONSOLE_READC 0x0200002b
25732ad4 49#define SN_SAL_SYSCTL_OP 0x02000030
1da177e4
LT
50#define SN_SAL_SYSCTL_MODID_GET 0x02000031
51#define SN_SAL_SYSCTL_GET 0x02000032
52#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
53#define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
54#define SN_SAL_SYSCTL_SLAB_GET 0x02000036
55#define SN_SAL_BUS_CONFIG 0x02000037
56#define SN_SAL_SYS_SERIAL_GET 0x02000038
57#define SN_SAL_PARTITION_SERIAL_GET 0x02000039
771388dc 58#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
1da177e4
LT
59#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61#define SN_SAL_COHERENCE 0x0200003d
62#define SN_SAL_MEMPROTECT 0x0200003e
63#define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
64
65#define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
66#define SN_SAL_IROUTER_OP 0x02000043
67639deb 67#define SN_SAL_SYSCTL_EVENT 0x02000044
1da177e4
LT
68#define SN_SAL_IOIF_INTERRUPT 0x0200004a
69#define SN_SAL_HWPERF_OP 0x02000050 // lock
70#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
61b9cf7c 71#define SN_SAL_IOIF_PCI_SAFE 0x02000052
1da177e4
LT
72#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
73#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
74#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
75#define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
76#define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
6d6e4200
PB
77#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated
78#define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a
1da177e4 79
8ea6091f 80#define SN_SAL_IOIF_INIT 0x0200005f
1da177e4 81#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
93a07d0a 82#define SN_SAL_BTE_RECOVER 0x02000061
ecc3c30a
MG
83#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
84#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
1da177e4 85
a1cddb88
JS
86#define SN_SAL_GET_PROM_FEATURE_SET 0x02000065
87#define SN_SAL_SET_OS_FEATURE_SET 0x02000066
86db2f42 88#define SN_SAL_INJECT_ERROR 0x02000067
9d56d878 89#define SN_SAL_SET_CPU_NUMBER 0x02000068
a1cddb88 90
a7956113
ZN
91#define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069
92
1da177e4
LT
93/*
94 * Service-specific constants
95 */
96
97/* Console interrupt manipulation */
98 /* action codes */
99#define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */
100#define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */
101#define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */
102 /* interrupt specification & status return codes */
103#define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */
104#define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */
105
106/* interrupt handling */
107#define SAL_INTR_ALLOC 1
108#define SAL_INTR_FREE 2
109
25732ad4
BL
110/*
111 * operations available on the generic SN_SAL_SYSCTL_OP
112 * runtime service
113 */
114#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
115#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
116
1da177e4
LT
117/*
118 * IRouter (i.e. generalized system controller) operations
119 */
120#define SAL_IROUTER_OPEN 0 /* open a subchannel */
121#define SAL_IROUTER_CLOSE 1 /* close a subchannel */
122#define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */
123#define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */
124#define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for
125 * an open subchannel
126 */
127#define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */
128#define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */
129#define SAL_IROUTER_INIT 7 /* initialize IRouter driver */
130
131/* IRouter interrupt mask bits */
132#define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
133#define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
134
6872ec54
RA
135/*
136 * Error Handling Features
137 */
a1cddb88
JS
138#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete
139#define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete
6872ec54
RA
140#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
141#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
1da177e4
LT
142
143/*
144 * SAL Error Codes
145 */
146#define SALRET_MORE_PASSES 1
147#define SALRET_OK 0
148#define SALRET_NOT_IMPLEMENTED (-1)
149#define SALRET_INVALID_ARG (-2)
150#define SALRET_ERROR (-3)
151
71a5d027
JS
152#define SN_SAL_FAKE_PROM 0x02009999
153
1da177e4 154/**
283c7f6a
PB
155 * sn_sal_revision - get the SGI SAL revision number
156 *
157 * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor).
158 * This routine simply extracts the major and minor values and
159 * presents them in a u32 format.
160 *
161 * For example, version 4.05 would be represented at 0x0405.
162 */
163static inline u32
164sn_sal_rev(void)
1da177e4 165{
b2c99e3c 166 struct ia64_sal_systab *systab = __va(efi.sal_systab);
1da177e4 167
283c7f6a 168 return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor);
1da177e4
LT
169}
170
1da177e4
LT
171/*
172 * Returns the master console nasid, if the call fails, return an illegal
173 * value.
174 */
175static inline u64
176ia64_sn_get_console_nasid(void)
177{
178 struct ia64_sal_retval ret_stuff;
179
180 ret_stuff.status = 0;
181 ret_stuff.v0 = 0;
182 ret_stuff.v1 = 0;
183 ret_stuff.v2 = 0;
184 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0);
185
186 if (ret_stuff.status < 0)
187 return ret_stuff.status;
188
189 /* Master console nasid is in 'v0' */
190 return ret_stuff.v0;
191}
192
193/*
194 * Returns the master baseio nasid, if the call fails, return an illegal
195 * value.
196 */
197static inline u64
198ia64_sn_get_master_baseio_nasid(void)
199{
200 struct ia64_sal_retval ret_stuff;
201
202 ret_stuff.status = 0;
203 ret_stuff.v0 = 0;
204 ret_stuff.v1 = 0;
205 ret_stuff.v2 = 0;
206 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0);
207
208 if (ret_stuff.status < 0)
209 return ret_stuff.status;
210
211 /* Master baseio nasid is in 'v0' */
212 return ret_stuff.v0;
213}
214
24ee0a6d 215static inline void *
1da177e4
LT
216ia64_sn_get_klconfig_addr(nasid_t nasid)
217{
218 struct ia64_sal_retval ret_stuff;
1da177e4 219
1da177e4
LT
220 ret_stuff.status = 0;
221 ret_stuff.v0 = 0;
222 ret_stuff.v1 = 0;
223 ret_stuff.v2 = 0;
224 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
1da177e4
LT
225 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
226}
227
228/*
229 * Returns the next console character.
230 */
231static inline u64
232ia64_sn_console_getc(int *ch)
233{
234 struct ia64_sal_retval ret_stuff;
235
236 ret_stuff.status = 0;
237 ret_stuff.v0 = 0;
238 ret_stuff.v1 = 0;
239 ret_stuff.v2 = 0;
240 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0);
241
242 /* character is in 'v0' */
243 *ch = (int)ret_stuff.v0;
244
245 return ret_stuff.status;
246}
247
248/*
249 * Read a character from the SAL console device, after a previous interrupt
250 * or poll operation has given us to know that a character is available
251 * to be read.
252 */
253static inline u64
254ia64_sn_console_readc(void)
255{
256 struct ia64_sal_retval ret_stuff;
257
258 ret_stuff.status = 0;
259 ret_stuff.v0 = 0;
260 ret_stuff.v1 = 0;
261 ret_stuff.v2 = 0;
262 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0);
263
264 /* character is in 'v0' */
265 return ret_stuff.v0;
266}
267
268/*
269 * Sends the given character to the console.
270 */
271static inline u64
272ia64_sn_console_putc(char ch)
273{
274 struct ia64_sal_retval ret_stuff;
275
276 ret_stuff.status = 0;
277 ret_stuff.v0 = 0;
278 ret_stuff.v1 = 0;
279 ret_stuff.v2 = 0;
53493dcf 280 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0);
1da177e4
LT
281
282 return ret_stuff.status;
283}
284
285/*
286 * Sends the given buffer to the console.
287 */
288static inline u64
289ia64_sn_console_putb(const char *buf, int len)
290{
291 struct ia64_sal_retval ret_stuff;
292
293 ret_stuff.status = 0;
294 ret_stuff.v0 = 0;
295 ret_stuff.v1 = 0;
296 ret_stuff.v2 = 0;
53493dcf 297 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0);
1da177e4
LT
298
299 if ( ret_stuff.status == 0 ) {
300 return ret_stuff.v0;
301 }
302 return (u64)0;
303}
304
305/*
306 * Print a platform error record
307 */
308static inline u64
309ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
310{
311 struct ia64_sal_retval ret_stuff;
312
313 ret_stuff.status = 0;
314 ret_stuff.v0 = 0;
315 ret_stuff.v1 = 0;
316 ret_stuff.v2 = 0;
53493dcf 317 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0);
1da177e4
LT
318
319 return ret_stuff.status;
320}
321
322/*
323 * Check for Platform errors
324 */
325static inline u64
326ia64_sn_plat_cpei_handler(void)
327{
328 struct ia64_sal_retval ret_stuff;
329
330 ret_stuff.status = 0;
331 ret_stuff.v0 = 0;
332 ret_stuff.v1 = 0;
333 ret_stuff.v2 = 0;
334 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0);
335
336 return ret_stuff.status;
337}
338
6872ec54 339/*
a1cddb88 340 * Set Error Handling Features (Obsolete)
6872ec54
RA
341 */
342static inline u64
343ia64_sn_plat_set_error_handling_features(void)
344{
345 struct ia64_sal_retval ret_stuff;
346
347 ret_stuff.status = 0;
348 ret_stuff.v0 = 0;
349 ret_stuff.v1 = 0;
350 ret_stuff.v2 = 0;
351 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
ea95972f 352 SAL_ERR_FEAT_LOG_SBES,
6872ec54
RA
353 0, 0, 0, 0, 0, 0);
354
355 return ret_stuff.status;
356}
357
1da177e4
LT
358/*
359 * Checks for console input.
360 */
361static inline u64
362ia64_sn_console_check(int *result)
363{
364 struct ia64_sal_retval ret_stuff;
365
366 ret_stuff.status = 0;
367 ret_stuff.v0 = 0;
368 ret_stuff.v1 = 0;
369 ret_stuff.v2 = 0;
370 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0);
371
372 /* result is in 'v0' */
373 *result = (int)ret_stuff.v0;
374
375 return ret_stuff.status;
376}
377
378/*
379 * Checks console interrupt status
380 */
381static inline u64
382ia64_sn_console_intr_status(void)
383{
384 struct ia64_sal_retval ret_stuff;
385
386 ret_stuff.status = 0;
387 ret_stuff.v0 = 0;
388 ret_stuff.v1 = 0;
389 ret_stuff.v2 = 0;
390 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
391 0, SAL_CONSOLE_INTR_STATUS,
392 0, 0, 0, 0, 0);
393
394 if (ret_stuff.status == 0) {
395 return ret_stuff.v0;
396 }
397
398 return 0;
399}
400
401/*
402 * Enable an interrupt on the SAL console device.
403 */
404static inline void
53493dcf 405ia64_sn_console_intr_enable(u64 intr)
1da177e4
LT
406{
407 struct ia64_sal_retval ret_stuff;
408
409 ret_stuff.status = 0;
410 ret_stuff.v0 = 0;
411 ret_stuff.v1 = 0;
412 ret_stuff.v2 = 0;
413 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
414 intr, SAL_CONSOLE_INTR_ON,
415 0, 0, 0, 0, 0);
416}
417
418/*
419 * Disable an interrupt on the SAL console device.
420 */
421static inline void
53493dcf 422ia64_sn_console_intr_disable(u64 intr)
1da177e4
LT
423{
424 struct ia64_sal_retval ret_stuff;
425
426 ret_stuff.status = 0;
427 ret_stuff.v0 = 0;
428 ret_stuff.v1 = 0;
429 ret_stuff.v2 = 0;
430 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
431 intr, SAL_CONSOLE_INTR_OFF,
432 0, 0, 0, 0, 0);
433}
434
435/*
436 * Sends a character buffer to the console asynchronously.
437 */
438static inline u64
439ia64_sn_console_xmit_chars(char *buf, int len)
440{
441 struct ia64_sal_retval ret_stuff;
442
443 ret_stuff.status = 0;
444 ret_stuff.v0 = 0;
445 ret_stuff.v1 = 0;
446 ret_stuff.v2 = 0;
447 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
53493dcf 448 (u64)buf, (u64)len,
1da177e4
LT
449 0, 0, 0, 0, 0);
450
451 if (ret_stuff.status == 0) {
452 return ret_stuff.v0;
453 }
454
455 return 0;
456}
457
458/*
459 * Returns the iobrick module Id
460 */
461static inline u64
462ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
463{
464 struct ia64_sal_retval ret_stuff;
465
466 ret_stuff.status = 0;
467 ret_stuff.v0 = 0;
468 ret_stuff.v1 = 0;
469 ret_stuff.v2 = 0;
470 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0);
471
472 /* result is in 'v0' */
473 *result = (int)ret_stuff.v0;
474
475 return ret_stuff.status;
476}
477
478/**
479 * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function
480 *
481 * SN_SAL_POD_MODE actually takes an argument, but it's always
482 * 0 when we call it from the kernel, so we don't have to expose
483 * it to the caller.
484 */
485static inline u64
486ia64_sn_pod_mode(void)
487{
488 struct ia64_sal_retval isrv;
8eac3757 489 SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
1da177e4
LT
490 if (isrv.status)
491 return 0;
492 return isrv.v0;
493}
494
495/**
496 * ia64_sn_probe_mem - read from memory safely
497 * @addr: address to probe
498 * @size: number bytes to read (1,2,4,8)
499 * @data_ptr: address to store value read by probe (-1 returned if probe fails)
500 *
501 * Call into the SAL to do a memory read. If the read generates a machine
502 * check, this routine will recover gracefully and return -1 to the caller.
503 * @addr is usually a kernel virtual address in uncached space (i.e. the
504 * address starts with 0xc), but if called in physical mode, @addr should
505 * be a physical address.
506 *
507 * Return values:
508 * 0 - probe successful
509 * 1 - probe failed (generated MCA)
510 * 2 - Bad arg
511 * <0 - PAL error
512 */
513static inline u64
514ia64_sn_probe_mem(long addr, long size, void *data_ptr)
515{
516 struct ia64_sal_retval isrv;
517
518 SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0);
519
520 if (data_ptr) {
521 switch (size) {
522 case 1:
523 *((u8*)data_ptr) = (u8)isrv.v0;
524 break;
525 case 2:
526 *((u16*)data_ptr) = (u16)isrv.v0;
527 break;
528 case 4:
529 *((u32*)data_ptr) = (u32)isrv.v0;
530 break;
531 case 8:
532 *((u64*)data_ptr) = (u64)isrv.v0;
533 break;
534 default:
535 isrv.status = 2;
536 }
537 }
538 return isrv.status;
539}
540
541/*
542 * Retrieve the system serial number as an ASCII string.
543 */
544static inline u64
545ia64_sn_sys_serial_get(char *buf)
546{
547 struct ia64_sal_retval ret_stuff;
548 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0);
549 return ret_stuff.status;
550}
551
552extern char sn_system_serial_number_string[];
553extern u64 sn_partition_serial_number;
554
555static inline char *
556sn_system_serial_number(void) {
557 if (sn_system_serial_number_string[0]) {
558 return(sn_system_serial_number_string);
559 } else {
560 ia64_sn_sys_serial_get(sn_system_serial_number_string);
561 return(sn_system_serial_number_string);
562 }
563}
564
565
566/*
567 * Returns a unique id number for this system and partition (suitable for
568 * use with license managers), based in part on the system serial number.
569 */
570static inline u64
571ia64_sn_partition_serial_get(void)
572{
573 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
574 ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
575 0, 0, 0, 0, 0, 0);
1da177e4
LT
576 if (ret_stuff.status != 0)
577 return 0;
578 return ret_stuff.v0;
579}
580
581static inline u64
582sn_partition_serial_number_val(void) {
b48fc7bb
DN
583 if (unlikely(sn_partition_serial_number == 0)) {
584 sn_partition_serial_number = ia64_sn_partition_serial_get();
1da177e4 585 }
b48fc7bb 586 return sn_partition_serial_number;
1da177e4
LT
587}
588
771388dc
JS
589/*
590 * Returns the partition id of the nasid passed in as an argument,
591 * or INVALID_PARTID if the partition id cannot be retrieved.
592 */
593static inline partid_t
594ia64_sn_sysctl_partition_get(nasid_t nasid)
595{
596 struct ia64_sal_retval ret_stuff;
597 SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
598 0, 0, 0, 0, 0, 0);
599 if (ret_stuff.status != 0)
600 return -1;
601 return ((partid_t)ret_stuff.v0);
602}
603
b48fc7bb
DN
604/*
605 * Returns the physical address of the partition's reserved page through
606 * an iterative number of calls.
607 *
608 * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
609 * set to the nasid of the partition whose reserved page's address is
610 * being sought.
611 * On subsequent calls, pass the values, that were passed back on the
612 * previous call.
613 *
614 * While the return status equals SALRET_MORE_PASSES, keep calling
615 * this function after first copying 'len' bytes starting at 'addr'
616 * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
617 * be the physical address of the partition's reserved page. If the
618 * return status equals neither of these, an error as occurred.
619 */
620static inline s64
621sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
622{
623 struct ia64_sal_retval rv;
624 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
625 *addr, buf, *len, 0, 0, 0);
626 *cookie = rv.v0;
627 *addr = rv.v1;
628 *len = rv.v2;
629 return rv.status;
1da177e4
LT
630}
631
632/*
633 * Register or unregister a physical address range being referenced across
634 * a partition boundary for which certain SAL errors should be scanned for,
635 * cleaned up and ignored. This is of value for kernel partitioning code only.
636 * Values for the operation argument:
637 * 1 = register this address range with SAL
638 * 0 = unregister this address range with SAL
639 *
640 * SAL maintains a reference count on an address range in case it is registered
641 * multiple times.
642 *
643 * On success, returns the reference count of the address range after the SAL
644 * call has performed the current registration/unregistration. Returns a
645 * negative value if an error occurred.
646 */
647static inline int
648sn_register_xp_addr_region(u64 paddr, u64 len, int operation)
649{
650 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
651 ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
652 (u64)operation, 0, 0, 0, 0);
1da177e4
LT
653 return ret_stuff.status;
654}
655
656/*
657 * Register or unregister an instruction range for which SAL errors should
658 * be ignored. If an error occurs while in the registered range, SAL jumps
659 * to return_addr after ignoring the error. Values for the operation argument:
660 * 1 = register this instruction range with SAL
661 * 0 = unregister this instruction range with SAL
662 *
663 * Returns 0 on success, or a negative value if an error occurred.
664 */
665static inline int
666sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
667 int virtual, int operation)
668{
669 struct ia64_sal_retval ret_stuff;
670 u64 call;
671 if (virtual) {
672 call = SN_SAL_NO_FAULT_ZONE_VIRTUAL;
673 } else {
674 call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
675 }
b48fc7bb
DN
676 ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
677 (u64)1, 0, 0, 0);
1da177e4
LT
678 return ret_stuff.status;
679}
680
681/*
682 * Change or query the coherence domain for this partition. Each cpu-based
683 * nasid is represented by a bit in an array of 64-bit words:
684 * 0 = not in this partition's coherency domain
685 * 1 = in this partition's coherency domain
686 *
687 * It is not possible for the local system's nasids to be removed from
688 * the coherency domain. Purpose of the domain arguments:
689 * new_domain = set the coherence domain to the given nasids
690 * old_domain = return the current coherence domain
691 *
692 * Returns 0 on success, or a negative value if an error occurred.
693 */
694static inline int
695sn_change_coherence(u64 *new_domain, u64 *old_domain)
696{
697 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
698 ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
699 (u64)old_domain, 0, 0, 0, 0, 0);
1da177e4
LT
700 return ret_stuff.status;
701}
702
703/*
704 * Change memory access protections for a physical address range.
705 * nasid_array is not used on Altix, but may be in future architectures.
706 * Available memory protection access classes are defined after the function.
707 */
708static inline int
709sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
710{
711 struct ia64_sal_retval ret_stuff;
1da177e4 712
b48fc7bb
DN
713 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
714 (u64)nasid_array, perms, 0, 0, 0);
1da177e4
LT
715 return ret_stuff.status;
716}
717#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
718#define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
719#define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
720#define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
721#define SN_MEMPROT_ACCESS_CLASS_6 0x084080
722#define SN_MEMPROT_ACCESS_CLASS_7 0x021080
723
724/*
725 * Turns off system power.
726 */
727static inline void
728ia64_sn_power_down(void)
729{
730 struct ia64_sal_retval ret_stuff;
731 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
68b9753f
JS
732 while(1)
733 cpu_relax();
1da177e4
LT
734 /* never returns */
735}
736
737/**
738 * ia64_sn_fru_capture - tell the system controller to capture hw state
739 *
740 * This routine will call the SAL which will tell the system controller(s)
741 * to capture hw mmr information from each SHub in the system.
742 */
743static inline u64
744ia64_sn_fru_capture(void)
745{
746 struct ia64_sal_retval isrv;
747 SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0);
748 if (isrv.status)
749 return 0;
750 return isrv.v0;
751}
752
753/*
754 * Performs an operation on a PCI bus or slot -- power up, power down
755 * or reset.
756 */
757static inline u64
758ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type,
759 u64 bus, char slot,
760 u64 action)
761{
762 struct ia64_sal_retval rv = {0, 0, 0, 0};
763
764 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action,
765 bus, (u64) slot, 0, 0);
766 if (rv.status)
767 return rv.v0;
768 return 0;
769}
770
771
772/*
773 * Open a subchannel for sending arbitrary data to the system
774 * controller network via the system controller device associated with
775 * 'nasid'. Return the subchannel number or a negative error code.
776 */
777static inline int
778ia64_sn_irtr_open(nasid_t nasid)
779{
780 struct ia64_sal_retval rv;
781 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid,
782 0, 0, 0, 0, 0);
783 return (int) rv.v0;
784}
785
786/*
787 * Close system controller subchannel 'subch' previously opened on 'nasid'.
788 */
789static inline int
790ia64_sn_irtr_close(nasid_t nasid, int subch)
791{
792 struct ia64_sal_retval rv;
793 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE,
794 (u64) nasid, (u64) subch, 0, 0, 0, 0);
795 return (int) rv.status;
796}
797
798/*
799 * Read data from system controller associated with 'nasid' on
800 * subchannel 'subch'. The buffer to be filled is pointed to by
801 * 'buf', and its capacity is in the integer pointed to by 'len'. The
802 * referent of 'len' is set to the number of bytes read by the SAL
803 * call. The return value is either SALRET_OK (for bytes read) or
804 * SALRET_ERROR (for error or "no data available").
805 */
806static inline int
807ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len)
808{
809 struct ia64_sal_retval rv;
810 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV,
811 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
812 0, 0);
813 return (int) rv.status;
814}
815
816/*
817 * Write data to the system controller network via the system
818 * controller associated with 'nasid' on suchannel 'subch'. The
819 * buffer to be written out is pointed to by 'buf', and 'len' is the
820 * number of bytes to be written. The return value is either the
821 * number of bytes written (which could be zero) or a negative error
822 * code.
823 */
824static inline int
825ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len)
826{
827 struct ia64_sal_retval rv;
828 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND,
829 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
830 0, 0);
831 return (int) rv.v0;
832}
833
834/*
835 * Check whether any interrupts are pending for the system controller
836 * associated with 'nasid' and its subchannel 'subch'. The return
837 * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or
838 * SAL_IROUTER_INTR_RECV).
839 */
840static inline int
841ia64_sn_irtr_intr(nasid_t nasid, int subch)
842{
843 struct ia64_sal_retval rv;
844 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS,
845 (u64) nasid, (u64) subch, 0, 0, 0, 0);
846 return (int) rv.v0;
847}
848
849/*
850 * Enable the interrupt indicated by the intr parameter (either
851 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
852 */
853static inline int
854ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr)
855{
856 struct ia64_sal_retval rv;
857 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON,
858 (u64) nasid, (u64) subch, intr, 0, 0, 0);
859 return (int) rv.v0;
860}
861
862/*
863 * Disable the interrupt indicated by the intr parameter (either
864 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
865 */
866static inline int
867ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
868{
869 struct ia64_sal_retval rv;
870 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF,
871 (u64) nasid, (u64) subch, intr, 0, 0, 0);
872 return (int) rv.v0;
873}
874
67639deb
GH
875/*
876 * Set up a node as the point of contact for system controller
877 * environmental event delivery.
878 */
879static inline int
880ia64_sn_sysctl_event_init(nasid_t nasid)
881{
882 struct ia64_sal_retval rv;
883 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
884 0, 0, 0, 0, 0, 0);
885 return (int) rv.v0;
886}
887
25732ad4
BL
888/*
889 * Ask the system controller on the specified nasid to reset
890 * the CX corelet clock. Only valid on TIO nodes.
891 */
892static inline int
893ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
894{
895 struct ia64_sal_retval rv;
896 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
897 nasid, 0, 0, 0, 0, 0);
898 if (rv.status != 0)
899 return (int)rv.status;
900 if (rv.v0 != 0)
901 return (int)rv.v0;
902
903 return 0;
904}
905
906/*
907 * Get the associated ioboard type for a given nasid.
908 */
f90aa8c4
PB
909static inline s64
910ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
25732ad4 911{
f90aa8c4
PB
912 struct ia64_sal_retval isrv;
913 SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
914 nasid, 0, 0, 0, 0, 0);
915 if (isrv.v0 != 0) {
916 *ioboard = isrv.v0;
917 return isrv.status;
918 }
919 if (isrv.v1 != 0) {
920 *ioboard = isrv.v1;
921 return isrv.status;
922 }
923
924 return isrv.status;
25732ad4
BL
925}
926
1da177e4
LT
927/**
928 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
929 * @nasid: NASID of node to read
930 * @index: FIT entry index to be retrieved (0..n)
931 * @fitentry: 16 byte buffer where FIT entry will be stored.
932 * @banbuf: optional buffer for retrieving banner
933 * @banlen: length of banner buffer
934 *
935 * Access to the physical PROM chips needs to be serialized since reads and
936 * writes can't occur at the same time, so we need to call into the SAL when
937 * we want to look at the FIT entries on the chips.
938 *
939 * Returns:
940 * %SALRET_OK if ok
941 * %SALRET_INVALID_ARG if index too big
942 * %SALRET_NOT_IMPLEMENTED if running on older PROM
943 * ??? if nasid invalid OR banner buffer not large enough
944 */
945static inline int
946ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf,
947 u64 banlen)
948{
949 struct ia64_sal_retval rv;
950 SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry,
951 banbuf, banlen, 0, 0);
952 return (int) rv.status;
953}
954
955/*
956 * Initialize the SAL components of the system controller
957 * communication driver; specifically pass in a sizable buffer that
958 * can be used for allocation of subchannel queues as new subchannels
959 * are opened. "buf" points to the buffer, and "len" specifies its
960 * length.
961 */
962static inline int
963ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
964{
965 struct ia64_sal_retval rv;
966 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT,
967 (u64) nasid, (u64) buf, (u64) len, 0, 0, 0);
968 return (int) rv.status;
969}
970
971/*
972 * Returns the nasid, subnode & slice corresponding to a SAPIC ID
973 *
974 * In:
975 * arg0 - SN_SAL_GET_SAPIC_INFO
976 * arg1 - sapicid (lid >> 16)
977 * Out:
978 * v0 - nasid
979 * v1 - subnode
980 * v2 - slice
981 */
982static inline u64
983ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
984{
985 struct ia64_sal_retval ret_stuff;
986
987 ret_stuff.status = 0;
988 ret_stuff.v0 = 0;
989 ret_stuff.v1 = 0;
990 ret_stuff.v2 = 0;
991 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
992
993/***** BEGIN HACK - temp til old proms no longer supported ********/
994 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
995 if (nasid) *nasid = sapicid & 0xfff;
996 if (subnode) *subnode = (sapicid >> 13) & 1;
997 if (slice) *slice = (sapicid >> 12) & 3;
998 return 0;
999 }
1000/***** END HACK *******/
1001
1002 if (ret_stuff.status < 0)
1003 return ret_stuff.status;
1004
1005 if (nasid) *nasid = (int) ret_stuff.v0;
1006 if (subnode) *subnode = (int) ret_stuff.v1;
1007 if (slice) *slice = (int) ret_stuff.v2;
1008 return 0;
1009}
1010
1011/*
1012 * Returns information about the HUB/SHUB.
1013 * In:
1014 * arg0 - SN_SAL_GET_SN_INFO
1015 * arg1 - 0 (other values reserved for future use)
1016 * Out:
1017 * v0
1018 * [7:0] - shub type (0=shub1, 1=shub2)
1019 * [15:8] - Log2 max number of nodes in entire system (includes
1020 * C-bricks, I-bricks, etc)
1021 * [23:16] - Log2 of nodes per sharing domain
1022 * [31:24] - partition ID
1023 * [39:32] - coherency_id
1024 * [47:40] - regionsize
1025 * v1
1026 * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
1027 * [23:15] - bit position of low nasid bit
1028 */
1029static inline u64
1030ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1031 u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg)
1032{
1033 struct ia64_sal_retval ret_stuff;
1034
1035 ret_stuff.status = 0;
1036 ret_stuff.v0 = 0;
1037 ret_stuff.v1 = 0;
1038 ret_stuff.v2 = 0;
1039 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1040
771388dc
JS
1041/***** BEGIN HACK - temp til old proms no longer supported ********/
1042 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
53b3531b 1043 int nasid = get_sapicid() & 0xfff;
771388dc
JS
1044#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1045#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1046 if (shubtype) *shubtype = 0;
1047 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1048 if (nasid_shift) *nasid_shift = 38;
1049 if (systemsize) *systemsize = 10;
1050 if (sharing_domain_size) *sharing_domain_size = 8;
1051 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1052 if (coher) *coher = nasid >> 9;
1053 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1054 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1055 return 0;
1056 }
1057/***** END HACK *******/
1058
1da177e4
LT
1059 if (ret_stuff.status < 0)
1060 return ret_stuff.status;
1061
1062 if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
1063 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
1064 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
1065 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
1066 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
1067 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
1068 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
1069 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
1070 return 0;
1071}
1072
1073/*
1074 * This is the access point to the Altix PROM hardware performance
1075 * and status monitoring interface. For info on using this, see
1076 * include/asm-ia64/sn/sn2/sn_hwperf.h
1077 */
1078static inline int
1079ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
1080 u64 a3, u64 a4, int *v0)
1081{
1082 struct ia64_sal_retval rv;
1083 SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid,
1084 opcode, a0, a1, a2, a3, a4);
1085 if (v0)
1086 *v0 = (int) rv.v0;
1087 return (int) rv.status;
1088}
1089
4a5c13c7 1090static inline int
ecc3c30a 1091ia64_sn_ioif_get_pci_topology(u64 buf, u64 len)
4a5c13c7
MG
1092{
1093 struct ia64_sal_retval rv;
ecc3c30a 1094 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0);
4a5c13c7
MG
1095 return (int) rv.status;
1096}
1097
93a07d0a
RA
1098/*
1099 * BTE error recovery is implemented in SAL
1100 */
1101static inline int
1102ia64_sn_bte_recovery(nasid_t nasid)
1103{
1104 struct ia64_sal_retval rv;
1105
1106 rv.status = 0;
17e8ce0e 1107 SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, (u64)nasid, 0, 0, 0, 0, 0, 0);
93a07d0a
RA
1108 if (rv.status == SALRET_NOT_IMPLEMENTED)
1109 return 0;
1110 return (int) rv.status;
1111}
1112
71a5d027
JS
1113static inline int
1114ia64_sn_is_fake_prom(void)
1115{
1116 struct ia64_sal_retval rv;
1117 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
1118 return (rv.status == 0);
1119}
1120
a1cddb88
JS
1121static inline int
1122ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set)
1123{
1124 struct ia64_sal_retval rv;
1125
1126 SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0);
1127 if (rv.status != 0)
1128 return rv.status;
1129 *feature_set = rv.v0;
1130 return 0;
1131}
1132
1133static inline int
1134ia64_sn_set_os_feature(int feature)
1135{
1136 struct ia64_sal_retval rv;
1137
1138 SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0);
1139 return rv.status;
1140}
1141
86db2f42
RA
1142static inline int
1143sn_inject_error(u64 paddr, u64 *data, u64 *ecc)
1144{
1145 struct ia64_sal_retval ret_stuff;
86db2f42 1146
86db2f42
RA
1147 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data,
1148 (u64)ecc, 0, 0, 0, 0);
86db2f42
RA
1149 return ret_stuff.status;
1150}
9d56d878
JS
1151
1152static inline int
1153ia64_sn_set_cpu_number(int cpu)
1154{
1155 struct ia64_sal_retval rv;
1156
1157 SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
1158 return rv.status;
1159}
a7956113
ZN
1160static inline int
1161ia64_sn_kernel_launch_event(void)
1162{
1163 struct ia64_sal_retval rv;
1164 SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0);
1165 return rv.status;
1166}
1da177e4 1167#endif /* _ASM_IA64_SN_SN_SAL_H */