[linux-2.6-block.git] / include / asm-ia64 / mca.h

/*
 * File:	mca.h
 * Purpose:	Machine check handling specific defines
 *
 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
 * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
 * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
 * Copyright (C) Russ Anderson (rja@sgi.com)
 */

#ifndef _ASM_IA64_MCA_H
#define _ASM_IA64_MCA_H

#if !defined(__ASSEMBLY__)

#include <linux/interrupt.h>
#include <linux/types.h>

#include <asm/param.h>
#include <asm/sal.h>
#include <asm/processor.h>
#include <asm/mca_asm.h>

#define IA64_MCA_RENDEZ_TIMEOUT		(20 * 1000)	/* value in milliseconds - 20 seconds */

typedef struct ia64_fptr {
	unsigned long fp;
	unsigned long gp;
} ia64_fptr_t;

typedef union cmcv_reg_u {
	u64	cmcv_regval;
	struct	{
		u64	cmcr_vector		: 8;
		u64	cmcr_reserved1		: 4;
		u64	cmcr_ignored1		: 1;
		u64	cmcr_reserved2		: 3;
		u64	cmcr_mask		: 1;
		u64	cmcr_ignored2		: 47;
	} cmcv_reg_s;

} cmcv_reg_t;

#define cmcv_mask		cmcv_reg_s.cmcr_mask
#define cmcv_vector		cmcv_reg_s.cmcr_vector

enum {
	IA64_MCA_RENDEZ_CHECKIN_NOTDONE	=	0x0,
	IA64_MCA_RENDEZ_CHECKIN_DONE	=	0x1,
	IA64_MCA_RENDEZ_CHECKIN_INIT	=	0x2,
};

/* Information maintained by the MC infrastructure */
typedef struct ia64_mc_info_s {
	u64		imi_mca_handler;
	size_t		imi_mca_handler_size;
	u64		imi_monarch_init_handler;
	size_t		imi_monarch_init_handler_size;
	u64		imi_slave_init_handler;
	size_t		imi_slave_init_handler_size;
	u8		imi_rendez_checkin[NR_CPUS];

} ia64_mc_info_t;

/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
 * Besides the handover state, it also contains some saved registers from the
 * time of the event.
 * Note: mca_asm.S depends on the precise layout of this structure.
 */

struct ia64_sal_os_state {

	/* SAL to OS */
	u64			os_gp;			/* GP of the os registered with the SAL, physical */
	u64			pal_proc;		/* PAL_PROC entry point, physical */
	u64			sal_proc;		/* SAL_PROC entry point, physical */
	u64			rv_rc;			/* MCA - Rendezvous state, INIT - reason code */
	u64			proc_state_param;	/* from R18 */
	u64			monarch;		/* 1 for a monarch event, 0 for a slave */

	/* common */
	u64			sal_ra;			/* Return address in SAL, physical */
	u64			sal_gp;			/* GP of the SAL - physical */
	pal_min_state_area_t	*pal_min_state;		/* from R17.  physical in asm, virtual in C */
	/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
	 * Note: if the MCA/INIT recovery code wants to resume to a new context
	 * then it must change these values to reflect the new kernel stack.
	 */
	u64			prev_IA64_KR_CURRENT;	/* previous value of IA64_KR(CURRENT) */
	u64			prev_IA64_KR_CURRENT_STACK;
	struct task_struct	*prev_task;		/* previous task, NULL if it is not useful */
	/* Some interrupt registers are not saved in minstate, pt_regs or
	 * switch_stack.  Because MCA/INIT can occur when interrupts are
	 * disabled, we need to save the additional interrupt registers over
	 * MCA/INIT and resume.
	 */
	u64			isr;
	u64			ifa;
	u64			itir;
	u64			iipa;
	u64			iim;
	u64			iha;

	/* OS to SAL */
	u64			os_status;		/* OS status to SAL, enum below */
	u64			context;		/* 0 if return to same context
							   1 if return to new context */
};

enum {
	IA64_MCA_CORRECTED	=	0x0,	/* Error has been corrected by OS_MCA */
	IA64_MCA_WARM_BOOT	=	-1,	/* Warm boot of the system need from SAL */
	IA64_MCA_COLD_BOOT	=	-2,	/* Cold boot of the system need from SAL */
	IA64_MCA_HALT		=	-3	/* System to be halted by SAL */
};

enum {
	IA64_INIT_RESUME	=	0x0,	/* Resume after return from INIT */
	IA64_INIT_WARM_BOOT	=	-1,	/* Warm boot of the system need from SAL */
};

enum {
	IA64_MCA_SAME_CONTEXT	=	0x0,	/* SAL to return to same context */
	IA64_MCA_NEW_CONTEXT	=	-1	/* SAL to return to new context */
};

/* Per-CPU MCA state that is too big for normal per-CPU variables.  */

struct ia64_mca_cpu {
	u64 mca_stack[KERNEL_STACK_SIZE/8];
	u64 init_stack[KERNEL_STACK_SIZE/8];
};

/* Array of physical addresses of each CPU's MCA area.  */
extern unsigned long __per_cpu_mca[NR_CPUS];

extern int cpe_vector;
extern int ia64_cpe_irq;
extern void ia64_mca_init(void);
extern void ia64_mca_cpu_init(void *);
extern void ia64_os_mca_dispatch(void);
extern void ia64_os_mca_dispatch_end(void);
extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
extern void ia64_init_handler(struct pt_regs *,
			      struct switch_stack *,
			      struct ia64_sal_os_state *);
extern void ia64_monarch_init_handler(void);
extern void ia64_slave_init_handler(void);
extern void ia64_mca_cmc_vector_setup(void);
extern int  ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
extern void ia64_unreg_MCA_extension(void);
extern u64 ia64_get_rnat(u64 *);

struct ia64_mca_notify_die {
	struct ia64_sal_os_state *sos;
	int *monarch_cpu;
};

#else	/* __ASSEMBLY__ */

#define IA64_MCA_CORRECTED	0x0	/* Error has been corrected by OS_MCA */
#define IA64_MCA_WARM_BOOT	-1	/* Warm boot of the system need from SAL */
#define IA64_MCA_COLD_BOOT	-2	/* Cold boot of the system need from SAL */
#define IA64_MCA_HALT		-3	/* System to be halted by SAL */

#define IA64_INIT_RESUME	0x0	/* Resume after return from INIT */
#define IA64_INIT_WARM_BOOT	-1	/* Warm boot of the system need from SAL */

#define IA64_MCA_SAME_CONTEXT	0x0	/* SAL to return to same context */
#define IA64_MCA_NEW_CONTEXT	-1	/* SAL to return to new context */

#endif /* !__ASSEMBLY__ */
#endif /* _ASM_IA64_MCA_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* File: mca.h
	3	* Purpose: Machine check handling specific defines
	4	*
	5	* Copyright (C) 1999, 2004 Silicon Graphics, Inc.
	6	* Copyright (C) Vijay Chander (vijay@engr.sgi.com)
	7	* Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
	8	* Copyright (C) Russ Anderson (rja@sgi.com)
	9	*/
	10
	11	#ifndef _ASM_IA64_MCA_H
	12	#define _ASM_IA64_MCA_H
	13
1da177e4 LT	14	#if !defined(__ASSEMBLY__)
	15
	16	#include <linux/interrupt.h>
	17	#include <linux/types.h>
	18
	19	#include <asm/param.h>
	20	#include <asm/sal.h>
	21	#include <asm/processor.h>
	22	#include <asm/mca_asm.h>
	23
	24	#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
	25
	26	typedef struct ia64_fptr {
	27	unsigned long fp;
	28	unsigned long gp;
	29	} ia64_fptr_t;
	30
	31	typedef union cmcv_reg_u {
	32	u64 cmcv_regval;
	33	struct {
	34	u64 cmcr_vector : 8;
	35	u64 cmcr_reserved1 : 4;
	36	u64 cmcr_ignored1 : 1;
	37	u64 cmcr_reserved2 : 3;
	38	u64 cmcr_mask : 1;
	39	u64 cmcr_ignored2 : 47;
	40	} cmcv_reg_s;
	41
	42	} cmcv_reg_t;
	43
	44	#define cmcv_mask cmcv_reg_s.cmcr_mask
	45	#define cmcv_vector cmcv_reg_s.cmcr_vector
	46
	47	enum {
	48	IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
7f613c7d KO	49	IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
7f613c7d KO	50	IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
1da177e4 LT	51	};
	52
	53	/* Information maintained by the MC infrastructure */
	54	typedef struct ia64_mc_info_s {
	55	u64 imi_mca_handler;
	56	size_t imi_mca_handler_size;
	57	u64 imi_monarch_init_handler;
	58	size_t imi_monarch_init_handler_size;
	59	u64 imi_slave_init_handler;
	60	size_t imi_slave_init_handler_size;
	61	u8 imi_rendez_checkin[NR_CPUS];
	62
	63	} ia64_mc_info_t;
	64
7f613c7d KO	65	/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
	66	* Besides the handover state, it also contains some saved registers from the
	67	* time of the event.
	68	* Note: mca_asm.S depends on the precise layout of this structure.
	69	*/
	70
	71	struct ia64_sal_os_state {
d270acbc KO	72
d270acbc KO	73	/* SAL to OS */
7f613c7d KO	74	u64 os_gp; /* GP of the os registered with the SAL, physical */
	75	u64 pal_proc; /* PAL_PROC entry point, physical */
	76	u64 sal_proc; /* SAL_PROC entry point, physical */
	77	u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */
	78	u64 proc_state_param; /* from R18 */
	79	u64 monarch; /* 1 for a monarch event, 0 for a slave */
d270acbc KO	80
d270acbc KO	81	/* common */
7f613c7d KO	82	u64 sal_ra; /* Return address in SAL, physical */
	83	u64 sal_gp; /* GP of the SAL - physical */
	84	pal_min_state_area_t pal_min_state; / from R17. physical in asm, virtual in C */
20bb8685 KO	85	/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
	86	* Note: if the MCA/INIT recovery code wants to resume to a new context
	87	* then it must change these values to reflect the new kernel stack.
	88	*/
7f613c7d	89	u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
20bb8685	90	u64 prev_IA64_KR_CURRENT_STACK;
7f613c7d KO	91	struct task_struct prev_task; / previous task, NULL if it is not useful */
	92	/* Some interrupt registers are not saved in minstate, pt_regs or
	93	* switch_stack. Because MCA/INIT can occur when interrupts are
	94	* disabled, we need to save the additional interrupt registers over
	95	* MCA/INIT and resume.
	96	*/
	97	u64 isr;
	98	u64 ifa;
	99	u64 itir;
	100	u64 iipa;
	101	u64 iim;
	102	u64 iha;
d270acbc KO	103
d270acbc KO	104	/* OS to SAL */
7f613c7d KO	105	u64 os_status; /* OS status to SAL, enum below */
	106	u64 context; /* 0 if return to same context
	107	1 if return to new context */
	108	};
1da177e4 LT	109
	110	enum {
	111	IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
	112	IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
	113	IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
	114	IA64_MCA_HALT = -3 /* System to be halted by SAL */
	115	};
	116
7f613c7d KO	117	enum {
	118	IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
	119	IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
	120	};
	121
1da177e4 LT	122	enum {
	123	IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
	124	IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
	125	};
	126
1da177e4 LT	127	/* Per-CPU MCA state that is too big for normal per-CPU variables. */
	128
	129	struct ia64_mca_cpu {
7f613c7d	130	u64 mca_stack[KERNEL_STACK_SIZE/8];
1da177e4	131	u64 init_stack[KERNEL_STACK_SIZE/8];
7f613c7d	132	};
1da177e4 LT	133
	134	/* Array of physical addresses of each CPU's MCA area. */
	135	extern unsigned long __per_cpu_mca[NR_CPUS];
	136
ff741906 AR	137	extern int cpe_vector;
ff741906 AR	138	extern int ia64_cpe_irq;
1da177e4 LT	139	extern void ia64_mca_init(void);
	140	extern void ia64_mca_cpu_init(void *);
	141	extern void ia64_os_mca_dispatch(void);
	142	extern void ia64_os_mca_dispatch_end(void);
7f613c7d KO	143	extern void ia64_mca_ucmc_handler(struct pt_regs , struct ia64_sal_os_state );
	144	extern void ia64_init_handler(struct pt_regs *,
	145	struct switch_stack *,
	146	struct ia64_sal_os_state *);
1da177e4 LT	147	extern void ia64_monarch_init_handler(void);
	148	extern void ia64_slave_init_handler(void);
	149	extern void ia64_mca_cmc_vector_setup(void);
7f613c7d	150	extern int ia64_reg_MCA_extension(int (fn)(void , struct ia64_sal_os_state *));
1da177e4	151	extern void ia64_unreg_MCA_extension(void);
7f613c7d KO	152	extern u64 ia64_get_rnat(u64 *);
7f613c7d KO	153
958b166c KO	154	struct ia64_mca_notify_die {
	155	struct ia64_sal_os_state *sos;
	156	int *monarch_cpu;
	157	};
	158
7f613c7d KO	159	#else /* __ASSEMBLY__ */
	160
	161	#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
	162	#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
	163	#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
	164	#define IA64_MCA_HALT -3 /* System to be halted by SAL */
	165
	166	#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
	167	#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
	168
	169	#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
	170	#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
1da177e4 LT	171
	172	#endif /* !__ASSEMBLY__ */
	173	#endif /* _ASM_IA64_MCA_H */