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1da177e4 LT |
1 | #ifndef __ASM_IA64_IOSAPIC_H |
2 | #define __ASM_IA64_IOSAPIC_H | |
3 | ||
4 | #define IOSAPIC_REG_SELECT 0x0 | |
5 | #define IOSAPIC_WINDOW 0x10 | |
6 | #define IOSAPIC_EOI 0x40 | |
7 | ||
8 | #define IOSAPIC_VERSION 0x1 | |
9 | ||
10 | /* | |
11 | * Redirection table entry | |
12 | */ | |
13 | #define IOSAPIC_RTE_LOW(i) (0x10+i*2) | |
14 | #define IOSAPIC_RTE_HIGH(i) (0x11+i*2) | |
15 | ||
16 | #define IOSAPIC_DEST_SHIFT 16 | |
17 | ||
18 | /* | |
19 | * Delivery mode | |
20 | */ | |
21 | #define IOSAPIC_DELIVERY_SHIFT 8 | |
22 | #define IOSAPIC_FIXED 0x0 | |
23 | #define IOSAPIC_LOWEST_PRIORITY 0x1 | |
24 | #define IOSAPIC_PMI 0x2 | |
25 | #define IOSAPIC_NMI 0x4 | |
26 | #define IOSAPIC_INIT 0x5 | |
27 | #define IOSAPIC_EXTINT 0x7 | |
28 | ||
29 | /* | |
30 | * Interrupt polarity | |
31 | */ | |
32 | #define IOSAPIC_POLARITY_SHIFT 13 | |
33 | #define IOSAPIC_POL_HIGH 0 | |
34 | #define IOSAPIC_POL_LOW 1 | |
35 | ||
36 | /* | |
37 | * Trigger mode | |
38 | */ | |
39 | #define IOSAPIC_TRIGGER_SHIFT 15 | |
40 | #define IOSAPIC_EDGE 0 | |
41 | #define IOSAPIC_LEVEL 1 | |
42 | ||
43 | /* | |
44 | * Mask bit | |
45 | */ | |
46 | ||
47 | #define IOSAPIC_MASK_SHIFT 16 | |
48 | #define IOSAPIC_MASK (1<<IOSAPIC_MASK_SHIFT) | |
49 | ||
50 | #ifndef __ASSEMBLY__ | |
51 | ||
52 | #ifdef CONFIG_IOSAPIC | |
53 | ||
54 | #define NR_IOSAPICS 256 | |
55 | ||
56 | static inline unsigned int iosapic_read(char __iomem *iosapic, unsigned int reg) | |
57 | { | |
58 | writel(reg, iosapic + IOSAPIC_REG_SELECT); | |
59 | return readl(iosapic + IOSAPIC_WINDOW); | |
60 | } | |
61 | ||
62 | static inline void iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) | |
63 | { | |
64 | writel(reg, iosapic + IOSAPIC_REG_SELECT); | |
65 | writel(val, iosapic + IOSAPIC_WINDOW); | |
66 | } | |
67 | ||
68 | static inline void iosapic_eoi(char __iomem *iosapic, u32 vector) | |
69 | { | |
70 | writel(vector, iosapic + IOSAPIC_EOI); | |
71 | } | |
72 | ||
73 | extern void __init iosapic_system_init (int pcat_compat); | |
74 | extern void __init iosapic_init (unsigned long address, | |
75 | unsigned int gsi_base); | |
76 | extern int gsi_to_vector (unsigned int gsi); | |
77 | extern int gsi_to_irq (unsigned int gsi); | |
78 | extern void iosapic_enable_intr (unsigned int vector); | |
79 | extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity, | |
80 | unsigned long trigger); | |
81 | #ifdef CONFIG_ACPI_DEALLOCATE_IRQ | |
82 | extern void iosapic_unregister_intr (unsigned int irq); | |
83 | #endif | |
84 | extern void __init iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi, | |
85 | unsigned long polarity, | |
86 | unsigned long trigger); | |
87 | extern int __init iosapic_register_platform_intr (u32 int_type, | |
88 | unsigned int gsi, | |
89 | int pmi_vector, | |
90 | u16 eid, u16 id, | |
91 | unsigned long polarity, | |
92 | unsigned long trigger); | |
93 | extern unsigned int iosapic_version (char __iomem *addr); | |
94 | ||
95 | extern void iosapic_pci_fixup (int); | |
96 | #ifdef CONFIG_NUMA | |
97 | extern void __init map_iosapic_to_node (unsigned int, int); | |
98 | #endif | |
99 | #else | |
100 | #define iosapic_system_init(pcat_compat) do { } while (0) | |
101 | #define iosapic_init(address,gsi_base) do { } while (0) | |
102 | #define iosapic_register_intr(gsi,polarity,trigger) (gsi) | |
103 | #define iosapic_unregister_intr(irq) do { } while (0) | |
104 | #define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0) | |
105 | #define iosapic_register_platform_intr(type,gsi,pmi,eid,id, \ | |
106 | polarity,trigger) (gsi) | |
107 | #endif | |
108 | ||
109 | # endif /* !__ASSEMBLY__ */ | |
110 | #endif /* __ASM_IA64_IOSAPIC_H */ |